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([191.255.108.232]) by smtp.gmail.com with ESMTPSA id g4-20020a056870d20400b0018045663fc5sm906309oac.48.2023.04.06.11.04.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Apr 2023 11:04:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1680804245; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ufyvyScFDwHTPmPsfLa8yROo1ql9YOF/CnHfsvDkUMU=; b=X0KW4LQ6OysqUHobZwQ3GKGy1zzzyWao4RA1yJEL2mUogk9d1dOnf9Xj+2woDtH+j2 lAF029ApLDIMNHD3TF3shkU/G4/qoiDn3RtbZW+WzYsdr/TahnyzYMuv1wQgaloTZapx IBOiL3Xw9yJ/jMY1wbkoaQ6krlDyEDaLpkbfO7+ogTpfrUdnz3zOueCDijQnRps1+MnO tTAzK0VFPRtd1CryiRqZy++IH/B60pAQXhvgcSvm9D9Nrbj9F2Vc8MlH8jvwA6HhQgcO TxWkfV+W/cvZ3yIvtrtqDM2Qjw3Gt2a1Ay7Im66PNl5Nd+RZLvETu58TBJ6NiGApwSZC nZng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680804245; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ufyvyScFDwHTPmPsfLa8yROo1ql9YOF/CnHfsvDkUMU=; b=4YIYU9h7sNsY9Ah6eO9fnFFQsjJyz4bKlJUXP+Y4nUXeW4qjdMR/mvG9NgPvOwTBv7 xFw9AcPsLng/y0tHpI6I9X7si6Txlc5wjLRok/kMN3+oJkn2G68rlNQF5yXAk7dpgeDd USo8J9PCgc4WDdtedF87BYpPR4+r3JmBzfInYL95N2jAoyPiQj23+fEZPYyqvrgQKyW1 a//wnDFFTmA3Fh1GSiMcbgV8VQSaQtHcuIU/2YKJmx2EVtFnvqQhxc3Euiq+LPG6uH5W CgplDil7+pQk3Wrw0u0uM0G2iKfjpRDyTg2r6uJWm3PMMPH3KIPfIjCZDfeUdHMcIAlH 3NIA== X-Gm-Message-State: AAQBX9dMGH/wo1EDldhuc5bMjSygBpQnGrVuiuf7Y6f/UMlZDRP+HBkF 2+X1ntUQBe+2IIa6IuQm/kTeKypPpfMklxVNsRc= X-Google-Smtp-Source: AKy350YIGovIxwIiR1g/r+9m6MrpmXFXEBL7KyQ3GuIxwrKVLhZVxLiplqEqwv+Qv1j3729zyqPe5g== X-Received: by 2002:a05:6871:9b:b0:177:9e9e:ff47 with SMTP id u27-20020a056871009b00b001779e9eff47mr143565oaa.17.1680804245497; Thu, 06 Apr 2023 11:04:05 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, Daniel Henrique Barboza Subject: [PATCH v4 02/20] target/riscv: remove MISA properties from isa_edata_arr[] Date: Thu, 6 Apr 2023 15:03:33 -0300 Message-Id: <20230406180351.570807-3-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230406180351.570807-1-dbarboza@ventanamicro.com> References: <20230406180351.570807-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:4860:4864:20::2e; envelope-from=dbarboza@ventanamicro.com; helo=mail-oa1-x2e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1680804480003100005 Content-Type: text/plain; charset="utf-8" The code that disables extensions if there's a priv version mismatch uses cpu->cfg.ext_N properties to do its job. We're aiming to not rely on cpu->cfg.ext_N props for MISA bits. Split the MISA related verifications in a new function, removing it from isa_edata_arr[]. We're also erroring it out instead of disabling, making the cpu_init() function responsible for running an adequate priv spec for the MISA extensions it wants to use. Note that the RVV verification is being ignored since we're always have at least PRIV_VERSION_1_10_0. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Weiwei Li Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 66de3bb33f..ed8f36c649 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -72,10 +72,11 @@ struct isa_ext_data { * 4. Non-standard extensions (starts with 'X') must be listed after all * standard extensions. They must be separated from other multi-letter * extensions by an underscore. + * + * Single letter extensions are checked in riscv_cpu_validate_misa_priv() + * instead. */ static const struct isa_ext_data isa_edata_arr[] =3D { - ISA_EXT_DATA_ENTRY(h, false, PRIV_VERSION_1_12_0, ext_h), - ISA_EXT_DATA_ENTRY(v, false, PRIV_VERSION_1_10_0, ext_v), ISA_EXT_DATA_ENTRY(zicbom, true, PRIV_VERSION_1_12_0, ext_icbom), ISA_EXT_DATA_ENTRY(zicboz, true, PRIV_VERSION_1_12_0, ext_icboz), ISA_EXT_DATA_ENTRY(zicond, true, PRIV_VERSION_1_12_0, ext_zicond), @@ -1191,6 +1192,14 @@ static void riscv_cpu_sync_misa_cfg(CPURISCVState *e= nv) env->misa_ext =3D env->misa_ext_mask =3D ext; } =20 +static void riscv_cpu_validate_misa_priv(CPURISCVState *env, Error **errp) +{ + if (riscv_has_ext(env, RVH) && env->priv_ver < PRIV_VERSION_1_12_0) { + error_setg(errp, "H extension requires priv spec 1.12.0"); + return; + } +} + static void riscv_cpu_realize(DeviceState *dev, Error **errp) { CPUState *cs =3D CPU(dev); @@ -1234,6 +1243,12 @@ static void riscv_cpu_realize(DeviceState *dev, Erro= r **errp) */ riscv_cpu_sync_misa_cfg(env); =20 + riscv_cpu_validate_misa_priv(env, &local_err); + if (local_err !=3D NULL) { + error_propagate(errp, local_err); + return; + } + /* Force disable extensions if priv spec version does not match */ for (i =3D 0; i < ARRAY_SIZE(isa_edata_arr); i++) { if (isa_ext_is_enabled(cpu, &isa_edata_arr[i]) && --=20 2.39.2