From nobody Mon Feb 9 04:09:32 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1680274308; cv=none; d=zohomail.com; s=zohoarc; b=VTkI7//qkUIIjWbJKpvghqTc0jeiVXy3lWJwpFsmmvktW4ifCt0EzBjmNBAO0anxxg2OmhA3uA8unsNl9BMQPBiRivUukgmVVzgP23bcOghVOiOMinbYphrn3UHQuoUkP89CHaMPZw16DAoek1ju0vEu1qD+ZAP0Y+O4hLlxrsY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1680274308; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=lxHwKmEkcI9a9cB3NtBeKtlKzdxzWz/JBHE/okIH9Ik=; b=mIsOJne89luV8OXjnNYWmaICuVvUThQZyf/t42elVepCrzeD61hcjqVoGtC52pjniwifvdAaELF8PD6u8EIAcMprQqoFCVtnmWvuVfh6zarrbLjmi+/MVEdhVDiuFtPF0eQNBADFYpyXqw/JMXpKXmcyazCaPQmobIOg0l/Govs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1680274308143724.9708632975439; Fri, 31 Mar 2023 07:51:48 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1piG5g-0000ah-1I; Fri, 31 Mar 2023 10:50:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1piG5c-0000ZK-A6 for qemu-devel@nongnu.org; Fri, 31 Mar 2023 10:50:52 -0400 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1piG5Y-0000bY-Mu for qemu-devel@nongnu.org; Fri, 31 Mar 2023 10:50:51 -0400 Received: by mail-wr1-x42d.google.com with SMTP id e18so22690599wra.9 for ; Fri, 31 Mar 2023 07:50:48 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id l12-20020a5d560c000000b002cfe685bfd6sm2339831wrv.108.2023.03.31.07.50.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Mar 2023 07:50:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1680274247; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=lxHwKmEkcI9a9cB3NtBeKtlKzdxzWz/JBHE/okIH9Ik=; b=VoCODkxFyuo15LAlwYAAEIujOQypvws9LzQ2YyxyCutoHMnGkjwW7WukAvKVuIeL81 KYt0nZ+zHQu4HjpBLVrvv1hjxlgmg/1aJnCnbZeqp6ML27C7arO/r6g9+bCJNKsYQe8k /RtIy0JKxhGjwSjB8uotvSWRRLmj7Enn0kZwhZMGxEWCjKS9msNuuA8CRh8LfZzk5TJH rbwrqGhcw4ENHtJR3htctdyEzcFtycj9/zY+GPkKqpKCHxwILgHq0ua+LvzNkEIIvBT5 OiHAZeTH295TgYZaw8g8iAoopVmYZnDxaKRWbgyNs4g8lj05ELLAerOFyqaTj1S6iyUF ywgQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680274247; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lxHwKmEkcI9a9cB3NtBeKtlKzdxzWz/JBHE/okIH9Ik=; b=qt334JSBcEoti5Tb5/fGVzLsp6ywIQAr3i0mUpFj+xlBBDs3QMbmk5EneF+D8bJFW7 YjTX7DwHx4iHjTRzqEBOzyp1Xiyr1ovhysOI/UFIwv2YI1pfHntgPYcXoZw1kH9LrrmR M6fxWm8QlW1Rd8vmT+4Xj/Ooq3FdClaNMXQQ8Ae1IBANUNnyghFK0NjvX5Jq8aqiEK9k tFdap008QEWIMhglQEAqQFuVnD+MX1UlIcN4BsJFTJ+NtvwVPHp8+5VFebJHPiDA0Mai JVTn0YwznGzz6I1IUC2lF+PH/EyX1sBSNd7MPj9C88DWtjmcGzuYLa+A3K6/KBxX5jUJ y9+w== X-Gm-Message-State: AAQBX9eW1QuSQ5/2ZhSQzcOnpYg9Qd+BDgog6ahYs/osjSvZq4eV/7Hw EKu33qLgP2mzsqGBxfcQSs4nGA== X-Google-Smtp-Source: AKy350aCeTChyeM/sREhULRoGc8cuG/o2pUA9VTgfIpljSwnpg9jf11iJgMYU8DS+R+j1TLZtxnAYg== X-Received: by 2002:a5d:62cd:0:b0:2e4:f53a:45a1 with SMTP id o13-20020a5d62cd000000b002e4f53a45a1mr3982609wrv.57.1680274247270; Fri, 31 Mar 2023 07:50:47 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 1/3] target/arm: Pass ARMMMUFaultInfo to merge_syn_data_abort() Date: Fri, 31 Mar 2023 15:50:43 +0100 Message-Id: <20230331145045.2584941-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230331145045.2584941-1-peter.maydell@linaro.org> References: <20230331145045.2584941-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1680274310549100003 Content-Type: text/plain; charset="utf-8" We already pass merge_syn_data_abort() two fields from the ARMMMUFaultInfo struct, and we're about to want to use a third field. Refactor to just pass a pointer to the fault info. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/arm/tcg/tlb_helper.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/target/arm/tcg/tlb_helper.c b/target/arm/tcg/tlb_helper.c index 31eb77f7df9..1a61adb8a68 100644 --- a/target/arm/tcg/tlb_helper.c +++ b/target/arm/tcg/tlb_helper.c @@ -24,9 +24,9 @@ bool arm_s1_regime_using_lpae_format(CPUARMState *env, AR= MMMUIdx mmu_idx) } =20 static inline uint32_t merge_syn_data_abort(uint32_t template_syn, + ARMMMUFaultInfo *fi, unsigned int target_el, - bool same_el, bool ea, - bool s1ptw, bool is_write, + bool same_el, bool is_write, int fsc) { uint32_t syn; @@ -43,9 +43,9 @@ static inline uint32_t merge_syn_data_abort(uint32_t temp= late_syn, * ISS encoding for an exception from a Data Abort, the * ISV field. */ - if (!(template_syn & ARM_EL_ISV) || target_el !=3D 2 || s1ptw) { + if (!(template_syn & ARM_EL_ISV) || target_el !=3D 2 || fi->s1ptw) { syn =3D syn_data_abort_no_iss(same_el, 0, - ea, 0, s1ptw, is_write, fsc); + fi->ea, 0, fi->s1ptw, is_write, fsc); } else { /* * Fields: IL, ISV, SAS, SSE, SRT, SF and AR come from the template @@ -54,7 +54,7 @@ static inline uint32_t merge_syn_data_abort(uint32_t temp= late_syn, */ syn =3D syn_data_abort_with_iss(same_el, 0, 0, 0, 0, 0, - ea, 0, s1ptw, is_write, fsc, + fi->ea, 0, fi->s1ptw, is_write, fsc, true); /* Merge the runtime syndrome with the template syndrome. */ syn |=3D template_syn; @@ -117,9 +117,8 @@ void arm_deliver_fault(ARMCPU *cpu, vaddr addr, syn =3D syn_insn_abort(same_el, fi->ea, fi->s1ptw, fsc); exc =3D EXCP_PREFETCH_ABORT; } else { - syn =3D merge_syn_data_abort(env->exception.syndrome, target_el, - same_el, fi->ea, fi->s1ptw, - access_type =3D=3D MMU_DATA_STORE, + syn =3D merge_syn_data_abort(env->exception.syndrome, fi, target_e= l, + same_el, access_type =3D=3D MMU_DATA_ST= ORE, fsc); if (access_type =3D=3D MMU_DATA_STORE && arm_feature(env, ARM_FEATURE_V6)) { --=20 2.34.1 From nobody Mon Feb 9 04:09:32 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1680274327; cv=none; d=zohomail.com; s=zohoarc; b=nRLhi2bxbaqu8ILHBF0xO1Pogmo0E6EnZkS6Rx7UJEqaLNBVttF6zCmPycObshrjvD882V60LXOZrrAiDwcyWCqZ+9Hc+UHjH7UcolcX+Uzg2WZzXrrPMuq+18WCMB6W2zHwD21crXjY4jzX298L12a+Pt/C+q78n4JbJi+KJLM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1680274327; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Ob8zaLRhLK1pUzR/HANUMOjhD/K+he8dJVxHdozinP4=; b=CXVno61MV2gxVQPkul+GXJG/kmFkmrvk9tzXzfN7IDmUfKBx2kGXDUuFfYsPgggoxNo32xe8CvjAgAvAx0teyZ3GCHlC15SD9otTaX9CrFsKgpyBfkcbJrcwiFxm3LBvIwbRP2rjED3D8KAwux6wkQc4rgo5mOzO4pN1uhMJt6Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1680274327859164.21317576552008; Fri, 31 Mar 2023 07:52:07 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1piG5j-0000cN-Fi; Fri, 31 Mar 2023 10:50:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1piG5c-0000a6-UL for qemu-devel@nongnu.org; Fri, 31 Mar 2023 10:50:53 -0400 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1piG5Z-0000bd-2A for qemu-devel@nongnu.org; Fri, 31 Mar 2023 10:50:52 -0400 Received: by mail-wr1-x42f.google.com with SMTP id j24so22740357wrd.0 for ; Fri, 31 Mar 2023 07:50:48 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id l12-20020a5d560c000000b002cfe685bfd6sm2339831wrv.108.2023.03.31.07.50.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Mar 2023 07:50:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1680274247; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=Ob8zaLRhLK1pUzR/HANUMOjhD/K+he8dJVxHdozinP4=; b=KbmOtAnp8YkA81wg88UGSawrW/IEgo4NEx/o0ANveXBuH5zX+7VdrISCOSdrcictDL bClbIOPwajXZZv6JIo3JYGIkoOJNCb+02z1NZHiLokX0Ak1YPuk3IpXewww5i/OQJW5a xMO9dGYjFg2Ey7yKjOg1Rp39s3qO1B3lPRnQm4irGDOAiwcwkrIXBwTUr0UjsQpzXjLK FHpDsu39OJUrdxPXLy9x/ZORxxR3A/wKBCjP9qxxRPjDn1Upcr7aJ+Pj4xXLBzmwOi1t nc0gwQIy62Q7Ss5/gJkaPhJs9nIZIoT+hPlTedb9+apJstLGW0pptzQwXqhIVZ1g1Q0n DA+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680274247; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ob8zaLRhLK1pUzR/HANUMOjhD/K+he8dJVxHdozinP4=; b=kNC2whXqSWncZarPFHuVXq6tV3sNGhbkZkRWDX20a/uE5/6aR+8okRCfTfMXznUFPr FRmhX4b+ZMs1ZeefjnU5ch8pXScIX3p+rAomHOTzGjNPBFCmU006qThSkIK4eXNyTPcf Y9SNs7m0goWD6vtSZaGS1LZi0FFBRdTIiKnwnkRD/5WnXpjICziSPs8GVvWqSvxIdGjV RuhkeB4ggYlBARIbPcqh/XdTsBvASWQ+xkwtCuxSd4wKE8doRjk8KmFfXyWcHbWXaJ0G /oTWA6D2JVzyp4Vy+bLGom9A2SEttOpoNB1e9q9X0dE0SKUhddSUbVq8bK8zhyT3pUa4 /xFQ== X-Gm-Message-State: AAQBX9eBAaodt7Y7TacylVGkKD8Mwa5dzuljw/Rk7X9qqJGd+9fINaxg zQOh0hxIdNu9wXcYnXt+39nreQ== X-Google-Smtp-Source: AKy350You3xNglYIyhUa70jdk+fRlOPLkdvuYFALPPl983MX0fRhW+cNzfFRqi+mLFAQ6tMujTxbkQ== X-Received: by 2002:a5d:63c1:0:b0:2cf:e8d2:b550 with SMTP id c1-20020a5d63c1000000b002cfe8d2b550mr21365168wrw.14.1680274247651; Fri, 31 Mar 2023 07:50:47 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 2/3] target/arm: Don't set ISV when reporting stage 1 faults in ESR_EL2 Date: Fri, 31 Mar 2023 15:50:44 +0100 Message-Id: <20230331145045.2584941-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230331145045.2584941-1-peter.maydell@linaro.org> References: <20230331145045.2584941-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1680274328288100001 Content-Type: text/plain; charset="utf-8" The syndrome value reported to ESR_EL2 should only contain the detailed instruction syndrome information when the fault has been caused by a stage 2 abort, not when the fault was a stage 1 abort (i.e. caused by execution at EL2). We were getting this wrong and reporting the detailed ISV information all the time. Fix the bug by checking fi->stage2. Add a TODO comment noting the cases where we'll have to come back and revisit this when we implement FEAT_LS64 and friends. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/tcg/tlb_helper.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/target/arm/tcg/tlb_helper.c b/target/arm/tcg/tlb_helper.c index 1a61adb8a68..d5a89bc5141 100644 --- a/target/arm/tcg/tlb_helper.c +++ b/target/arm/tcg/tlb_helper.c @@ -32,8 +32,9 @@ static inline uint32_t merge_syn_data_abort(uint32_t temp= late_syn, uint32_t syn; =20 /* - * ISV is only set for data aborts routed to EL2 and - * never for stage-1 page table walks faulting on stage 2. + * ISV is only set for stage-2 data aborts routed to EL2 and + * never for stage-1 page table walks faulting on stage 2 + * or for stage-1 faults. * * Furthermore, ISV is only set for certain kinds of load/stores. * If the template syndrome does not have ISV set, we should leave @@ -42,8 +43,14 @@ static inline uint32_t merge_syn_data_abort(uint32_t tem= plate_syn, * See ARMv8 specs, D7-1974: * ISS encoding for an exception from a Data Abort, the * ISV field. + * + * TODO: FEAT_LS64/FEAT_LS64_V/FEAT_SL64_ACCDATA: Translation, + * Access Flag, and Permission faults caused by LD64B, ST64B, + * ST64BV, or ST64BV0 insns report syndrome info even for stage-1 + * faults and regardless of the target EL. */ - if (!(template_syn & ARM_EL_ISV) || target_el !=3D 2 || fi->s1ptw) { + if (!(template_syn & ARM_EL_ISV) || target_el !=3D 2 + || fi->s1ptw || !fi->stage2) { syn =3D syn_data_abort_no_iss(same_el, 0, fi->ea, 0, fi->s1ptw, is_write, fsc); } else { --=20 2.34.1 From nobody Mon Feb 9 04:09:32 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1680274315; cv=none; d=zohomail.com; s=zohoarc; b=AhvRcfF75JpLz2fsZMlQaJ9lGrioxRnMwlwg9ZlYmYjU7zrEwDgl86ymtzlXdHiVp/fq/3uMLuVfYX2QLYhSnTOPA55fh3HUTcovCFWPSpdAWrqBLyJMAe+0OB+riq4j0bbvh2U5Vj4y2mNvEStxXUhcUP8Tt+y8yR0fQsQFEd8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1680274315; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=aMsJpOiutF8EzuYcJAT/HhM6ChC4opwqxSHP+TBtq/M=; b=XVMKJE4aDO0C7Mc6XMJvlGP/MtknF7BlNve5hatP9QSDCIxpE7bTdI1/gcibcJ6RKxJoJ0wL6xFNmF+YnNhutkOeeAyQYOFK1VlK5rcDM0YcjA9Fr65gUDgAPWMwEsqlcO6HHEqIA4y/T3OQnLjWAWdgUnL3bOA5sDsW2lq0Qyk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1680274315482759.2448535214022; Fri, 31 Mar 2023 07:51:55 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1piG5h-0000b3-Tq; Fri, 31 Mar 2023 10:50:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1piG5d-0000a7-4i for qemu-devel@nongnu.org; Fri, 31 Mar 2023 10:50:53 -0400 Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1piG5Z-0000bl-9O for qemu-devel@nongnu.org; Fri, 31 Mar 2023 10:50:52 -0400 Received: by mail-wr1-x42e.google.com with SMTP id e18so22690624wra.9 for ; Fri, 31 Mar 2023 07:50:48 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id l12-20020a5d560c000000b002cfe685bfd6sm2339831wrv.108.2023.03.31.07.50.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Mar 2023 07:50:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1680274248; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=aMsJpOiutF8EzuYcJAT/HhM6ChC4opwqxSHP+TBtq/M=; b=nwn8Qs8JNNLY3nGW4c4MGpvxPMJJO3q7h9TngWbPGG1PUcpVET5Zry4Xz1TcEA4RmR AHu5tP6X1XcPQcZJ6Zs8sO/htvUGIEpl9+03+6ixRiYDcpJAbbuKIFwEz6RSb6pjJ4Bh 7/rYw7nB3VA8EWq4f7S3slaKaP39hL02SQnWmO0OMh+VBy+69gOaAbRs46LMjW1R2AVr CxXAOcYvSCbcAURTXRr1B/cSVEQXsXY8O3Wdxcww2P8f3q4rTfH+rHG3bXHCdWkDsbb5 QjX/qGZzlPznbIumCha+sqzQUNNYIe3UNbZOXxhH6DjmJ/5xjg+N0ZtgRWg85ZiMqBxI F30Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680274248; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=aMsJpOiutF8EzuYcJAT/HhM6ChC4opwqxSHP+TBtq/M=; b=sSbDHuLpTfaKhZJFVGqJB9uzJiBhICSX0Z2mjNssP70QUYXG/EiHOyXwk+CHpCYgNi 6CvF26dr6kbi0BfFNw5Ea9eDusF2PFpzcif0e602kD54ftn9CYTO6/bcSxsVde4ahytO psywcAyVExiqjXIY3omGVKZ9jPr51jBADdKVvosQ/74PblyHkRKhRS/Ugdi/ufY5RsPj ow5JF5DNtdUHUO0/XNL/WZJZSlcV7a6yIdX98e9fruPXpiYg1ay0TIyoK/ci2ljgaddZ IzY6Iju4Zbx7WAfEr5PuXdKI5EA6C+s4Zs89jry92z/cV5mEuFsmqWOriIJKzduQVv0r S2qA== X-Gm-Message-State: AAQBX9f5XRDMuEzRUF1h/wvgb2UXACBvWWxFFgLYdFvbqHH4rX9tPpnN fCMvOaIPTkypV9/EVfd93ddLgNgRyASpZo56v/k= X-Google-Smtp-Source: AKy350Zgn14Ne3CUi7Ioc2ov4GVW7QBnYTcisGS4pnjmJx9RGgVHvpqnWN64W/75UEqCeESeHaRasA== X-Received: by 2002:a5d:440e:0:b0:2e5:6441:2d16 with SMTP id z14-20020a5d440e000000b002e564412d16mr2610695wrq.42.1680274248009; Fri, 31 Mar 2023 07:50:48 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 3/3] target/arm: Implement FEAT_PAN3 Date: Fri, 31 Mar 2023 15:50:45 +0100 Message-Id: <20230331145045.2584941-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230331145045.2584941-1-peter.maydell@linaro.org> References: <20230331145045.2584941-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1680274316325100002 Content-Type: text/plain; charset="utf-8" FEAT_PAN3 adds an EPAN bit to SCTLR_EL1 and SCTLR_EL2, which allows the PAN bit to make memory non-privileged-read/write if it is user-executable as well as if it is user-read/write. Implement this feature and enable it in the AArch64 'max' CPU. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- docs/system/arm/emulation.rst | 1 + target/arm/cpu.h | 5 +++++ target/arm/cpu64.c | 2 +- target/arm/ptw.c | 14 +++++++++++++- 4 files changed, 20 insertions(+), 2 deletions(-) diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst index 2062d712610..73389878755 100644 --- a/docs/system/arm/emulation.rst +++ b/docs/system/arm/emulation.rst @@ -56,6 +56,7 @@ the following architecture extensions: - FEAT_MTE3 (MTE Asymmetric Fault Handling) - FEAT_PAN (Privileged access never) - FEAT_PAN2 (AT S1E1R and AT S1E1W instruction variants affected by PSTATE= .PAN) +- FEAT_PAN3 (Support for SCTLR_ELx.EPAN) - FEAT_PAuth (Pointer authentication) - FEAT_PMULL (PMULL, PMULL2 instructions) - FEAT_PMUv3p1 (PMU Extensions v3.1) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index c097cae9882..d469a2637b3 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3823,6 +3823,11 @@ static inline bool isar_feature_aa64_ats1e1(const AR= MISARegisters *id) return FIELD_EX64(id->id_aa64mmfr1, ID_AA64MMFR1, PAN) >=3D 2; } =20 +static inline bool isar_feature_aa64_pan3(const ARMISARegisters *id) +{ + return FIELD_EX64(id->id_aa64mmfr1, ID_AA64MMFR1, PAN) >=3D 3; +} + static inline bool isar_feature_aa64_hcx(const ARMISARegisters *id) { return FIELD_EX64(id->id_aa64mmfr1, ID_AA64MMFR1, HCX) !=3D 0; diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 0fb07cc7b6d..735ca541634 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -1302,7 +1302,7 @@ static void aarch64_max_initfn(Object *obj) t =3D FIELD_DP64(t, ID_AA64MMFR1, VH, 1); /* FEAT_VHE */ t =3D FIELD_DP64(t, ID_AA64MMFR1, HPDS, 1); /* FEAT_HPDS */ t =3D FIELD_DP64(t, ID_AA64MMFR1, LO, 1); /* FEAT_LOR */ - t =3D FIELD_DP64(t, ID_AA64MMFR1, PAN, 2); /* FEAT_PAN2 */ + t =3D FIELD_DP64(t, ID_AA64MMFR1, PAN, 3); /* FEAT_PAN3 */ t =3D FIELD_DP64(t, ID_AA64MMFR1, XNX, 1); /* FEAT_XNX */ t =3D FIELD_DP64(t, ID_AA64MMFR1, ETS, 1); /* FEAT_ETS */ t =3D FIELD_DP64(t, ID_AA64MMFR1, HCX, 1); /* FEAT_HCX */ diff --git a/target/arm/ptw.c b/target/arm/ptw.c index ec3f51782aa..499308fcb07 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -947,6 +947,7 @@ static int get_S2prot(CPUARMState *env, int s2ap, int x= n, bool s1_is_el0) static int get_S1prot(CPUARMState *env, ARMMMUIdx mmu_idx, bool is_aa64, int ap, int ns, int xn, int pxn) { + ARMCPU *cpu =3D env_archcpu(env); bool is_user =3D regime_is_user(env, mmu_idx); int prot_rw, user_rw; bool have_wxn; @@ -958,8 +959,19 @@ static int get_S1prot(CPUARMState *env, ARMMMUIdx mmu_= idx, bool is_aa64, if (is_user) { prot_rw =3D user_rw; } else { + /* + * PAN controls can forbid data accesses but don't affect insn fet= ch. + * Plain PAN forbids data accesses if EL0 has data permissions; + * PAN3 forbids data accesses if EL0 has either data or exec perms. + * Note that for AArch64 the 'user can exec' case is exactly !xn. + * We make the IMPDEF choices that SCR_EL3.SIF and Realm EL2&0 + * do not affect EPAN. + */ if (user_rw && regime_is_pan(env, mmu_idx)) { - /* PAN forbids data accesses but doesn't affect insn fetch */ + prot_rw =3D 0; + } else if (cpu_isar_feature(aa64_pan3, cpu) && is_aa64 && + regime_is_pan(env, mmu_idx) && + (regime_sctlr(env, mmu_idx) & SCTLR_EPAN) && !xn) { prot_rw =3D 0; } else { prot_rw =3D simple_ap_to_rw_prot_is_user(ap, false); --=20 2.34.1