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bh=l1VHQkrxeP/g776iWJsEbqjwCZxWlm7gYyRqf5Qdst8=; b=eJ4/ZDZQcAl6UQvdHZbf0XM1XjR3RJSTgqoVBvkyJbcGjnJ9Sb+q7sTY08SOS7qFtYvjwZ gXItqDlOKcV2PcPgS9rapasZ2OPDEor1ATbJSoxCAufEP/CoAUoHiwMFbQAGsUO0QAXWkx SY1TNNGdoUjFpphrmi1RuOb0GAs2kHE= X-MC-Unique: jSeJQsfzNbeyvJyiWSqu9g-1 From: Thomas Huth To: Peter Maydell , qemu-devel@nongnu.org Cc: Ilya Leoshkevich , Nina Schoetterl-Glausch , David Hildenbrand Subject: [PULL 02/24] target/s390x: Fix LPSW Date: Mon, 20 Mar 2023 14:03:08 +0100 Message-Id: <20230320130330.406378-3-thuth@redhat.com> In-Reply-To: <20230320130330.406378-1-thuth@redhat.com> References: <20230320130330.406378-1-thuth@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.1 on 10.11.54.8 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=thuth@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1679317585587100002 Content-Type: text/plain; charset="utf-8" From: Ilya Leoshkevich Currently LPSW does not invert the mask bit 12 and incorrectly copies the BA bit into the address. Fix by generating code similar to what s390_cpu_load_normal() does. Reported-by: Nina Schoetterl-Glausch Co-developed-by: Nina Schoetterl-Glausch Signed-off-by: Ilya Leoshkevich Reviewed-by: David Hildenbrand Message-Id: <20230315020408.384766-2-iii@linux.ibm.com> Signed-off-by: Thomas Huth --- target/s390x/tcg/translate.c | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 14c3896d52..2e1e7e046a 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -2910,19 +2910,21 @@ static DisasJumpType op_lpp(DisasContext *s, DisasO= ps *o) =20 static DisasJumpType op_lpsw(DisasContext *s, DisasOps *o) { - TCGv_i64 t1, t2; + TCGv_i64 mask, addr; =20 per_breaking_event(s); =20 - t1 =3D tcg_temp_new_i64(); - t2 =3D tcg_temp_new_i64(); - tcg_gen_qemu_ld_i64(t1, o->in2, get_mem_index(s), - MO_TEUL | MO_ALIGN_8); - tcg_gen_addi_i64(o->in2, o->in2, 4); - tcg_gen_qemu_ld32u(t2, o->in2, get_mem_index(s)); - /* Convert the 32-bit PSW_MASK into the 64-bit PSW_MASK. */ - tcg_gen_shli_i64(t1, t1, 32); - gen_helper_load_psw(cpu_env, t1, t2); + /* + * Convert the short PSW into the normal PSW, similar to what + * s390_cpu_load_normal() does. + */ + mask =3D tcg_temp_new_i64(); + addr =3D tcg_temp_new_i64(); + tcg_gen_qemu_ld_i64(mask, o->in2, get_mem_index(s), MO_TEUQ | MO_ALIGN= _8); + tcg_gen_andi_i64(addr, mask, PSW_MASK_SHORT_ADDR); + tcg_gen_andi_i64(mask, mask, PSW_MASK_SHORT_CTRL); + tcg_gen_xori_i64(mask, mask, PSW_MASK_SHORTPSW); + gen_helper_load_psw(cpu_env, mask, addr); return DISAS_NORETURN; } =20 --=20 2.31.1