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([2602:ae:154a:9f01:b1e0:bfd9:8b1a:efeb]) by smtp.gmail.com with ESMTPSA id z4-20020a63e544000000b00502fd70b0bdsm8080441pgj.52.2023.03.07.10.02.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Mar 2023 10:02:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678212151; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HqVYTGWT7jeQfdWYdhIL5u6To2oyL4lphfw9D9/1xXA=; b=orErRXQlSKyjl7CqloHs/lubCy6ze1a29pVvI7b02zk5TRDYqACj1qWHR3C7eDRZx5 J2/L/yB27coaXZOcHERdvRR5DL31vPQNco1P2DP/TvcTEtRuWHl+5uSblrUDjnPqghWH kgYaa8Cc+Uhv83dK0bn9CtwyobVDuYsO5jusvEOIy50A2MkPtM1QtTL/AYLVf8LLW+0o d3s1KVaGAsr0oLLfXKeiQgSw4sgcR6bc0L0NYHNj8x0z9cmCQ583ng9NR+JicIJwzXiH Cma+dtderHE0oHPpJMeixr9fYh+IrXpZUKpvLoysjoHcUBxMqqdt1PJ4VHn9kpLklzO1 R8Rg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678212151; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HqVYTGWT7jeQfdWYdhIL5u6To2oyL4lphfw9D9/1xXA=; b=xSTMVqqup7n/t+kUCDKZudr9Mk9gU4ES0LjXCT1+eglrubGnuLf1EaTOH2k+VlvUkE 0H5SWf0EmbHOp8sFSGZhHo/ntFWSCffNXAcdLAPOdUKDyLf854mw2H5ZgAoWN4+70b7X bOxOAwgGAz/DWnuO3zzx/iAqaPlnYslgRfP++tyQqnqtQNSME/AF+qlJswp3j0j/Jj42 W50jv/wYyIvp6yTYBxQZ4jZRA36dM1XViymAVV4vB9TnOyWoD8rovqQSzwAu8AsL3z9v O+jd35Gk8N7L10TgV/KRvHxoPueoCAlj8oxXLxx8urs6EgA72wTZ5wnAAZZVl35O1s0l uHzQ== X-Gm-Message-State: AO0yUKW2l5+wsW0XSpMPwkmqTlvJlKqBIGM3r9xrX1bEqC48CPqPLphM R3Or8aXGkTsJ/Zghq9lpRaeS6F/4VqqoC+LDx6E= X-Google-Smtp-Source: AK7set99iNAc4SoKX83yxrv0A+cA5bvBk+nnBnh9w1kD7p94/nVIG7D7nJgNu28onA14Fjyy10SwWg== X-Received: by 2002:a05:6a20:3d05:b0:cd:9da2:ebed with SMTP id y5-20020a056a203d0500b000cd9da2ebedmr19051042pzi.43.1678212151370; Tue, 07 Mar 2023 10:02:31 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 52/67] target/ppc: Split out gen_vx_vmul10 Date: Tue, 7 Mar 2023 09:58:33 -0800 Message-Id: <20230307175848.2508955-53-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230307175848.2508955-1-richard.henderson@linaro.org> References: <20230307175848.2508955-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1034.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1678212202809100005 Move the body out of this large macro. Use tcg_constant_i64. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- target/ppc/translate/vmx-impl.c.inc | 95 +++++++++++++++-------------- 1 file changed, 49 insertions(+), 46 deletions(-) diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx= -impl.c.inc index 05ba9c9492..ee656d6a44 100644 --- a/target/ppc/translate/vmx-impl.c.inc +++ b/target/ppc/translate/vmx-impl.c.inc @@ -171,53 +171,56 @@ static void gen_mtvscr(DisasContext *ctx) gen_helper_mtvscr(cpu_env, val); } =20 +static void gen_vx_vmul10(DisasContext *ctx, bool add_cin, bool ret_carry) +{ + TCGv_i64 t0; + TCGv_i64 t1; + TCGv_i64 t2; + TCGv_i64 avr; + TCGv_i64 ten, z; + + if (unlikely(!ctx->altivec_enabled)) { + gen_exception(ctx, POWERPC_EXCP_VPU); + return; + } + + t0 =3D tcg_temp_new_i64(); + t1 =3D tcg_temp_new_i64(); + t2 =3D tcg_temp_new_i64(); + avr =3D tcg_temp_new_i64(); + ten =3D tcg_constant_i64(10); + z =3D tcg_constant_i64(0); + + if (add_cin) { + get_avr64(avr, rA(ctx->opcode), false); + tcg_gen_mulu2_i64(t0, t1, avr, ten); + get_avr64(avr, rB(ctx->opcode), false); + tcg_gen_andi_i64(t2, avr, 0xF); + tcg_gen_add2_i64(avr, t2, t0, t1, t2, z); + set_avr64(rD(ctx->opcode), avr, false); + } else { + get_avr64(avr, rA(ctx->opcode), false); + tcg_gen_mulu2_i64(avr, t2, avr, ten); + set_avr64(rD(ctx->opcode), avr, false); + } + + if (ret_carry) { + get_avr64(avr, rA(ctx->opcode), true); + tcg_gen_mulu2_i64(t0, t1, avr, ten); + tcg_gen_add2_i64(t0, avr, t0, t1, t2, z); + set_avr64(rD(ctx->opcode), avr, false); + set_avr64(rD(ctx->opcode), z, true); + } else { + get_avr64(avr, rA(ctx->opcode), true); + tcg_gen_mul_i64(t0, avr, ten); + tcg_gen_add_i64(avr, t0, t2); + set_avr64(rD(ctx->opcode), avr, true); + } +} + #define GEN_VX_VMUL10(name, add_cin, ret_carry) \ -static void glue(gen_, name)(DisasContext *ctx) \ -{ \ - TCGv_i64 t0; \ - TCGv_i64 t1; \ - TCGv_i64 t2; \ - TCGv_i64 avr; \ - TCGv_i64 ten, z; \ - \ - if (unlikely(!ctx->altivec_enabled)) { \ - gen_exception(ctx, POWERPC_EXCP_VPU); \ - return; \ - } \ - \ - t0 =3D tcg_temp_new_i64(); \ - t1 =3D tcg_temp_new_i64(); \ - t2 =3D tcg_temp_new_i64(); \ - avr =3D tcg_temp_new_i64(); \ - ten =3D tcg_const_i64(10); \ - z =3D tcg_const_i64(0); \ - \ - if (add_cin) { \ - get_avr64(avr, rA(ctx->opcode), false); \ - tcg_gen_mulu2_i64(t0, t1, avr, ten); \ - get_avr64(avr, rB(ctx->opcode), false); \ - tcg_gen_andi_i64(t2, avr, 0xF); \ - tcg_gen_add2_i64(avr, t2, t0, t1, t2, z); \ - set_avr64(rD(ctx->opcode), avr, false); \ - } else { \ - get_avr64(avr, rA(ctx->opcode), false); \ - tcg_gen_mulu2_i64(avr, t2, avr, ten); \ - set_avr64(rD(ctx->opcode), avr, false); \ - } \ - \ - if (ret_carry) { \ - get_avr64(avr, rA(ctx->opcode), true); \ - tcg_gen_mulu2_i64(t0, t1, avr, ten); \ - tcg_gen_add2_i64(t0, avr, t0, t1, t2, z); \ - set_avr64(rD(ctx->opcode), avr, false); \ - set_avr64(rD(ctx->opcode), z, true); \ - } else { \ - get_avr64(avr, rA(ctx->opcode), true); \ - tcg_gen_mul_i64(t0, avr, ten); \ - tcg_gen_add_i64(avr, t0, t2); \ - set_avr64(rD(ctx->opcode), avr, true); \ - } \ -} \ + static void glue(gen_, name)(DisasContext *ctx) \ + { gen_vx_vmul10(ctx, add_cin, ret_carry); } =20 GEN_VX_VMUL10(vmul10uq, 0, 0); GEN_VX_VMUL10(vmul10euq, 1, 0); --=20 2.34.1