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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=tsimpson@qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @quicinc.com) X-ZM-MESSAGEID: 1678167341103100014 The F2_sffms instruction [r0 -=3D sfmpy(r1, r2)] doesn't properly handle -0. Previously we would negate the input operand by subtracting from zero. Instead, we negate by changing the sign bit. Test case added to tests/tcg/hexagon/fpstuff.c Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson Message-Id: <20230307025828.1612809-12-tsimpson@quicinc.com> --- target/hexagon/op_helper.c | 2 +- tests/tcg/hexagon/fpstuff.c | 31 ++++++++++++++++++++++++++++++- 2 files changed, 31 insertions(+), 2 deletions(-) diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c index 38b8aee193..9425941c69 100644 --- a/target/hexagon/op_helper.c +++ b/target/hexagon/op_helper.c @@ -1169,7 +1169,7 @@ float32 HELPER(sffms)(CPUHexagonState *env, float32 R= xV, { float32 neg_RsV; arch_fpop_start(env); - neg_RsV =3D float32_sub(float32_zero, RsV, &env->fp_status); + neg_RsV =3D float32_set_sign(RsV, float32_is_neg(RsV) ? 0 : 1); RxV =3D internal_fmafx(neg_RsV, RtV, RxV, 0, &env->fp_status); arch_fpop_end(env); return RxV; diff --git a/tests/tcg/hexagon/fpstuff.c b/tests/tcg/hexagon/fpstuff.c index 56bf562a40..90ce9a6ef3 100644 --- a/tests/tcg/hexagon/fpstuff.c +++ b/tests/tcg/hexagon/fpstuff.c @@ -1,5 +1,5 @@ /* - * Copyright(c) 2020-2022 Qualcomm Innovation Center, Inc. All Rights Res= erved. + * Copyright(c) 2020-2023 Qualcomm Innovation Center, Inc. All Rights Res= erved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -40,6 +40,7 @@ const int SF_HEX_NAN =3D 0xffffffff; const int SF_small_neg =3D 0xab98fba8; const int SF_denorm =3D 0x00000001; const int SF_random =3D 0x346001d6; +const int SF_neg_zero =3D 0x80000000; =20 const long long DF_QNaN =3D 0x7ff8000000000000ULL; const long long DF_SNaN =3D 0x7ff7000000000000ULL; @@ -536,6 +537,33 @@ static void check_sffixupd(void) check32(result, 0x146001d6); } =20 +static void check_sffms(void) +{ + int result; + + /* Check that sffms properly deals with -0 */ + result =3D SF_neg_zero; + asm ("%0 -=3D sfmpy(%1 , %2)\n\t" + : "+r"(result) + : "r"(SF_ZERO), "r"(SF_ZERO) + : "r12", "r8"); + check32(result, SF_neg_zero); + + result =3D SF_ZERO; + asm ("%0 -=3D sfmpy(%1 , %2)\n\t" + : "+r"(result) + : "r"(SF_neg_zero), "r"(SF_ZERO) + : "r12", "r8"); + check32(result, SF_ZERO); + + result =3D SF_ZERO; + asm ("%0 -=3D sfmpy(%1 , %2)\n\t" + : "+r"(result) + : "r"(SF_ZERO), "r"(SF_neg_zero) + : "r12", "r8"); + check32(result, SF_ZERO); +} + static void check_float2int_convs() { int res32; @@ -688,6 +716,7 @@ int main() check_invsqrta(); check_sffixupn(); check_sffixupd(); + check_sffms(); check_float2int_convs(); =20 puts(err ? "FAIL" : "PASS"); --=20 2.25.1