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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org,
Max Filippov <jcmvbkbc@gmail.com>
Subject: [PULL 84/84] target/xtensa: Avoid tcg_const_i32
Date: Sun, 5 Mar 2023 16:39:54 -0800
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All remaining uses are strictly read-only.
Reviewed-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/xtensa/translate.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
index f906ba7ed5..0cf3075649 100644
--- a/target/xtensa/translate.c
+++ b/target/xtensa/translate.c
@@ -1361,7 +1361,7 @@ static void translate_all(DisasContext *dc, const Opc=
odeArg arg[],
const uint32_t par[])
{
uint32_t shift =3D par[1];
- TCGv_i32 mask =3D tcg_const_i32(((1 << shift) - 1) << arg[1].imm);
+ TCGv_i32 mask =3D tcg_constant_i32(((1 << shift) - 1) << arg[1].imm);
TCGv_i32 tmp =3D tcg_temp_new_i32();
=20
tcg_gen_and_i32(tmp, arg[1].in, mask);
@@ -1489,7 +1489,7 @@ static void translate_call0(DisasContext *dc, const O=
pcodeArg arg[],
static void translate_callw(DisasContext *dc, const OpcodeArg arg[],
const uint32_t par[])
{
- TCGv_i32 tmp =3D tcg_const_i32(arg[0].imm);
+ TCGv_i32 tmp =3D tcg_constant_i32(arg[0].imm);
gen_callw_slot(dc, par[0], tmp, adjust_jump_slot(dc, arg[0].imm, 0));
}
=20
@@ -1537,7 +1537,7 @@ static void translate_clrex(DisasContext *dc, const O=
pcodeArg arg[],
static void translate_const16(DisasContext *dc, const OpcodeArg arg[],
const uint32_t par[])
{
- TCGv_i32 c =3D tcg_const_i32(arg[1].imm);
+ TCGv_i32 c =3D tcg_constant_i32(arg[1].imm);
=20
tcg_gen_deposit_i32(arg[0].out, c, arg[0].in, 16, 16);
}
--=20
2.34.1