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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org,
Max Filippov <jcmvbkbc@gmail.com>
Subject: [PULL 60/84] target/xtensa: Drop reset_sar_tracker
Date: Sun, 5 Mar 2023 16:39:30 -0800
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Translators are no longer required to free tcg temporaries.
Remove sar_m32_allocated, as sar_m32 non-null is equivalent.
Reviewed-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/xtensa/translate.c | 14 ++------------
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
index 4af0650deb..910350dec6 100644
--- a/target/xtensa/translate.c
+++ b/target/xtensa/translate.c
@@ -57,7 +57,6 @@ struct DisasContext {
=20
bool sar_5bit;
bool sar_m32_5bit;
- bool sar_m32_allocated;
TCGv_i32 sar_m32;
=20
unsigned window;
@@ -284,14 +283,7 @@ static void init_sar_tracker(DisasContext *dc)
{
dc->sar_5bit =3D false;
dc->sar_m32_5bit =3D false;
- dc->sar_m32_allocated =3D false;
-}
-
-static void reset_sar_tracker(DisasContext *dc)
-{
- if (dc->sar_m32_allocated) {
- tcg_temp_free(dc->sar_m32);
- }
+ dc->sar_m32 =3D NULL;
}
=20
static void gen_right_shift_sar(DisasContext *dc, TCGv_i32 sa)
@@ -306,9 +298,8 @@ static void gen_right_shift_sar(DisasContext *dc, TCGv_=
i32 sa)
=20
static void gen_left_shift_sar(DisasContext *dc, TCGv_i32 sa)
{
- if (!dc->sar_m32_allocated) {
+ if (!dc->sar_m32) {
dc->sar_m32 =3D tcg_temp_new_i32();
- dc->sar_m32_allocated =3D true;
}
tcg_gen_andi_i32(dc->sar_m32, sa, 0x1f);
tcg_gen_sub_i32(cpu_SR[SAR], tcg_constant_i32(32), dc->sar_m32);
@@ -1247,7 +1238,6 @@ static void xtensa_tr_tb_stop(DisasContextBase *dcbas=
e, CPUState *cpu)
{
DisasContext *dc =3D container_of(dcbase, DisasContext, base);
=20
- reset_sar_tracker(dc);
if (dc->icount) {
tcg_temp_free(dc->next_icount);
}
--=20
2.34.1