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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1677508087865100003 From: BALATON Zoltan Signed-off-by: BALATON Zoltan Reviewed-by: Peter Maydell Message-Id: Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/usb/hcd-ohci.c | 106 ++++++++++++++++++++++++++-------------------- 1 file changed, 60 insertions(+), 46 deletions(-) diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c index 9d6bb8312e..b7877866f6 100644 --- a/hw/usb/hcd-ohci.c +++ b/hw/usb/hcd-ohci.c @@ -499,9 +499,9 @@ static int ohci_copy_td(OHCIState *ohci, struct ohci_td= *td, =20 ptr =3D td->cbp; n =3D 0x1000 - (ptr & 0xfff); - if (n > len) + if (n > len) { n =3D len; - + } if (dma_memory_rw(ohci->as, ptr + ohci->localmem_base, buf, n, dir, MEMTXATTRS_UNSPECIFIED)) { return -1; @@ -527,9 +527,9 @@ static int ohci_copy_iso_td(OHCIState *ohci, =20 ptr =3D start_addr; n =3D 0x1000 - (ptr & 0xfff); - if (n > len) + if (n > len) { n =3D len; - + } if (dma_memory_rw(ohci->as, ptr + ohci->localmem_base, buf, n, dir, MEMTXATTRS_UNSPECIFIED)) { return -1; @@ -617,8 +617,9 @@ static int ohci_service_iso_td(OHCIState *ohci, struct = ohci_ed *ed) iso_td.next =3D ohci->done; ohci->done =3D addr; i =3D OHCI_BM(iso_td.flags, TD_DI); - if (i < ohci->done_count) + if (i < ohci->done_count) { ohci->done_count =3D i; + } if (ohci_put_iso_td(ohci, addr, &iso_td)) { ohci_die(ohci); return 1; @@ -803,8 +804,9 @@ static int ohci_service_iso_td(OHCIState *ohci, struct = ohci_ed *ed) iso_td.next =3D ohci->done; ohci->done =3D addr; i =3D OHCI_BM(iso_td.flags, TD_DI); - if (i < ohci->done_count) + if (i < ohci->done_count) { ohci->done_count =3D i; + } } if (ohci_put_iso_td(ohci, addr, &iso_td)) { ohci_die(ohci); @@ -1022,8 +1024,9 @@ static int ohci_service_td(OHCIState *ohci, struct oh= ci_ed *ed) =20 /* Setting ED_C is part of the TD retirement process */ ed->head &=3D ~OHCI_ED_C; - if (td.flags & OHCI_TD_T0) + if (td.flags & OHCI_TD_T0) { ed->head |=3D OHCI_ED_C; + } } else { if (ret >=3D 0) { trace_usb_ohci_td_underrun(); @@ -1067,8 +1070,9 @@ static int ohci_service_td(OHCIState *ohci, struct oh= ci_ed *ed) td.next =3D ohci->done; ohci->done =3D addr; i =3D OHCI_BM(td.flags, TD_DI); - if (i < ohci->done_count) + if (i < ohci->done_count) { ohci->done_count =3D i; + } exit_no_retire: if (ohci_put_td(ohci, addr, &td)) { ohci_die(ohci); @@ -1087,9 +1091,9 @@ static int ohci_service_ed_list(OHCIState *ohci, uint= 32_t head) uint32_t link_cnt =3D 0; active =3D 0; =20 - if (head =3D=3D 0) + if (head =3D=3D 0) { return 0; - + } for (cur =3D head; cur && link_cnt++ < ED_LINK_LIMIT; cur =3D next_ed)= { if (ohci_read_ed(ohci, cur, &ed)) { trace_usb_ohci_ed_read_error(cur); @@ -1125,8 +1129,9 @@ static int ohci_service_ed_list(OHCIState *ohci, uint= 32_t head) active =3D 1; =20 if ((ed.flags & OHCI_ED_F) =3D=3D 0) { - if (ohci_service_td(ohci, &ed)) + if (ohci_service_td(ohci, &ed)) { break; + } } else { /* Handle isochronous endpoints */ if (ohci_service_iso_td(ohci, &ed)) { @@ -1218,19 +1223,21 @@ static void ohci_frame_boundary(void *opaque) hcca.frame =3D cpu_to_le16(ohci->frame_number); =20 if (ohci->done_count =3D=3D 0 && !(ohci->intr_status & OHCI_INTR_WD)) { - if (!ohci->done) + if (!ohci->done) { abort(); - if (ohci->intr & ohci->intr_status) + } + if (ohci->intr & ohci->intr_status) { ohci->done |=3D 1; + } hcca.done =3D cpu_to_le32(ohci->done); ohci->done =3D 0; ohci->done_count =3D 7; ohci_set_interrupt(ohci, OHCI_INTR_WD); } =20 - if (ohci->done_count !=3D 7 && ohci->done_count !=3D 0) + if (ohci->done_count !=3D 7 && ohci->done_count !=3D 0) { ohci->done_count--; - + } /* Do SOF stuff here */ ohci_sof(ohci); =20 @@ -1273,9 +1280,9 @@ static int ohci_port_set_if_connected(OHCIState *ohci= , int i, uint32_t val) int ret =3D 1; =20 /* writing a 0 has no effect */ - if (val =3D=3D 0) + if (val =3D=3D 0) { return 0; - + } /* If CurrentConnectStatus is cleared we set ConnectStatusChange */ if (!(ohci->rhport[i].ctrl & OHCI_PORT_CCS)) { ohci->rhport[i].ctrl |=3D OHCI_PORT_CSC; @@ -1285,9 +1292,9 @@ static int ohci_port_set_if_connected(OHCIState *ohci= , int i, uint32_t val) return 0; } =20 - if (ohci->rhport[i].ctrl & val) + if (ohci->rhport[i].ctrl & val) { ret =3D 0; - + } /* set the bit */ ohci->rhport[i].ctrl |=3D val; =20 @@ -1327,9 +1334,9 @@ static void ohci_set_ctl(OHCIState *ohci, uint32_t va= l) new_state =3D ohci->ctl & OHCI_CTL_HCFS; =20 /* no state change */ - if (old_state =3D=3D new_state) + if (old_state =3D=3D new_state) { return; - + } trace_usb_ohci_set_ctl(ohci->name, new_state); switch (new_state) { case OHCI_USB_OPERATIONAL: @@ -1355,9 +1362,9 @@ static uint32_t ohci_get_frame_remaining(OHCIState *o= hci) uint16_t fr; int64_t tks; =20 - if ((ohci->ctl & OHCI_CTL_HCFS) !=3D OHCI_USB_OPERATIONAL) - return (ohci->frt << 31); - + if ((ohci->ctl & OHCI_CTL_HCFS) !=3D OHCI_USB_OPERATIONAL) { + return ohci->frt << 31; + } /* Being in USB operational state guarnatees sof_time was set already.= */ tks =3D qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - ohci->sof_time; if (tks < 0) { @@ -1365,9 +1372,9 @@ static uint32_t ohci_get_frame_remaining(OHCIState *o= hci) } =20 /* avoid muldiv if possible */ - if (tks >=3D usb_frame_time) - return (ohci->frt << 31); - + if (tks >=3D usb_frame_time) { + return ohci->frt << 31; + } tks =3D tks / usb_bit_time; fr =3D (uint16_t)(ohci->fi - tks); =20 @@ -1383,33 +1390,36 @@ static void ohci_set_hub_status(OHCIState *ohci, ui= nt32_t val) old_state =3D ohci->rhstatus; =20 /* write 1 to clear OCIC */ - if (val & OHCI_RHS_OCIC) + if (val & OHCI_RHS_OCIC) { ohci->rhstatus &=3D ~OHCI_RHS_OCIC; - + } if (val & OHCI_RHS_LPS) { int i; =20 - for (i =3D 0; i < ohci->num_ports; i++) + for (i =3D 0; i < ohci->num_ports; i++) { ohci_port_power(ohci, i, 0); + } trace_usb_ohci_hub_power_down(); } =20 if (val & OHCI_RHS_LPSC) { int i; =20 - for (i =3D 0; i < ohci->num_ports; i++) + for (i =3D 0; i < ohci->num_ports; i++) { ohci_port_power(ohci, i, 1); + } trace_usb_ohci_hub_power_up(); } =20 - if (val & OHCI_RHS_DRWE) + if (val & OHCI_RHS_DRWE) { ohci->rhstatus |=3D OHCI_RHS_DRWE; - - if (val & OHCI_RHS_CRWE) + } + if (val & OHCI_RHS_CRWE) { ohci->rhstatus &=3D ~OHCI_RHS_DRWE; - - if (old_state !=3D ohci->rhstatus) + } + if (old_state !=3D ohci->rhstatus) { ohci_set_interrupt(ohci, OHCI_INTR_RHSC); + } } =20 /* Set root hub port status */ @@ -1422,12 +1432,12 @@ static void ohci_port_set_status(OHCIState *ohci, i= nt portnum, uint32_t val) old_state =3D port->ctrl; =20 /* Write to clear CSC, PESC, PSSC, OCIC, PRSC */ - if (val & OHCI_PORT_WTC) + if (val & OHCI_PORT_WTC) { port->ctrl &=3D ~(val & OHCI_PORT_WTC); - - if (val & OHCI_PORT_CCS) + } + if (val & OHCI_PORT_CCS) { port->ctrl &=3D ~OHCI_PORT_PES; - + } ohci_port_set_if_connected(ohci, portnum, val & OHCI_PORT_PES); =20 if (ohci_port_set_if_connected(ohci, portnum, val & OHCI_PORT_PSS)) { @@ -1443,13 +1453,15 @@ static void ohci_port_set_status(OHCIState *ohci, i= nt portnum, uint32_t val) } =20 /* Invert order here to ensure in ambiguous case, device is powered up= . */ - if (val & OHCI_PORT_LSDA) + if (val & OHCI_PORT_LSDA) { ohci_port_power(ohci, portnum, 0); - if (val & OHCI_PORT_PPS) + } + if (val & OHCI_PORT_PPS) { ohci_port_power(ohci, portnum, 1); - - if (old_state !=3D port->ctrl) + } + if (old_state !=3D port->ctrl) { ohci_set_interrupt(ohci, OHCI_INTR_RHSC); + } } =20 static uint64_t ohci_mem_read(void *opaque, @@ -1606,8 +1618,9 @@ static void ohci_mem_write(void *opaque, /* Bits written as '0' remain unchanged in the register */ ohci->status |=3D val; =20 - if (ohci->status & OHCI_STATUS_HCR) + if (ohci->status & OHCI_STATUS_HCR) { ohci_soft_reset(ohci); + } break; =20 case 3: /* HcInterruptStatus */ @@ -1685,8 +1698,9 @@ static void ohci_mem_write(void *opaque, =20 case 25: /* HcHReset */ ohci->hreset =3D val & ~OHCI_HRESET_FSBIR; - if (val & OHCI_HRESET_FSBIR) + if (val & OHCI_HRESET_FSBIR) { ohci_hard_reset(ohci); + } break; =20 case 26: /* HcHInterruptEnable */ --=20 2.38.1