From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567540; cv=none; d=zohomail.com; s=zohoarc; b=W6ZpbZPu2JGP+LcTxJyCghUsf6vXFIaKP/H5/V8hAzD7rtEL5in0W+al/vjU2iw4PuLfLk2AvHj3fzjcGdvXvmielulbshEvbmAJDNST77vOunk5bEzGJlTjivSTCHF3VxJU56j5K+BfctE2NGNo0a1wD96B4VxXNMLF9JYN1Qk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567540; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=xDtiZiwM6CTrTLFYe2kPXYgLad2LKywg9x6k3ULcoB8=; b=Jzb0wfsXqyhHcUmXYeFSScu+dSrExqUspWmzQXXClFhLT+v92aauo3ODG0tWlz+lOFOALi+PS94fDaIvlymzDVeAvr9I9AjU1TRu0FkDNqPJXGsLw8Oh/nXD7f4nBT0op20zvZfxcKKydVNmY4Fc4kCPZFuqCZBlllob3WXdoBk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 167656754035697.12231338268657; Thu, 16 Feb 2023 09:12:20 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShn9-0007sD-BW; Thu, 16 Feb 2023 12:11:31 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShn7-0007q9-L6 for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:29 -0500 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShn6-0007oC-2t for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:29 -0500 Received: by mail-wm1-x32c.google.com with SMTP id m20-20020a05600c3b1400b003e1e754657aso4748653wms.2 for ; Thu, 16 Feb 2023 09:11:27 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.25 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=xDtiZiwM6CTrTLFYe2kPXYgLad2LKywg9x6k3ULcoB8=; b=jebiAT9sb9ij7lnApH2ru5p0Vmp3on4vbCoSH/U/ItYo+zDubcJPZE3ZgFb3a89I8o YswOdDjHTmcfcEsaiHU9V/frXWgpmGrnxXsEqJU/mG+3daQQJSUYw3XPnsayo16zH2hQ 49HYINkLsvxN5005HPCTvVTCjHRR0Mko2sSb3I7N/CihxCr3398J6Gn8wn35Ylo0Cxyz NkEjS7Z1mYQ0cYyTEC8zHpoDdJOxjw6WwLsb4OKaMdfJ1L+pZfE220IrigmEw2vsBPQ3 xV+++ooojVmwlRtU3D7XQnwE6Z5rENqEmFjJJKZ5MElxx5tq3OiXbv9DC2ycROXQbvOE yttA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xDtiZiwM6CTrTLFYe2kPXYgLad2LKywg9x6k3ULcoB8=; b=3WkcNV5A0Tump3IFl8t74XjRTF2lRIDoHqO5PmmlznnwjZgBgi9YubIBx7hTg4LVTe hcI0osbIGfFTsU8/apkwqjfdx0GvRxMnp65nveizIz7aOlfy0OFCPVximcoTzfg+DoIZ tOUr8TUSZfKUJIUtWBDT4yVMNGNky+wdbByubgUCgHXYGnCVPU3CbL6bxk+HsCd7+J9P NfTz4X61isvL9YvI+Hbr3/DniEdBEgFSW8g2h2I8y1iFoEMGxHF7cm1GGU2uud+Eesc2 ZEvn5UUa6Y4aqNLowxH+PYTMJ2ahMeV6w4QnTCx55VLZEi87z5N5n9bThc2+3iz5YeE/ tYXQ== X-Gm-Message-State: AO0yUKVdNaFp3hw11WDdJrAAT+TdWOueiP4tLxbc1uVkgIqGk+jf6d9M c71qxaejamUt/qy4/cTPxNbOA5IgvUNRdLXN X-Google-Smtp-Source: AK7set+UjSLUyLl8KiqnZ+xrnfZgqj770KCbMag4Z7WUfAhpF4ZTabkjafhRcv65AO7ItCgOy/lVLQ== X-Received: by 2002:a05:600c:3b07:b0:3de:1d31:1042 with SMTP id m7-20020a05600c3b0700b003de1d311042mr6304439wms.23.1676567486420; Thu, 16 Feb 2023 09:11:26 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 01/30] hw/intc/armv7m_nvic: Use OBJECT_DECLARE_SIMPLE_TYPE() macro Date: Thu, 16 Feb 2023 17:10:54 +0000 Message-Id: <20230216171123.2518285-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567541685100005 From: Philippe Mathieu-Daud=C3=A9 Manually convert to OBJECT_DECLARE_SIMPLE_TYPE() macro, similarly to automatic conversion from commit 8063396bf3 ("Use OBJECT_DECLARE_SIMPLE_TYPE when possible"). Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20230206223502.25122-2-philmd@linaro.org Signed-off-by: Peter Maydell --- include/hw/intc/armv7m_nvic.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/include/hw/intc/armv7m_nvic.h b/include/hw/intc/armv7m_nvic.h index 0180c7b0ca1..07f9c21a5f3 100644 --- a/include/hw/intc/armv7m_nvic.h +++ b/include/hw/intc/armv7m_nvic.h @@ -16,10 +16,7 @@ #include "qom/object.h" =20 #define TYPE_NVIC "armv7m_nvic" - -typedef struct NVICState NVICState; -DECLARE_INSTANCE_CHECKER(NVICState, NVIC, - TYPE_NVIC) +OBJECT_DECLARE_SIMPLE_TYPE(NVICState, NVIC) =20 /* Highest permitted number of exceptions (architectural limit) */ #define NVIC_MAX_VECTORS 512 --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567745; cv=none; d=zohomail.com; s=zohoarc; b=TWz5hnXKs7gsfLTeMLMCdB2jrqk/17laAMHYCFJPGHNNp4wWcfnWvIhZAYb1gQZau13Vt9mW94jyXFL81oRyAJDRMBWouL/6FtM64Ti3uvmRejfGMiidkiJc2DMHVfKMc3VTVe8R+a2VErgn80pq30exDCBZ+fjyZNe24kpGIzo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567745; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=r4krdA8Qnd36kyIKBvwPSIAkaJ6bsOagP1i8kYOboYQ=; b=JmvuED95kJbV3JjEb251DCU+p0F9SYwY7xKaF9elqHgldibsd36Wj0TduP+9eXvTwxrJWdqNRSZS1gIxt/7fznFcal7kytTaP2XFsRA9CyAb+/Fo66qLSnl2HaRaILs9eFGLwj1XbpLoG/qQTHhjxieC16V6Dpzy6deUc45Pmag= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1676567745506289.0035744503009; Thu, 16 Feb 2023 09:15:45 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShnA-0007tI-LF; Thu, 16 Feb 2023 12:11:32 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShn8-0007rm-OY for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:30 -0500 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShn6-0007oJ-NK for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:30 -0500 Received: by mail-wm1-x32e.google.com with SMTP id g6-20020a05600c310600b003e1f6dff952so4757115wmo.1 for ; Thu, 16 Feb 2023 09:11:28 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.26 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=r4krdA8Qnd36kyIKBvwPSIAkaJ6bsOagP1i8kYOboYQ=; b=cDC8VgDV15bWBWwuZR39Fy8LG6LECXQ85Cvv3BW9G8Wvk37Cz+sRBiHUYMadSkmSyn 56aJm6u0nXui+WQa+KbaATWzdcI1P0KNCWssnM24xYNNlc6UVzSmBgFl78ljiPjBlsLI kA4pWG2t07agzTAdDJ5AC0HZn9chCX0WF7RWgZnhfbgq7P9h+EwPBdibg4VzvkpxwEoO Miqu2g3xwwptpLlLMnGYW5EiOYTncH4qrNXXFjeZl/v6ZI2j/J0edThgbHhVo1yCGdxX ZJcLXX26M2RbDW8kwMQiXIGLodApsT3g4ZgUrRVMM6kRd2ikEx9WcnNbjSa1ohbyNhC6 X+2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=r4krdA8Qnd36kyIKBvwPSIAkaJ6bsOagP1i8kYOboYQ=; b=EF3kGjGqLSTFwBGhbqhYJXUm7KCbyeZBFxAKOKrLIEPK+QTNrhBdiMuBCFsKOggd7m /DIFpTs5nw1SnJGRmPsQVoZwPSIih7c67h9xzCLUgW/X9DXCsk6wNFlEdysYPgE+W9nz wfiecQS/gp0hrs8ptv0Ak39Txkyd9AfRHQl1a328P3tIXX/qjsx+7KN0s+Ge+xKOfgB+ 1WcfuLebJcvYQiRNBqdbMgL6uD46QOE1hFX7jYaXU8zOGqovk9fMBnaf2OQx6t6QTc2L AVC31/GCEPco2HpAOlgaXQ5Z9apVFbyyzZZb2/d5eC/liwF0MpI1QVJHG0L99XeleEUO marQ== X-Gm-Message-State: AO0yUKUZCtiixnGUFaevRUHQvYp6pioJFOU433w7xFboZMnocwrtMaqT 9UQFbR9ck/99gG6OXWbMRTtfdxroDhQAhUMG X-Google-Smtp-Source: AK7set8YfyqnRoJzcAX4emzdtHk2Qm0A/w7pFS5A2sO899ZRgHwJ5CS7WTJbWvOdsZGnJiUv+xdKBw== X-Received: by 2002:a05:600c:4b1b:b0:3df:fbd5:690 with SMTP id i27-20020a05600c4b1b00b003dffbd50690mr4950191wmp.17.1676567487300; Thu, 16 Feb 2023 09:11:27 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 02/30] target/arm: Simplify arm_v7m_mmu_idx_for_secstate() for user emulation Date: Thu, 16 Feb 2023 17:10:55 +0000 Message-Id: <20230216171123.2518285-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567747270100015 From: Philippe Mathieu-Daud=C3=A9 Suggested-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20230206223502.25122-3-philmd@linaro.org Signed-off-by: Peter Maydell --- target/arm/m_helper.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c index e7e746ea182..76239c9abe9 100644 --- a/target/arm/m_helper.c +++ b/target/arm/m_helper.c @@ -150,7 +150,12 @@ uint32_t HELPER(v7m_tt)(CPUARMState *env, uint32_t add= r, uint32_t op) return 0; } =20 -#else +ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, bool secstate) +{ + return ARMMMUIdx_MUser; +} + +#else /* !CONFIG_USER_ONLY */ =20 /* * What kind of stack write are we doing? This affects how exceptions @@ -2854,8 +2859,6 @@ uint32_t HELPER(v7m_tt)(CPUARMState *env, uint32_t ad= dr, uint32_t op) return tt_resp; } =20 -#endif /* !CONFIG_USER_ONLY */ - ARMMMUIdx arm_v7m_mmu_idx_all(CPUARMState *env, bool secstate, bool priv, bool negpri) { @@ -2892,3 +2895,5 @@ ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *e= nv, bool secstate) =20 return arm_v7m_mmu_idx_for_secstate_and_priv(env, secstate, priv); } + +#endif /* !CONFIG_USER_ONLY */ --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567575; cv=none; d=zohomail.com; s=zohoarc; b=jsQEI8ruWwGt6KwssG1WX+05ne8oDYa+xqY2YZRKSEnmQugqsYuDa4XabkgwL2jyKh28KOXBDhyvT2adHkxg42nB10qi36/wVFl89YY+gnocFeYzxgkjiQE5FSDQVomRLXzwyyYxHAMbdKb2q2Jnfw2Zfa9MoohKAbL/TwjinWU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567575; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=1bJSQcpdAE5XdmRoJPsx4gO+dGl9PnbwqH6SWwJRQ6s=; b=lSVlhLeu+T0Ih+XQOs0R637+hs+MvW/nHWbI/2LFMvcw2YJ8JeGg/Wdknx8iOARmG6J7lpzuPpKTnxy3Mb+rRC27Ql7cPQm2KGTifpqyEYMkmFsa25HzqUlD5WDe3DTcFq/Bj8WC1cHM+sVFh6yCPMTeGsoIQXTvWXt3y16g++Y= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1676567575489940.9559559347065; Thu, 16 Feb 2023 09:12:55 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShnB-0007uu-Ax; Thu, 16 Feb 2023 12:11:33 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShn9-0007sC-69 for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:31 -0500 Received: from mail-wr1-x429.google.com ([2a00:1450:4864:20::429]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShn7-0007oV-Dp for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:30 -0500 Received: by mail-wr1-x429.google.com with SMTP id bu23so2524223wrb.8 for ; Thu, 16 Feb 2023 09:11:29 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.27 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=1bJSQcpdAE5XdmRoJPsx4gO+dGl9PnbwqH6SWwJRQ6s=; b=K1TsMCXd1zSsK2X5ajZmaTo2zuhDohQWAa7L5SpP3ziv5qQCS+fEOM8+b669GDIMl3 KHtGo73SHBsE1BdWDg34Mqe0ia5qU6cB4Nqyj8jdJPAJ3nq/I2NUDIgVDbeFgvnZD8S0 mj0nf1NlXA+mstw2l7r/VJEzWoz8Rpcq39Kp5fHMmPrYrh9dDgeAIx4I7DvXM9hdhc47 oHVs3eEUs9dRBba7ubgIeFkW6FySmq5olZb/5Z9VukZIoLTVNDYmG502buYP2A2Lzej1 JgtQA259xFOikD5p7sbN8Jy9Jr1pgCULoLe6VTCt8G4w9p40VgXbNtCDMTHJj1ylYfRr uPsA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1bJSQcpdAE5XdmRoJPsx4gO+dGl9PnbwqH6SWwJRQ6s=; b=AfXW8W9AMYlWGhFij/MVIdgLI28o7Q2Up6H+0qxJds8bxpYC345Vg6eth4AVhBxcEw cE/QS6C0Ag6WLtTIZilfNxY5yRuQEx7jigv4B5tKu5RnLfcWKwavS+KaGDWXGcbmotBz bWKemmn/x7TGk7d9pPE5R51bLjQ25Oyzj2lLea122qTd4nDwvFzTuQi5lMnK7TAgAtLV IpNM7Gu52LQ429c9yPeTLOgV1N+tjxJTjNtWUqxMhRIHC99G16Dx/yHIZpWClVmpXRio jr8ofK1oxhtu9gJ1SieotMXBwwhGDkN/Xzf7sqXazAh2d+kf5T3TR2lJkrCF9+OBYudJ 39Jw== X-Gm-Message-State: AO0yUKU2yP/PoHpHLGox8OLSxc/9o7Y6aOQ5mUkju5X0PJF38LPrxKPn MspUd/1RTngt6lw+DTkIka5l7sKPCHUhzUmR X-Google-Smtp-Source: AK7set92gw3Dki3UyF2dOQN23N1/UWVqsSScaPjkuQyoETltI55mE62BKGGi37WpxjjRiAgCwCQFaQ== X-Received: by 2002:adf:de12:0:b0:2c5:98f2:5b1d with SMTP id b18-20020adfde12000000b002c598f25b1dmr1164303wrm.63.1676567488075; Thu, 16 Feb 2023 09:11:28 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 03/30] target/arm: Reduce arm_v7m_mmu_idx_[all/for_secstate_and_priv]() scope Date: Thu, 16 Feb 2023 17:10:56 +0000 Message-Id: <20230216171123.2518285-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567575873100001 From: Philippe Mathieu-Daud=C3=A9 arm_v7m_mmu_idx_all() and arm_v7m_mmu_idx_for_secstate_and_priv() are only used for system emulation in m_helper.c. Move the definitions to avoid prototype forward declarations. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20230206223502.25122-4-philmd@linaro.org Signed-off-by: Peter Maydell --- target/arm/internals.h | 14 -------- target/arm/m_helper.c | 74 +++++++++++++++++++++--------------------- 2 files changed, 37 insertions(+), 51 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index e1e018da463..759b70c646f 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -597,20 +597,6 @@ static inline ARMMMUIdx core_to_aa64_mmu_idx(int mmu_i= dx) =20 int arm_mmu_idx_to_el(ARMMMUIdx mmu_idx); =20 -/* - * Return the MMU index for a v7M CPU with all relevant information - * manually specified. - */ -ARMMMUIdx arm_v7m_mmu_idx_all(CPUARMState *env, - bool secstate, bool priv, bool negpri); - -/* - * Return the MMU index for a v7M CPU in the specified security and - * privilege state. - */ -ARMMMUIdx arm_v7m_mmu_idx_for_secstate_and_priv(CPUARMState *env, - bool secstate, bool priv); - /* Return the MMU index for a v7M CPU in the specified security state */ ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, bool secstate); =20 diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c index 76239c9abe9..b4964dca8a8 100644 --- a/target/arm/m_helper.c +++ b/target/arm/m_helper.c @@ -157,6 +157,43 @@ ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *en= v, bool secstate) =20 #else /* !CONFIG_USER_ONLY */ =20 +static ARMMMUIdx arm_v7m_mmu_idx_all(CPUARMState *env, + bool secstate, bool priv, bool negpri) +{ + ARMMMUIdx mmu_idx =3D ARM_MMU_IDX_M; + + if (priv) { + mmu_idx |=3D ARM_MMU_IDX_M_PRIV; + } + + if (negpri) { + mmu_idx |=3D ARM_MMU_IDX_M_NEGPRI; + } + + if (secstate) { + mmu_idx |=3D ARM_MMU_IDX_M_S; + } + + return mmu_idx; +} + +static ARMMMUIdx arm_v7m_mmu_idx_for_secstate_and_priv(CPUARMState *env, + bool secstate, bool= priv) +{ + bool negpri =3D armv7m_nvic_neg_prio_requested(env->nvic, secstate); + + return arm_v7m_mmu_idx_all(env, secstate, priv, negpri); +} + +/* Return the MMU index for a v7M CPU in the specified security state */ +ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, bool secstate) +{ + bool priv =3D arm_v7m_is_handler_mode(env) || + !(env->v7m.control[secstate] & 1); + + return arm_v7m_mmu_idx_for_secstate_and_priv(env, secstate, priv); +} + /* * What kind of stack write are we doing? This affects how exceptions * generated during the stacking are treated. @@ -2859,41 +2896,4 @@ uint32_t HELPER(v7m_tt)(CPUARMState *env, uint32_t a= ddr, uint32_t op) return tt_resp; } =20 -ARMMMUIdx arm_v7m_mmu_idx_all(CPUARMState *env, - bool secstate, bool priv, bool negpri) -{ - ARMMMUIdx mmu_idx =3D ARM_MMU_IDX_M; - - if (priv) { - mmu_idx |=3D ARM_MMU_IDX_M_PRIV; - } - - if (negpri) { - mmu_idx |=3D ARM_MMU_IDX_M_NEGPRI; - } - - if (secstate) { - mmu_idx |=3D ARM_MMU_IDX_M_S; - } - - return mmu_idx; -} - -ARMMMUIdx arm_v7m_mmu_idx_for_secstate_and_priv(CPUARMState *env, - bool secstate, bool priv) -{ - bool negpri =3D armv7m_nvic_neg_prio_requested(env->nvic, secstate); - - return arm_v7m_mmu_idx_all(env, secstate, priv, negpri); -} - -/* Return the MMU index for a v7M CPU in the specified security state */ -ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, bool secstate) -{ - bool priv =3D arm_v7m_is_handler_mode(env) || - !(env->v7m.control[secstate] & 1); - - return arm_v7m_mmu_idx_for_secstate_and_priv(env, secstate, priv); -} - #endif /* !CONFIG_USER_ONLY */ --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567557; cv=none; d=zohomail.com; s=zohoarc; b=QDP1enzeotBQrVtu/FJzODuD844vllAByp6iTwFjU5qKjKhueBC2v+WUBef8ejlkErEJYkphxOGemsy2XRimhHLqTn5uAkFBKzQeD3g8mmv+HO3JOxb4GcE5klwDVgoZDA3NBNhqMBBluzo1qgOAfjBpuiYrm18yPrnFmFHeYjo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567557; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=7RlBfSYt1zg9bweFFHbEwDZ61Sd/0Ke4XEfLYhGOXrY=; b=IEIQ0LPyt3Rr4CmAQiUpLDuMy172wKfWKr4tyFnGN+N5EfJ0B9GzcsNqqAtzH76WpdF7eEYUF80ZSekmwu/n3ddrS6KI0+an30p7OoWQrZIIojIl8OIRD2ROjUOMQ8d3BRFcPIbrAtyMRyJEn2x23doz7qn7+FDMF3f1h7s+QlM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1676567557070925.6043807637254; Thu, 16 Feb 2023 09:12:37 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShnB-0007uX-07; Thu, 16 Feb 2023 12:11:33 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShnA-0007sy-1N for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:32 -0500 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShn8-0007oo-GV for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:31 -0500 Received: by mail-wr1-x42a.google.com with SMTP id m10so2544966wrn.4 for ; Thu, 16 Feb 2023 09:11:30 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. 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} =20 -#ifndef CONFIG_USER_ONLY static uint64_t id_aa64pfr0_read(CPUARMState *env, const ARMCPRegInfo *ri) { ARMCPU *cpu =3D env_archcpu(env); @@ -7998,8 +7998,16 @@ void register_cp_regs_for_features(ARMCPU *cpu) .opc0 =3D 3, .opc1 =3D 0, .crn =3D 0, .crm =3D 1, .opc2 =3D = 1, .access =3D PL1_R, .type =3D ARM_CP_NO_RAW, .accessfn =3D access_aa32_tid3, +#ifdef CONFIG_USER_ONLY + .type =3D ARM_CP_CONST, + .resetvalue =3D cpu->isar.id_pfr1, +#else + .type =3D ARM_CP_NO_RAW, + .accessfn =3D access_aa32_tid3, .readfn =3D id_pfr1_read, - .writefn =3D arm_cp_write_ignore }, + .writefn =3D arm_cp_write_ignore +#endif + }, { .name =3D "ID_DFR0", .state =3D ARM_CP_STATE_BOTH, .opc0 =3D 3, .opc1 =3D 0, .crn =3D 0, .crm =3D 1, .opc2 =3D = 2, .access =3D PL1_R, .type =3D ARM_CP_CONST, --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.29 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=0mZsyYHXMMzgbZQYO+cjM5qTlEPxz+umbuwXPDLbPoQ=; b=ia6tSNF2LvlntfU+73d+SEfS9437xg7ZH9LySRGEwq2vkjY4TPkjjdAadMxtYWwsBQ FzT+FS+Ymvwn7opZIKhvL50yoWKZhul+M+dyygWZfeZouZJomO0woSJVbMmHItoGDE0k bWDgHPJya0clPFhtAVBecARGFEsCQ16Onyz+8Snr2oP81jHXGQwO1nMFqWbmAzfEIQfP u2l4EXa7noBZ25pIn13SaTuRsfG6pDAob5xRX6njPPinoSPS8mb1j6KtsG0Plrx0pq3o RPRTnmrqfQQHrn0JGtXDyf2kciEDYFClaUG6GrQktlIcgmhixrKuUvmmAqo6jvpXueS2 dSeQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567684813100001 From: Philippe Mathieu-Daud=C3=A9 Suggested-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20230206223502.25122-6-philmd@linaro.org Signed-off-by: Peter Maydell --- linux-user/user-internals.h | 2 +- target/arm/cpu.h | 2 +- linux-user/arm/cpu_loop.c | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/linux-user/user-internals.h b/linux-user/user-internals.h index 0280e76addd..3576da413f4 100644 --- a/linux-user/user-internals.h +++ b/linux-user/user-internals.h @@ -135,7 +135,7 @@ void print_termios(void *arg); #ifdef TARGET_ARM static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { - return cpu_env->eabi =3D=3D 1; + return cpu_env->eabi; } #elif defined(TARGET_MIPS) && defined(TARGET_ABI_MIPSO32) static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { retur= n 1; } diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 7bc97fece97..05b9012cee9 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -723,7 +723,7 @@ typedef struct CPUArchState { =20 #if defined(CONFIG_USER_ONLY) /* For usermode syscall translation. */ - int eabi; + bool eabi; #endif =20 struct CPUBreakpoint *cpu_breakpoint[16]; diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c index c0790f3246b..a9924232578 100644 --- a/linux-user/arm/cpu_loop.c +++ b/linux-user/arm/cpu_loop.c @@ -356,7 +356,7 @@ void cpu_loop(CPUARMState *env) break; case EXCP_SWI: { - env->eabi =3D 1; + env->eabi =3D true; /* system call */ if (env->thumb) { /* Thumb is always EABI style with syscall number in r= 7 */ @@ -382,7 +382,7 @@ void cpu_loop(CPUARMState *env) * > 0xfffff and are handled below as out-of-range. */ n ^=3D ARM_SYSCALL_BASE; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.29 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=a6imo2uk4gluBMlTk8m75RyQDRZFDd/gMQZ6xj9C6ro=; b=aYk+RePKgdyghgdkT6evJzvW7mRPtwxY7gO9cFCEN3ovEELv8UjbRIDZm2chHCPuPr wUkVm/utMDxJ+rfB/2AcOuxMfJGNU7dBG7M+tD9DJjN5Uy4EeWXkHavcx088JQKIduV1 XcO0HH9Vj5zfYp+B/S8RkSW6aw8npVb6uVtyuN0RBMqhJJ1BWpEEL3HiRqLRJ/9bT8uW KgVf/4c4i8RDFYttzuDT8bT2+VuVePbXT7gvxZArV7HzHaUMDkL7b/8JIKzbgJP0MaSH fBqq8fahjKPrtS2XncFzDTus8A90Te7T5apYCtVbkbFgE2xkh3lisTG78fUrsrLLdLAi ZYwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=a6imo2uk4gluBMlTk8m75RyQDRZFDd/gMQZ6xj9C6ro=; b=fZY/5HSTjtZuKQevVAk3KhMhRu45+B4M19+s2g/IQMnHXbjzEwKn5qGgFjNkjoOrgX IPI86aquraagjjjqm/FGNGgtffpRUXtziFqyEfPurXXluWHn4YaTi252zLFOuqNqwxTT ZbAPapytfZVYHs2rJmjHfluLdqrArSC1nCuMHa953f/tV1w+Khmbi0n6Zd11SUns3isn ZUDhLtd4DUavYzDnwOIj5dQTOpFv747MsAUNbGTph40cLiYnAuNNc7ypPHBAQUlCKL0M h0X7HbVmoETrvJZm9Lf5FzQs8VGrdPupf0DKTWEZ3NMHzLU2vVhujqSiTDEt+x+A12KT Lx8g== X-Gm-Message-State: AO0yUKXTsXQM0lmwGOiPfTWHCqEbaOryB/U557T+svG2ocYhUsqmFQNM PY0Fxo+s+Tk5Ufp/jJhNaYlXLmV/WTpCcAsj X-Google-Smtp-Source: AK7set+cvu4Bp8kksxcucyXV/zrGt8CZuvZR219NuZmwAkEiapSLlkHDP0vSZdV2HT7U7yQDpUyKKg== X-Received: by 2002:adf:de8d:0:b0:2c5:4dd0:5df6 with SMTP id w13-20020adfde8d000000b002c54dd05df6mr5002367wrl.41.1676567490606; Thu, 16 Feb 2023 09:11:30 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 06/30] target/arm: Avoid resetting CPUARMState::eabi field Date: Thu, 16 Feb 2023 17:10:59 +0000 Message-Id: <20230216171123.2518285-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567709020100003 From: Philippe Mathieu-Daud=C3=A9 Although the 'eabi' field is only used in user emulation where CPU reset doesn't occur, it doesn't belong to the area to reset. Move it after the 'end_reset_fields' for consistency. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20230206223502.25122-7-philmd@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu.h | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 05b9012cee9..1c1e0334f01 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -721,11 +721,6 @@ typedef struct CPUArchState { ARMVectorReg zarray[ARM_MAX_VQ * 16]; #endif =20 -#if defined(CONFIG_USER_ONLY) - /* For usermode syscall translation. */ - bool eabi; -#endif - struct CPUBreakpoint *cpu_breakpoint[16]; struct CPUWatchpoint *cpu_watchpoint[16]; =20 @@ -776,6 +771,10 @@ typedef struct CPUArchState { const struct arm_boot_info *boot_info; /* Store GICv3CPUState to access from this struct */ void *gicv3state; +#if defined(CONFIG_USER_ONLY) + /* For usermode syscall translation. */ + bool eabi; +#endif /* CONFIG_USER_ONLY */ =20 #ifdef TARGET_TAGGED_ADDRESSES /* Linux syscall tagged address support */ --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567748; cv=none; d=zohomail.com; s=zohoarc; b=HahZfQp/LsK55hLS3OP3NjgYPEYKLMdPRi19pjMLMA1UvkBUrPquDf/RVyBzna8AeSaQrV3qyNEyBLm/TZqzH8ZPRLRbXt/2C0FmIlS4M+ciHAkiwfxS09AMu4tJ7SFQdxRnGT0DC/0+d4xC1T6GyU9igqC0YNzFAiSwA7xD+Wo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567748; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=yZdYj4xUNtAS17eIdljWMHqlEpUmYI5NCeKfPxqq7Ng=; b=nhkRkORKHrgs7hBJBcn+Xvc2622WM9w3IfgP71DBliPlP4a0qrjTlvTgTbDBbW6quUoyS2/ZIwFBWeR54Ep2B4Bn0jHzG9k6HVc6K3IjGfgG9FBqV+g+pQblotHHwSWov0IZuvEBtRJkiuSb/pWjgLvHPcpp+hsZczppc4E9kVk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1676567748587789.5213057486931; Thu, 16 Feb 2023 09:15:48 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShnD-0007yi-E7; Thu, 16 Feb 2023 12:11:35 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShnC-0007yE-Bk for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:34 -0500 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShnA-0007pa-QH for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:34 -0500 Received: by mail-wr1-x42a.google.com with SMTP id r28so2068948wra.5 for ; Thu, 16 Feb 2023 09:11:32 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.30 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=yZdYj4xUNtAS17eIdljWMHqlEpUmYI5NCeKfPxqq7Ng=; b=TpgL2bJzG0Xs6ICWEja2+3fWDhXFyvR1Z5kz0tjgZdqGtKZlk2An/ZixyeGF3lInRs LA+p+89oTkgkkTGmBKs9oGX67ymOHf+G8F/Mxwksabr9OG+jag/Je942fVHYuptA6wRN PnOaeNf/I8YE0XPXsx/ApxcLgwDN3qeg+1twlxmxcWZlC9X3pD4YoN0SOpZxqagsjmar 8XdUQNqctCt8w86nLVQuVZKCBW1i247qIf6aMhcA65zrZ7jWNKSHChXruoFOpLB/q4rp YxMt5KT5TXdx70JQgU5LxAX1Ap48NvmLeWOBuowk0Tkbq5VXPYBeuFetFj96Bi5D3s2l eTXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567749303100018 From: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20230206223502.25122-8-philmd@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 1c1e0334f01..002082eb5b6 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -769,9 +769,10 @@ typedef struct CPUArchState { =20 void *nvic; const struct arm_boot_info *boot_info; +#if !defined(CONFIG_USER_ONLY) /* Store GICv3CPUState to access from this struct */ void *gicv3state; -#if defined(CONFIG_USER_ONLY) +#else /* CONFIG_USER_ONLY */ /* For usermode syscall translation. */ bool eabi; #endif /* CONFIG_USER_ONLY */ --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567634; cv=none; d=zohomail.com; s=zohoarc; b=lKoeaOa9uNk0qzOPmiTFo7m7c27wmzU6aI03PRBT2dTZ2lS41V+7t3WS7zlaKjkg00qkQPmiyP38kvVmZM5h+mQ20W5/1DyzxPRKgqOYNHuE2RAHLIn3TS1SUXO1LAO7JjLIyEWT5pD/kd8PuOg+Tkl5xepDceOtQUC6yGX6XIk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567634; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.31 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=1+Kck9JVYjKMa8PaarZ6RWpFOfo4WuN9uUAQ2s5nrFI=; b=Gi+qmk5aWfOfjUNcIj3kK0gwWHUxcy11vgC1NJ9p+bJ0ZYWOj6v01y/MaQuIAzsngh qB7U21GzrlJ4ASSgmBZa4TfJxPZ1b5lFssh4Fl2wd6Qo+y9uclW/iEzWkLK7MFv305fn GRtCsu7Rh8kbCsTH0KcSbLHL2Md4sS149PpKg8QKOjQf5UJvPoWIIsk+gvyeYDRrftYQ vhepcCJUnb7J2dEc0kK+zOJIYalyAlApmlofBp39D55mBw/llH1BmbKMQSSLDFV0TW7O Nh5KwfDnvNB1+vMDED3ak8lJe43UBvq1M/BILNVsBrk/Pr8RwtAT9CcNj17/ZFww1veq QYAA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567527566100001 From: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20230206223502.25122-10-philmd@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index a574e85b769..01f9566a1b4 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -767,8 +767,8 @@ typedef struct CPUArchState { uint32_t ctrl; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.33 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=CnzN2GsIWldMGo1Fxbr7+H5dNxnuKYX80l1WIoduxfk=; b=fjApAMicxtC6nPFMP1rUiyXSeFNP/xDHBhCsSUNOg7EA9pY3j5lSSMldKQfkYuVAwe VffWsrjz+3pbx7uFFDbkhHMy4pS1dolo3OJWKad+iUnB4gm9Xg2DejXgvdrqTeX8cYVz BBNmfjsiak7cU2pf6QQW2JTHcQ1agAHreo5Fz2adUCQeBnZgRARTXdXy1abHqfjdjv7S nD1wqY9ioqpjyjyh22J+YsWDiDKObZU2jw+wLLzv1SIOp8MzTnt+zVHx4EempJa7daoA RwktSMlkUPCC3u29Z9T0B6HUYJwvuw6m2LYF1gEGNn3lBI0b5UgAYBokiE5B9U7Q7skq M6wA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CnzN2GsIWldMGo1Fxbr7+H5dNxnuKYX80l1WIoduxfk=; b=lqO096yE1CSWTfJWjnmOWd+puTI3urd8Gz+drN/gBY0dp6tbrvfl5NA/2GkYt46w8A GYWYdtpDKhbbUGu9BfKammdzcW0q3qpq/aE9pOxXfHt2Mn4am+WgfBkl9legVKNQuUc0 zH3+f8BtEnVjUXDESfyMJ5Mp7lWGxWHr66lKfEsYPxk8N9A35w75bPicNFWFBesfSFpd iMVAC416IzPzMSKwKL/62tZT4v8xk+pKLUUvbAeWF0cTRREnzty6ekSEX1IMwNpHV++G PKkDA9GRfOw/G6wVEpVsK36ItH/NKTnVfwv7WHwAMy8h8SZZ9RW0Ntm81BTP6Od6mgLb DelA== X-Gm-Message-State: AO0yUKXqrGVuc/b2w4eXT21V9A3rGFzsOh3mbhZWt0saRQYzHVO6Rx9+ 0j2tx0t5OArAiHKC1IPrit+qrxdnR69FQG9P X-Google-Smtp-Source: AK7set/1ovl5bgRxseuGfmD6mxodBWUzRj48RNjiqkWGv9lMlzcx5+NUCHqpYMDDHeb6rSD/PQ8zTQ== X-Received: by 2002:adf:ee51:0:b0:2bd:f5bd:5482 with SMTP id w17-20020adfee51000000b002bdf5bd5482mr4862021wro.28.1676567493848; Thu, 16 Feb 2023 09:11:33 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 10/30] target/arm: Store CPUARMState::nvic as NVICState* Date: Thu, 16 Feb 2023 17:11:03 +0000 Message-Id: <20230216171123.2518285-11-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567543712100013 From: Philippe Mathieu-Daud=C3=A9 There is no point in using a void pointer to access the NVIC. Use the real type to avoid casting it while debugging. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20230206223502.25122-11-philmd@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu.h | 46 ++++++++++++++++++++++--------------------- hw/intc/armv7m_nvic.c | 38 ++++++++++++----------------------- target/arm/cpu.c | 1 + target/arm/m_helper.c | 2 +- 4 files changed, 39 insertions(+), 48 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 01f9566a1b4..9a80819d8d9 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -227,6 +227,8 @@ typedef struct CPUARMTBFlags { =20 typedef struct ARMMMUFaultInfo ARMMMUFaultInfo; =20 +typedef struct NVICState NVICState; + typedef struct CPUArchState { /* Regs for current mode. */ uint32_t regs[16]; @@ -768,7 +770,7 @@ typedef struct CPUArchState { } sau; =20 #if !defined(CONFIG_USER_ONLY) - void *nvic; + NVICState *nvic; const struct arm_boot_info *boot_info; /* Store GICv3CPUState to access from this struct */ void *gicv3state; @@ -2559,16 +2561,16 @@ uint32_t arm_phys_excp_target_el(CPUState *cs, uint= 32_t excp_idx, =20 /* Interface between CPU and Interrupt controller. */ #ifndef CONFIG_USER_ONLY -bool armv7m_nvic_can_take_pending_exception(void *opaque); +bool armv7m_nvic_can_take_pending_exception(NVICState *s); #else -static inline bool armv7m_nvic_can_take_pending_exception(void *opaque) +static inline bool armv7m_nvic_can_take_pending_exception(NVICState *s) { return true; } #endif /** * armv7m_nvic_set_pending: mark the specified exception as pending - * @opaque: the NVIC + * @s: the NVIC * @irq: the exception number to mark pending * @secure: false for non-banked exceptions or for the nonsecure * version of a banked exception, true for the secure version of a banked @@ -2578,10 +2580,10 @@ static inline bool armv7m_nvic_can_take_pending_exc= eption(void *opaque) * if @secure is true and @irq does not specify one of the fixed set * of architecturally banked exceptions. */ -void armv7m_nvic_set_pending(void *opaque, int irq, bool secure); +void armv7m_nvic_set_pending(NVICState *s, int irq, bool secure); /** * armv7m_nvic_set_pending_derived: mark this derived exception as pending - * @opaque: the NVIC + * @s: the NVIC * @irq: the exception number to mark pending * @secure: false for non-banked exceptions or for the nonsecure * version of a banked exception, true for the secure version of a banked @@ -2591,10 +2593,10 @@ void armv7m_nvic_set_pending(void *opaque, int irq,= bool secure); * exceptions (exceptions generated in the course of trying to take * a different exception). */ -void armv7m_nvic_set_pending_derived(void *opaque, int irq, bool secure); +void armv7m_nvic_set_pending_derived(NVICState *s, int irq, bool secure); /** * armv7m_nvic_set_pending_lazyfp: mark this lazy FP exception as pending - * @opaque: the NVIC + * @s: the NVIC * @irq: the exception number to mark pending * @secure: false for non-banked exceptions or for the nonsecure * version of a banked exception, true for the secure version of a banked @@ -2603,11 +2605,11 @@ void armv7m_nvic_set_pending_derived(void *opaque, = int irq, bool secure); * Similar to armv7m_nvic_set_pending(), but specifically for exceptions * generated in the course of lazy stacking of FP registers. */ -void armv7m_nvic_set_pending_lazyfp(void *opaque, int irq, bool secure); +void armv7m_nvic_set_pending_lazyfp(NVICState *s, int irq, bool secure); /** * armv7m_nvic_get_pending_irq_info: return highest priority pending * exception, and whether it targets Secure state - * @opaque: the NVIC + * @s: the NVIC * @pirq: set to pending exception number * @ptargets_secure: set to whether pending exception targets Secure * @@ -2617,20 +2619,20 @@ void armv7m_nvic_set_pending_lazyfp(void *opaque, i= nt irq, bool secure); * to true if the current highest priority pending exception should * be taken to Secure state, false for NS. */ -void armv7m_nvic_get_pending_irq_info(void *opaque, int *pirq, +void armv7m_nvic_get_pending_irq_info(NVICState *s, int *pirq, bool *ptargets_secure); /** * armv7m_nvic_acknowledge_irq: make highest priority pending exception ac= tive - * @opaque: the NVIC + * @s: the NVIC * * Move the current highest priority pending exception from the pending * state to the active state, and update v7m.exception to indicate that * it is the exception currently being handled. */ -void armv7m_nvic_acknowledge_irq(void *opaque); +void armv7m_nvic_acknowledge_irq(NVICState *s); /** * armv7m_nvic_complete_irq: complete specified interrupt or exception - * @opaque: the NVIC + * @s: the NVIC * @irq: the exception number to complete * @secure: true if this exception was secure * @@ -2639,10 +2641,10 @@ void armv7m_nvic_acknowledge_irq(void *opaque); * 0 if there is still an irq active after this one was completed * (Ignoring -1, this is the same as the RETTOBASE value before completion= .) */ -int armv7m_nvic_complete_irq(void *opaque, int irq, bool secure); +int armv7m_nvic_complete_irq(NVICState *s, int irq, bool secure); /** * armv7m_nvic_get_ready_status(void *opaque, int irq, bool secure) - * @opaque: the NVIC + * @s: the NVIC * @irq: the exception number to mark pending * @secure: false for non-banked exceptions or for the nonsecure * version of a banked exception, true for the secure version of a banked @@ -2653,28 +2655,28 @@ int armv7m_nvic_complete_irq(void *opaque, int irq,= bool secure); * interrupt the current execution priority. This controls whether the * RDY bit for it in the FPCCR is set. */ -bool armv7m_nvic_get_ready_status(void *opaque, int irq, bool secure); +bool armv7m_nvic_get_ready_status(NVICState *s, int irq, bool secure); /** * armv7m_nvic_raw_execution_priority: return the raw execution priority - * @opaque: the NVIC + * @s: the NVIC * * Returns: the raw execution priority as defined by the v8M architecture. * This is the execution priority minus the effects of AIRCR.PRIS, * and minus any PRIMASK/FAULTMASK/BASEPRI priority boosting. * (v8M ARM ARM I_PKLD.) */ -int armv7m_nvic_raw_execution_priority(void *opaque); +int armv7m_nvic_raw_execution_priority(NVICState *s); /** * armv7m_nvic_neg_prio_requested: return true if the requested execution * priority is negative for the specified security state. - * @opaque: the NVIC + * @s: the NVIC * @secure: the security state to test * This corresponds to the pseudocode IsReqExecPriNeg(). */ #ifndef CONFIG_USER_ONLY -bool armv7m_nvic_neg_prio_requested(void *opaque, bool secure); +bool armv7m_nvic_neg_prio_requested(NVICState *s, bool secure); #else -static inline bool armv7m_nvic_neg_prio_requested(void *opaque, bool secur= e) +static inline bool armv7m_nvic_neg_prio_requested(NVICState *s, bool secur= e) { return false; } diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index 1f7763964c3..e54553283f4 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -389,7 +389,7 @@ static inline int nvic_exec_prio(NVICState *s) return MIN(running, s->exception_prio); } =20 -bool armv7m_nvic_neg_prio_requested(void *opaque, bool secure) +bool armv7m_nvic_neg_prio_requested(NVICState *s, bool secure) { /* Return true if the requested execution priority is negative * for the specified security state, ie that security state @@ -399,8 +399,6 @@ bool armv7m_nvic_neg_prio_requested(void *opaque, bool = secure) * mean we don't allow FAULTMASK_NS to actually make the execution * priority negative). Compare pseudocode IsReqExcPriNeg(). */ - NVICState *s =3D opaque; - if (s->cpu->env.v7m.faultmask[secure]) { return true; } @@ -418,17 +416,13 @@ bool armv7m_nvic_neg_prio_requested(void *opaque, boo= l secure) return false; } =20 -bool armv7m_nvic_can_take_pending_exception(void *opaque) +bool armv7m_nvic_can_take_pending_exception(NVICState *s) { - NVICState *s =3D opaque; - return nvic_exec_prio(s) > nvic_pending_prio(s); } =20 -int armv7m_nvic_raw_execution_priority(void *opaque) +int armv7m_nvic_raw_execution_priority(NVICState *s) { - NVICState *s =3D opaque; - return s->exception_prio; } =20 @@ -506,9 +500,8 @@ static void nvic_irq_update(NVICState *s) * if @secure is true and @irq does not specify one of the fixed set * of architecturally banked exceptions. */ -static void armv7m_nvic_clear_pending(void *opaque, int irq, bool secure) +static void armv7m_nvic_clear_pending(NVICState *s, int irq, bool secure) { - NVICState *s =3D (NVICState *)opaque; VecInfo *vec; =20 assert(irq > ARMV7M_EXCP_RESET && irq < s->num_irq); @@ -666,17 +659,17 @@ static void do_armv7m_nvic_set_pending(void *opaque, = int irq, bool secure, } } =20 -void armv7m_nvic_set_pending(void *opaque, int irq, bool secure) +void armv7m_nvic_set_pending(NVICState *s, int irq, bool secure) { - do_armv7m_nvic_set_pending(opaque, irq, secure, false); + do_armv7m_nvic_set_pending(s, irq, secure, false); } =20 -void armv7m_nvic_set_pending_derived(void *opaque, int irq, bool secure) +void armv7m_nvic_set_pending_derived(NVICState *s, int irq, bool secure) { - do_armv7m_nvic_set_pending(opaque, irq, secure, true); + do_armv7m_nvic_set_pending(s, irq, secure, true); } =20 -void armv7m_nvic_set_pending_lazyfp(void *opaque, int irq, bool secure) +void armv7m_nvic_set_pending_lazyfp(NVICState *s, int irq, bool secure) { /* * Pend an exception during lazy FP stacking. This differs @@ -684,7 +677,6 @@ void armv7m_nvic_set_pending_lazyfp(void *opaque, int i= rq, bool secure) * whether we should escalate depends on the saved context * in the FPCCR register, not on the current state of the CPU/NVIC. */ - NVICState *s =3D (NVICState *)opaque; bool banked =3D exc_is_banked(irq); VecInfo *vec; bool targets_secure; @@ -773,9 +765,8 @@ void armv7m_nvic_set_pending_lazyfp(void *opaque, int i= rq, bool secure) } =20 /* Make pending IRQ active. */ -void armv7m_nvic_acknowledge_irq(void *opaque) +void armv7m_nvic_acknowledge_irq(NVICState *s) { - NVICState *s =3D (NVICState *)opaque; CPUARMState *env =3D &s->cpu->env; const int pending =3D s->vectpending; const int running =3D nvic_exec_prio(s); @@ -814,10 +805,9 @@ static bool vectpending_targets_secure(NVICState *s) exc_targets_secure(s, s->vectpending); } =20 -void armv7m_nvic_get_pending_irq_info(void *opaque, +void armv7m_nvic_get_pending_irq_info(NVICState *s, int *pirq, bool *ptargets_secure) { - NVICState *s =3D (NVICState *)opaque; const int pending =3D s->vectpending; bool targets_secure; =20 @@ -831,9 +821,8 @@ void armv7m_nvic_get_pending_irq_info(void *opaque, *pirq =3D pending; } =20 -int armv7m_nvic_complete_irq(void *opaque, int irq, bool secure) +int armv7m_nvic_complete_irq(NVICState *s, int irq, bool secure) { - NVICState *s =3D (NVICState *)opaque; VecInfo *vec =3D NULL; int ret =3D 0; =20 @@ -915,7 +904,7 @@ int armv7m_nvic_complete_irq(void *opaque, int irq, boo= l secure) return ret; } =20 -bool armv7m_nvic_get_ready_status(void *opaque, int irq, bool secure) +bool armv7m_nvic_get_ready_status(NVICState *s, int irq, bool secure) { /* * Return whether an exception is "ready", i.e. it is enabled and is @@ -926,7 +915,6 @@ bool armv7m_nvic_get_ready_status(void *opaque, int irq= , bool secure) * for non-banked exceptions secure is always false; for banked except= ions * it indicates which of the exceptions is required. */ - NVICState *s =3D (NVICState *)opaque; bool banked =3D exc_is_banked(irq); VecInfo *vec; int running =3D nvic_exec_prio(s); diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 5f63316dbf2..b3a2275b087 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -36,6 +36,7 @@ #if !defined(CONFIG_USER_ONLY) #include "hw/loader.h" #include "hw/boards.h" +#include "hw/intc/armv7m_nvic.h" #endif #include "sysemu/tcg.h" #include "sysemu/qtest.h" diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c index b4964dca8a8..25de64c43c9 100644 --- a/target/arm/m_helper.c +++ b/target/arm/m_helper.c @@ -1015,7 +1015,7 @@ static void v7m_update_fpccr(CPUARMState *env, uint32= _t frameptr, * that we will need later in order to do lazy FP reg stacking. */ bool is_secure =3D env->v7m.secure; - void *nvic =3D env->nvic; + NVICState *nvic =3D env->nvic; /* * Some bits are unbanked and live always in fpccr[M_REG_S]; some bits * are banked and we want to update the bit in the bank for the --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20230206223502.25122-12-philmd@linaro.org Signed-off-by: Peter Maydell --- include/hw/intc/armv7m_nvic.h | 123 ++++++++++++++++++++++++++++++++++ target/arm/cpu.h | 123 ---------------------------------- target/arm/cpu.c | 4 +- target/arm/cpu_tcg.c | 3 + target/arm/m_helper.c | 3 + 5 files changed, 132 insertions(+), 124 deletions(-) diff --git a/include/hw/intc/armv7m_nvic.h b/include/hw/intc/armv7m_nvic.h index 07f9c21a5f3..1ca262fbf82 100644 --- a/include/hw/intc/armv7m_nvic.h +++ b/include/hw/intc/armv7m_nvic.h @@ -83,4 +83,127 @@ struct NVICState { qemu_irq sysresetreq; }; =20 +/* Interface between CPU and Interrupt controller. */ +/** + * armv7m_nvic_set_pending: mark the specified exception as pending + * @s: the NVIC + * @irq: the exception number to mark pending + * @secure: false for non-banked exceptions or for the nonsecure + * version of a banked exception, true for the secure version of a banked + * exception. + * + * Marks the specified exception as pending. Note that we will assert() + * if @secure is true and @irq does not specify one of the fixed set + * of architecturally banked exceptions. + */ +void armv7m_nvic_set_pending(NVICState *s, int irq, bool secure); +/** + * armv7m_nvic_set_pending_derived: mark this derived exception as pending + * @s: the NVIC + * @irq: the exception number to mark pending + * @secure: false for non-banked exceptions or for the nonsecure + * version of a banked exception, true for the secure version of a banked + * exception. + * + * Similar to armv7m_nvic_set_pending(), but specifically for derived + * exceptions (exceptions generated in the course of trying to take + * a different exception). + */ +void armv7m_nvic_set_pending_derived(NVICState *s, int irq, bool secure); +/** + * armv7m_nvic_set_pending_lazyfp: mark this lazy FP exception as pending + * @s: the NVIC + * @irq: the exception number to mark pending + * @secure: false for non-banked exceptions or for the nonsecure + * version of a banked exception, true for the secure version of a banked + * exception. + * + * Similar to armv7m_nvic_set_pending(), but specifically for exceptions + * generated in the course of lazy stacking of FP registers. + */ +void armv7m_nvic_set_pending_lazyfp(NVICState *s, int irq, bool secure); +/** + * armv7m_nvic_get_pending_irq_info: return highest priority pending + * exception, and whether it targets Secure state + * @s: the NVIC + * @pirq: set to pending exception number + * @ptargets_secure: set to whether pending exception targets Secure + * + * This function writes the number of the highest priority pending + * exception (the one which would be made active by + * armv7m_nvic_acknowledge_irq()) to @pirq, and sets @ptargets_secure + * to true if the current highest priority pending exception should + * be taken to Secure state, false for NS. + */ +void armv7m_nvic_get_pending_irq_info(NVICState *s, int *pirq, + bool *ptargets_secure); +/** + * armv7m_nvic_acknowledge_irq: make highest priority pending exception ac= tive + * @s: the NVIC + * + * Move the current highest priority pending exception from the pending + * state to the active state, and update v7m.exception to indicate that + * it is the exception currently being handled. + */ +void armv7m_nvic_acknowledge_irq(NVICState *s); +/** + * armv7m_nvic_complete_irq: complete specified interrupt or exception + * @s: the NVIC + * @irq: the exception number to complete + * @secure: true if this exception was secure + * + * Returns: -1 if the irq was not active + * 1 if completing this irq brought us back to base (no active i= rqs) + * 0 if there is still an irq active after this one was completed + * (Ignoring -1, this is the same as the RETTOBASE value before completion= .) + */ +int armv7m_nvic_complete_irq(NVICState *s, int irq, bool secure); +/** + * armv7m_nvic_get_ready_status(void *opaque, int irq, bool secure) + * @s: the NVIC + * @irq: the exception number to mark pending + * @secure: false for non-banked exceptions or for the nonsecure + * version of a banked exception, true for the secure version of a banked + * exception. + * + * Return whether an exception is "ready", i.e. whether the exception is + * enabled and is configured at a priority which would allow it to + * interrupt the current execution priority. This controls whether the + * RDY bit for it in the FPCCR is set. + */ +bool armv7m_nvic_get_ready_status(NVICState *s, int irq, bool secure); +/** + * armv7m_nvic_raw_execution_priority: return the raw execution priority + * @s: the NVIC + * + * Returns: the raw execution priority as defined by the v8M architecture. + * This is the execution priority minus the effects of AIRCR.PRIS, + * and minus any PRIMASK/FAULTMASK/BASEPRI priority boosting. + * (v8M ARM ARM I_PKLD.) + */ +int armv7m_nvic_raw_execution_priority(NVICState *s); +/** + * armv7m_nvic_neg_prio_requested: return true if the requested execution + * priority is negative for the specified security state. + * @s: the NVIC + * @secure: the security state to test + * This corresponds to the pseudocode IsReqExecPriNeg(). + */ +#ifndef CONFIG_USER_ONLY +bool armv7m_nvic_neg_prio_requested(NVICState *s, bool secure); +#else +static inline bool armv7m_nvic_neg_prio_requested(NVICState *s, bool secur= e) +{ + return false; +} +#endif +#ifndef CONFIG_USER_ONLY +bool armv7m_nvic_can_take_pending_exception(NVICState *s); +#else +static inline bool armv7m_nvic_can_take_pending_exception(NVICState *s) +{ + return true; +} +#endif + #endif diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 9a80819d8d9..d623afe84af 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2559,129 +2559,6 @@ void arm_cpu_list(void); uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t excp_idx, uint32_t cur_el, bool secure); =20 -/* Interface between CPU and Interrupt controller. */ -#ifndef CONFIG_USER_ONLY -bool armv7m_nvic_can_take_pending_exception(NVICState *s); -#else -static inline bool armv7m_nvic_can_take_pending_exception(NVICState *s) -{ - return true; -} -#endif -/** - * armv7m_nvic_set_pending: mark the specified exception as pending - * @s: the NVIC - * @irq: the exception number to mark pending - * @secure: false for non-banked exceptions or for the nonsecure - * version of a banked exception, true for the secure version of a banked - * exception. - * - * Marks the specified exception as pending. Note that we will assert() - * if @secure is true and @irq does not specify one of the fixed set - * of architecturally banked exceptions. - */ -void armv7m_nvic_set_pending(NVICState *s, int irq, bool secure); -/** - * armv7m_nvic_set_pending_derived: mark this derived exception as pending - * @s: the NVIC - * @irq: the exception number to mark pending - * @secure: false for non-banked exceptions or for the nonsecure - * version of a banked exception, true for the secure version of a banked - * exception. - * - * Similar to armv7m_nvic_set_pending(), but specifically for derived - * exceptions (exceptions generated in the course of trying to take - * a different exception). - */ -void armv7m_nvic_set_pending_derived(NVICState *s, int irq, bool secure); -/** - * armv7m_nvic_set_pending_lazyfp: mark this lazy FP exception as pending - * @s: the NVIC - * @irq: the exception number to mark pending - * @secure: false for non-banked exceptions or for the nonsecure - * version of a banked exception, true for the secure version of a banked - * exception. - * - * Similar to armv7m_nvic_set_pending(), but specifically for exceptions - * generated in the course of lazy stacking of FP registers. - */ -void armv7m_nvic_set_pending_lazyfp(NVICState *s, int irq, bool secure); -/** - * armv7m_nvic_get_pending_irq_info: return highest priority pending - * exception, and whether it targets Secure state - * @s: the NVIC - * @pirq: set to pending exception number - * @ptargets_secure: set to whether pending exception targets Secure - * - * This function writes the number of the highest priority pending - * exception (the one which would be made active by - * armv7m_nvic_acknowledge_irq()) to @pirq, and sets @ptargets_secure - * to true if the current highest priority pending exception should - * be taken to Secure state, false for NS. - */ -void armv7m_nvic_get_pending_irq_info(NVICState *s, int *pirq, - bool *ptargets_secure); -/** - * armv7m_nvic_acknowledge_irq: make highest priority pending exception ac= tive - * @s: the NVIC - * - * Move the current highest priority pending exception from the pending - * state to the active state, and update v7m.exception to indicate that - * it is the exception currently being handled. - */ -void armv7m_nvic_acknowledge_irq(NVICState *s); -/** - * armv7m_nvic_complete_irq: complete specified interrupt or exception - * @s: the NVIC - * @irq: the exception number to complete - * @secure: true if this exception was secure - * - * Returns: -1 if the irq was not active - * 1 if completing this irq brought us back to base (no active i= rqs) - * 0 if there is still an irq active after this one was completed - * (Ignoring -1, this is the same as the RETTOBASE value before completion= .) - */ -int armv7m_nvic_complete_irq(NVICState *s, int irq, bool secure); -/** - * armv7m_nvic_get_ready_status(void *opaque, int irq, bool secure) - * @s: the NVIC - * @irq: the exception number to mark pending - * @secure: false for non-banked exceptions or for the nonsecure - * version of a banked exception, true for the secure version of a banked - * exception. - * - * Return whether an exception is "ready", i.e. whether the exception is - * enabled and is configured at a priority which would allow it to - * interrupt the current execution priority. This controls whether the - * RDY bit for it in the FPCCR is set. - */ -bool armv7m_nvic_get_ready_status(NVICState *s, int irq, bool secure); -/** - * armv7m_nvic_raw_execution_priority: return the raw execution priority - * @s: the NVIC - * - * Returns: the raw execution priority as defined by the v8M architecture. - * This is the execution priority minus the effects of AIRCR.PRIS, - * and minus any PRIMASK/FAULTMASK/BASEPRI priority boosting. - * (v8M ARM ARM I_PKLD.) - */ -int armv7m_nvic_raw_execution_priority(NVICState *s); -/** - * armv7m_nvic_neg_prio_requested: return true if the requested execution - * priority is negative for the specified security state. - * @s: the NVIC - * @secure: the security state to test - * This corresponds to the pseudocode IsReqExecPriNeg(). - */ -#ifndef CONFIG_USER_ONLY -bool armv7m_nvic_neg_prio_requested(NVICState *s, bool secure); -#else -static inline bool armv7m_nvic_neg_prio_requested(NVICState *s, bool secur= e) -{ - return false; -} -#endif - /* Interface for defining coprocessor registers. * Registers are defined in tables of arm_cp_reginfo structs * which are passed to define_arm_cp_regs(). diff --git a/target/arm/cpu.c b/target/arm/cpu.c index b3a2275b087..876ab8f3bf8 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -36,8 +36,10 @@ #if !defined(CONFIG_USER_ONLY) #include "hw/loader.h" #include "hw/boards.h" +#ifdef CONFIG_TCG #include "hw/intc/armv7m_nvic.h" -#endif +#endif /* CONFIG_TCG */ +#endif /* !CONFIG_USER_ONLY */ #include "sysemu/tcg.h" #include "sysemu/qtest.h" #include "sysemu/hw_accel.h" diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c index ccde5080eb7..df0c45e523b 100644 --- a/target/arm/cpu_tcg.c +++ b/target/arm/cpu_tcg.c @@ -19,6 +19,9 @@ #include "hw/boards.h" #endif #include "cpregs.h" +#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG) +#include "hw/intc/armv7m_nvic.h" +#endif =20 =20 /* Share AArch32 -cpu max features with AArch64. */ diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c index 25de64c43c9..f94e87e7289 100644 --- a/target/arm/m_helper.c +++ b/target/arm/m_helper.c @@ -18,6 +18,9 @@ #include "exec/cpu_ldst.h" #include "semihosting/common-semi.h" #endif +#if !defined(CONFIG_USER_ONLY) +#include "hw/intc/armv7m_nvic.h" +#endif =20 static void v7m_msr_xpsr(CPUARMState *env, uint32_t mask, uint32_t reg, uint32_t val) --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567683; cv=none; d=zohomail.com; s=zohoarc; b=CEpqecGdo4+2K9axHNWMBUSNjTa+FR9hC4euAA9Qr1AFrCB4axV1X92r+3MhI0KHn4+6oe6JDIHaQ7g9DEp573q8PIs0d27YLsqxpPPxhisIGZtoR0Q1gS9G/uYfhUIX/yP8mqSFv6fJ0RdVkg1cISHb+TyHWcWdETBpydpf3WQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567683; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=I41Rq1BCBKNBN1fSGYnJWT1+PVJR4PoFDqsrj7M3m7k=; b=jBKMrJe9L8meI+cBHl3W1eVyKtNO1/wBAwKQ++hOyj6mQiU/Rbupwk8xJAWRy0RPqXv3QCFofEl1Cy9KT/vnBP9EhSYvMNOv4A7EQ/rWpOBQAkJMZHmFuSoYsCL8De7CjhUpTVhGVxK7eMId8y62WA93hxjsu6aB70aPz7ITYeU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1676567683226191.344509891548; Thu, 16 Feb 2023 09:14:43 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShnJ-0008Bl-Fn; Thu, 16 Feb 2023 12:11:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShnH-0008AW-Tk for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:39 -0500 Received: from mail-wm1-x329.google.com ([2a00:1450:4864:20::329]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShnE-0007qg-QN for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:39 -0500 Received: by mail-wm1-x329.google.com with SMTP id o19-20020a05600c379300b003e21af96703so1025730wmr.2 for ; Thu, 16 Feb 2023 09:11:36 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.34 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=I41Rq1BCBKNBN1fSGYnJWT1+PVJR4PoFDqsrj7M3m7k=; b=bJ45PsBVW4PEH8/9BhxIJl+rrow6MvmSOiRQqDUkR+PcmAzBjUSwUZra8rrMynr9ia YphbI0t+Sw44+GkO68obo+BL74DpjMF2u0EJ10uvw6q7QbyKrJ8iRCi1nl3C1RDNzPa2 Vx3mJfo18m3MIvMylaHEWdM2Fniw/lXUSXPoMlry0HD6HgQs1z7rWXHeB1Tj+QMgAN3c FekF+j4sGEZube6LCslLi8xmUYFxrpZ4J6AquSyjH+zOPmAs32WZ171esAH+DRN0EYlu LGGkwfC85XUmx3t2TwY89HOT7tIxyLPaLDcauhtjfv+HV2vFzYYvrOD0EaI/B/it02kV 2SOQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=I41Rq1BCBKNBN1fSGYnJWT1+PVJR4PoFDqsrj7M3m7k=; b=b9k0pp04D2eGER+AkURcZ033DhHxRLzlV0TC7riuv3545VRGRm7W5L8rIhcGCc/Wsb +OeUt+2njl4fcLxbyVRf/eiadUXP6ggW+xI9pexc/VNTlfTVuXsfL+zAWGe/Z8ogGK40 2ijW6fXMcuglS7PeWLblpxpw5pdDVcBdnSK4j8kjRQtfc/Mu0uqqqIQYGO9GWSNdtwXo Zu5BvXez8TJEGQj/SAcMIft+kZaq4oj9I/RrCVaRsjVXCYEnHgs3wdMs6Jq8gFkMT26H 9AuA9be88H00Wksu2MozixLFm0wYpJPJgHILrk0W1kCyyrLg1syr2ZwNCR0B9Qe14KMP lgTg== X-Gm-Message-State: AO0yUKWOyEYWjCyzrHLQnFt6PUsMjkmYz+OFlsXolUMVsrZM7VOJrHij 4pQkb52juRodR2/Xzo598dCXD/blzFsjUgyp X-Google-Smtp-Source: AK7set+IBI4fB7WaduzZDpecSvegY69VFKJ1heol3c8UQXfpT1buQxkFYsAUJ8ZOxx54J9dJp5mK4A== X-Received: by 2002:a05:600c:4486:b0:3e0:185:e916 with SMTP id e6-20020a05600c448600b003e00185e916mr5729630wmo.13.1676567495525; Thu, 16 Feb 2023 09:11:35 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 12/30] tests/avocado: retire the Aarch64 TCG tests from boot_linux.py Date: Thu, 16 Feb 2023 17:11:05 +0000 Message-Id: <20230216171123.2518285-13-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567684881100003 From: Alex Benn=C3=A9e The two TCG tests for GICv2 and GICv3 are very heavy weight distros that take a long time to boot up, especially for an --enable-debug build. The total code coverage they give is: Overall coverage rate: lines......: 11.2% (59584 of 530123 lines) functions..: 15.0% (7436 of 49443 functions) branches...: 6.3% (19273 of 303933 branches) We already get pretty close to that with the machine_aarch64_virt tests which only does one full boot (~120s vs ~600s) of alpine. We expand the kernel+initrd boot (~8s) to test both GICs and also add an RNG device and a block device to generate a few IRQs and exercise the storage layer. With that we get to a coverage of: Overall coverage rate: lines......: 11.0% (58121 of 530123 lines) functions..: 14.9% (7343 of 49443 functions) branches...: 6.0% (18269 of 303933 branches) which I feel is close enough given the massive time saving. If we want to target any more sub-systems we can use lighter weight more directed tests. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Fabiano Rosas Acked-by: Richard Henderson Message-id: 20230203181632.2919715-1-alex.bennee@linaro.org Cc: Peter Maydell Signed-off-by: Peter Maydell --- tests/avocado/boot_linux.py | 48 ++++---------------- tests/avocado/machine_aarch64_virt.py | 63 ++++++++++++++++++++++++--- 2 files changed, 65 insertions(+), 46 deletions(-) diff --git a/tests/avocado/boot_linux.py b/tests/avocado/boot_linux.py index b3e58fa3093..fe0bb180d90 100644 --- a/tests/avocado/boot_linux.py +++ b/tests/avocado/boot_linux.py @@ -58,52 +58,16 @@ def test_pc_q35_kvm(self): self.launch_and_wait(set_up_ssh_connection=3DFalse) =20 =20 -# For Aarch64 we only boot KVM tests in CI as the TCG tests are very -# heavyweight. There are lighter weight distros which we use in the -# machine_aarch64_virt.py tests. +# For Aarch64 we only boot KVM tests in CI as booting the current +# Fedora OS in TCG tests is very heavyweight. There are lighter weight +# distros which we use in the machine_aarch64_virt.py tests. class BootLinuxAarch64(LinuxTest): """ :avocado: tags=3Darch:aarch64 :avocado: tags=3Dmachine:virt - :avocado: tags=3Dmachine:gic-version=3D2 """ timeout =3D 720 =20 - def add_common_args(self): - self.vm.add_args('-bios', - os.path.join(BUILD_DIR, 'pc-bios', - 'edk2-aarch64-code.fd')) - self.vm.add_args('-device', 'virtio-rng-pci,rng=3Drng0') - self.vm.add_args('-object', 'rng-random,id=3Drng0,filename=3D/dev/= urandom') - - @skipIf(os.getenv('GITLAB_CI'), 'Running on GitLab') - def test_fedora_cloud_tcg_gicv2(self): - """ - :avocado: tags=3Daccel:tcg - :avocado: tags=3Dcpu:max - :avocado: tags=3Ddevice:gicv2 - """ - self.require_accelerator("tcg") - self.vm.add_args("-accel", "tcg") - self.vm.add_args("-cpu", "max,lpa2=3Doff") - self.vm.add_args("-machine", "virt,gic-version=3D2") - self.add_common_args() - self.launch_and_wait(set_up_ssh_connection=3DFalse) - - @skipIf(os.getenv('GITLAB_CI'), 'Running on GitLab') - def test_fedora_cloud_tcg_gicv3(self): - """ - :avocado: tags=3Daccel:tcg - :avocado: tags=3Dcpu:max - :avocado: tags=3Ddevice:gicv3 - """ - self.require_accelerator("tcg") - self.vm.add_args("-accel", "tcg") - self.vm.add_args("-cpu", "max,lpa2=3Doff") - self.vm.add_args("-machine", "virt,gic-version=3D3") - self.add_common_args() - self.launch_and_wait(set_up_ssh_connection=3DFalse) - def test_virt_kvm(self): """ :avocado: tags=3Daccel:kvm @@ -112,7 +76,11 @@ def test_virt_kvm(self): self.require_accelerator("kvm") self.vm.add_args("-accel", "kvm") self.vm.add_args("-machine", "virt,gic-version=3Dhost") - self.add_common_args() + self.vm.add_args('-bios', + os.path.join(BUILD_DIR, 'pc-bios', + 'edk2-aarch64-code.fd')) + self.vm.add_args('-device', 'virtio-rng-pci,rng=3Drng0') + self.vm.add_args('-object', 'rng-random,id=3Drng0,filename=3D/dev/= urandom') self.launch_and_wait(set_up_ssh_connection=3DFalse) =20 =20 diff --git a/tests/avocado/machine_aarch64_virt.py b/tests/avocado/machine_= aarch64_virt.py index c2b2ba2cf87..25dab8dc00a 100644 --- a/tests/avocado/machine_aarch64_virt.py +++ b/tests/avocado/machine_aarch64_virt.py @@ -10,11 +10,14 @@ =20 import time import os +import logging =20 from avocado_qemu import QemuSystemTest from avocado_qemu import wait_for_console_pattern from avocado_qemu import exec_command from avocado_qemu import BUILD_DIR +from avocado.utils import process +from avocado.utils.path import find_command =20 class Aarch64VirtMachine(QemuSystemTest): KERNEL_COMMON_COMMAND_LINE =3D 'printk.time=3D0 ' @@ -65,16 +68,15 @@ def test_alpine_virt_tcg_gic_max(self): self.wait_for_console_pattern('Welcome to Alpine Linux 3.16') =20 =20 - def test_aarch64_virt(self): + def common_aarch64_virt(self, machine): """ - :avocado: tags=3Darch:aarch64 - :avocado: tags=3Dmachine:virt - :avocado: tags=3Daccel:tcg - :avocado: tags=3Dcpu:max + Common code to launch basic virt machine with kernel+initrd + and a scratch disk. """ + logger =3D logging.getLogger('aarch64_virt') + kernel_url =3D ('https://fileserver.linaro.org/s/' 'z6B2ARM7DQT3HWN/download') - kernel_hash =3D 'ed11daab50c151dde0e1e9c9cb8b2d9bd3215347' kernel_path =3D self.fetch_asset(kernel_url, asset_hash=3Dkernel_h= ash) =20 @@ -83,13 +85,62 @@ def test_aarch64_virt(self): 'console=3DttyAMA0') self.require_accelerator("tcg") self.vm.add_args('-cpu', 'max,pauth-impdef=3Don', + '-machine', machine, '-accel', 'tcg', '-kernel', kernel_path, '-append', kernel_command_line) + + # A RNG offers an easy way to generate a few IRQs + self.vm.add_args('-device', 'virtio-rng-pci,rng=3Drng0') + self.vm.add_args('-object', + 'rng-random,id=3Drng0,filename=3D/dev/urandom') + + # Also add a scratch block device + logger.info('creating scratch qcow2 image') + image_path =3D os.path.join(self.workdir, 'scratch.qcow2') + qemu_img =3D os.path.join(BUILD_DIR, 'qemu-img') + if not os.path.exists(qemu_img): + qemu_img =3D find_command('qemu-img', False) + if qemu_img is False: + self.cancel('Could not find "qemu-img", which is required to ' + 'create the temporary qcow2 image') + cmd =3D '%s create -f qcow2 %s 8M' % (qemu_img, image_path) + process.run(cmd) + + # Add the device + self.vm.add_args('-blockdev', + f"driver=3Dqcow2,file.driver=3Dfile,file.filename= =3D{image_path},node-name=3Dscratch") + self.vm.add_args('-device', + 'virtio-blk-device,drive=3Dscratch') + self.vm.launch() self.wait_for_console_pattern('Welcome to Buildroot') time.sleep(0.1) exec_command(self, 'root') time.sleep(0.1) + exec_command(self, 'dd if=3D/dev/hwrng of=3D/dev/vda bs=3D512 coun= t=3D4') + time.sleep(0.1) + exec_command(self, 'md5sum /dev/vda') + time.sleep(0.1) + exec_command(self, 'cat /proc/interrupts') + time.sleep(0.1) exec_command(self, 'cat /proc/self/maps') time.sleep(0.1) + + def test_aarch64_virt_gicv3(self): + """ + :avocado: tags=3Darch:aarch64 + :avocado: tags=3Dmachine:virt + :avocado: tags=3Daccel:tcg + :avocado: tags=3Dcpu:max + """ + self.common_aarch64_virt("virt,gic_version=3D3") + + def test_aarch64_virt_gicv2(self): + """ + :avocado: tags=3Darch:aarch64 + :avocado: tags=3Dmachine:virt + :avocado: tags=3Daccel:tcg + :avocado: tags=3Dcpu:max + """ + self.common_aarch64_virt("virt,gic-version=3D2") --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567747; cv=none; d=zohomail.com; s=zohoarc; b=CzY/fgKURn/B6h/KbjQ3SrvAN2zjbyeXTnNw7znO4itqo1IPGamcbOvgznMvxJbaqbq8gp+Fg9wh0BfZQr+maf+Q6RUNZcDApN7UIwFRbRY6QWLgFSIRsh5H0N1iOPWFoAnKnCPj7HR6naGu6Bj9HPhu6n0g3KcmOZ8SwEsPAKA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567747; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=if/qVtarW27gDMcczuPNTXDooSW2u0gTRRM5vrJgeIM=; b=jXZe1SUASzj9YDFcrpdwArbGao7lHI54lKyYFu1ANitnbuNw+1QSprbm0DM6QFWTJCkVXwEzg/WAYCsz9GUJTbdNqZexV+lI9f88L4YAQsKbC9RbiJI4jCutVEnsQpXc+BHeNj7ybAxv6zo1zddoqMBhySbX85pUzDVbZyYNRqk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1676567747678977.4285417032459; Thu, 16 Feb 2023 09:15:47 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShnK-0008Dc-70; Thu, 16 Feb 2023 12:11:42 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShnI-0008Ai-6p for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:40 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShnF-0007rB-Qr for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:39 -0500 Received: by mail-wm1-x330.google.com with SMTP id n36so1353068wmr.1 for ; Thu, 16 Feb 2023 09:11:37 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.35 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=if/qVtarW27gDMcczuPNTXDooSW2u0gTRRM5vrJgeIM=; b=UIKX+HkTPmRT2noEhm5MvVWfOHFQ+upaT8l787oY0zXaiZzQHgL4gFnI+tPY+9+Q8C OCz1Pi9E2E6DAtFeNYiZXURASlgaQa6vFO36D0ibe5bi/1Mi28cSiaSDfxIL8b5ok5J1 BuN9CRKHmUVxWdn9TFWIW1ZoqSi7r4Knro37hDleMdvumMoiqtDByKnT0GPaRWTRmnN5 5EOa82LqdjPwTilyZsdiZab7xj/UQ7ucuin+NjM+NVgyMR4YonpUGPCLB2DFP6jWjecW TnXxbejUsPT7wB/XgoztJ+H2KMMV9041BKlL/Rb04eCK9O+ipH9OkJ7hNBhFzCIuRicm fX/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=if/qVtarW27gDMcczuPNTXDooSW2u0gTRRM5vrJgeIM=; b=PFYCxgP8gbWPgOwHBNwm3O9AxqDqtCVcq2gSe9f33OkW9uUGnA1kd5RHXCnf8VmOsc ISSbbNuhUj0AgWWjM5UtDq3w5zQchUoQDE+s5e0LfhqsPBQgOrbSt70QB10Z73SE92Rj 8wTb2tEnbjFcrkkKjVNqJkNf+VpgQbhLzbyxTHFQPswp0AOIT4knW1oWxI3JEF8b9Q1S STEGJfof1Cdn++gqvItsMal7BJEXBoZe5FDZHmAcMcP/PEjVpYPG+MdSGCrNdX2KzAP4 b121TjR2+InO0wcWtqQ8I2IR40SVJkn1RYjFE22c8Jrd5TkqmctZ/ouNEm0AA7WdIgRZ +b2g== X-Gm-Message-State: AO0yUKV5tpjD93RZNB0JTQ6ksLm6clsIqbarWpd6E7jseUGg3fCQPLdZ ImvXjrXlAXvfqK4YfKfoYCNxQLhsi/qYZAnG X-Google-Smtp-Source: AK7set8GYxst5pd0ivbkHSe947OheV4edxWNcHJHSE31Lu1J2OTg0677E4Q63EXZdUDx5BK34DfYGQ== X-Received: by 2002:a05:600c:13c3:b0:3e2:9b5:c2c3 with SMTP id e3-20020a05600c13c300b003e209b5c2c3mr2504387wmg.22.1676567496269; Thu, 16 Feb 2023 09:11:36 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 13/30] hw/arm/smmuv3: Add GBPA register Date: Thu, 16 Feb 2023 17:11:06 +0000 Message-Id: <20230216171123.2518285-14-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567749297100017 Content-Type: text/plain; charset="utf-8" From: Mostafa Saleh GBPA register can be used to globally abort all transactions. It is described in the SMMU manual in "6.3.14 SMMU_GBPA". ABORT reset value is IMPLEMENTATION DEFINED, it is chosen to be zero(Do not abort incoming transactions). Other fields have default values of Use Incoming. If UPDATE is not set, the write is ignored. This is the only permitted behavior in SMMUv3.2 and later.(6.3.14.1 Update procedure) As this patch adds a new state to the SMMU (GBPA), it is added in a new subsection for forward migration compatibility. GBPA is only migrated if its value is different from the reset value. It does this to be backward migration compatible if SW didn't write the register. Signed-off-by: Mostafa Saleh Reviewed-by: Richard Henderson Reviewed-by: Eric Auger Message-id: 20230214094009.2445653-1-smostafa@google.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/arm/smmuv3-internal.h | 7 +++++++ include/hw/arm/smmuv3.h | 1 + hw/arm/smmuv3.c | 43 +++++++++++++++++++++++++++++++++++++++- 3 files changed, 50 insertions(+), 1 deletion(-) diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h index bce161870f6..e8f0ebf25e3 100644 --- a/hw/arm/smmuv3-internal.h +++ b/hw/arm/smmuv3-internal.h @@ -79,6 +79,13 @@ REG32(CR0ACK, 0x24) REG32(CR1, 0x28) REG32(CR2, 0x2c) REG32(STATUSR, 0x40) +REG32(GBPA, 0x44) + FIELD(GBPA, ABORT, 20, 1) + FIELD(GBPA, UPDATE, 31, 1) + +/* Use incoming. */ +#define SMMU_GBPA_RESET_VAL 0x1000 + REG32(IRQ_CTRL, 0x50) FIELD(IRQ_CTRL, GERROR_IRQEN, 0, 1) FIELD(IRQ_CTRL, PRI_IRQEN, 1, 1) diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h index b6dd0875264..a0c026402e1 100644 --- a/include/hw/arm/smmuv3.h +++ b/include/hw/arm/smmuv3.h @@ -45,6 +45,7 @@ struct SMMUv3State { uint32_t cr[3]; uint32_t cr0ack; uint32_t statusr; + uint32_t gbpa; uint32_t irq_ctrl; uint32_t gerror; uint32_t gerrorn; diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 955b89c8d59..270c80b665f 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -285,6 +285,7 @@ static void smmuv3_init_regs(SMMUv3State *s) s->gerror =3D 0; s->gerrorn =3D 0; s->statusr =3D 0; + s->gbpa =3D SMMU_GBPA_RESET_VAL; } =20 static int smmu_get_ste(SMMUv3State *s, dma_addr_t addr, STE *buf, @@ -659,7 +660,11 @@ static IOMMUTLBEntry smmuv3_translate(IOMMUMemoryRegio= n *mr, hwaddr addr, qemu_mutex_lock(&s->mutex); =20 if (!smmu_enabled(s)) { - status =3D SMMU_TRANS_DISABLE; + if (FIELD_EX32(s->gbpa, GBPA, ABORT)) { + status =3D SMMU_TRANS_ABORT; + } else { + status =3D SMMU_TRANS_DISABLE; + } goto epilogue; } =20 @@ -1170,6 +1175,16 @@ static MemTxResult smmu_writel(SMMUv3State *s, hwadd= r offset, case A_GERROR_IRQ_CFG2: s->gerror_irq_cfg2 =3D data; return MEMTX_OK; + case A_GBPA: + /* + * If UPDATE is not set, the write is ignored. This is the only + * permitted behavior in SMMUv3.2 and later. + */ + if (data & R_GBPA_UPDATE_MASK) { + /* Ignore update bit as write is synchronous. */ + s->gbpa =3D data & ~R_GBPA_UPDATE_MASK; + } + return MEMTX_OK; case A_STRTAB_BASE: /* 64b */ s->strtab_base =3D deposit64(s->strtab_base, 0, 32, data); return MEMTX_OK; @@ -1318,6 +1333,9 @@ static MemTxResult smmu_readl(SMMUv3State *s, hwaddr = offset, case A_STATUSR: *data =3D s->statusr; return MEMTX_OK; + case A_GBPA: + *data =3D s->gbpa; + return MEMTX_OK; case A_IRQ_CTRL: case A_IRQ_CTRL_ACK: *data =3D s->irq_ctrl; @@ -1482,6 +1500,25 @@ static const VMStateDescription vmstate_smmuv3_queue= =3D { }, }; =20 +static bool smmuv3_gbpa_needed(void *opaque) +{ + SMMUv3State *s =3D opaque; + + /* Only migrate GBPA if it has different reset value. */ + return s->gbpa !=3D SMMU_GBPA_RESET_VAL; +} + +static const VMStateDescription vmstate_gbpa =3D { + .name =3D "smmuv3/gbpa", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D smmuv3_gbpa_needed, + .fields =3D (VMStateField[]) { + VMSTATE_UINT32(gbpa, SMMUv3State), + VMSTATE_END_OF_LIST() + } +}; + static const VMStateDescription vmstate_smmuv3 =3D { .name =3D "smmuv3", .version_id =3D 1, @@ -1512,6 +1549,10 @@ static const VMStateDescription vmstate_smmuv3 =3D { =20 VMSTATE_END_OF_LIST(), }, + .subsections =3D (const VMStateDescription * []) { + &vmstate_gbpa, + NULL + } }; =20 static void smmuv3_instance_init(Object *obj) --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567721; cv=none; d=zohomail.com; s=zohoarc; b=CZWggzkkeCrmbhztd3jxEdsrMoVwNSgCIWOMZnvBkwIzQA1yo1bSqeWETZXEx8nKRJDyw8NjOr81CwUpFzm19YfI2xCifnK6Fkeo4U3m8N9dZMaAnth2E0f4dPGwuoUiLA/PPVuBYCsL1PASjSi5OrgCy32ws+TiW1MaDRg27TQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567721; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=AerA0OknWJqQzriuIbTWlCJrYfPW5ifmeAoCsYc7SKg=; b=FBLFA8S7fiv8XtkOC0PJfMre20Qe8WDZoi18CkDUIiXLJTGL+UUTHUpTspVprgDBk8Pn/OYVgsovPLuxQlwMWDMEpKw4nKCZouZWr/wQIN7g3oNTWKPfh+1ka/3o1whc8XO/GsbUdkC5V0woK92jb7YgDMQ9VTxgrlwKwbV+g0E= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1676567721354164.81374898141155; Thu, 16 Feb 2023 09:15:21 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShnI-0008Aq-G3; Thu, 16 Feb 2023 12:11:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShnH-00087o-C7 for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:39 -0500 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShnF-0007o5-Op for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:39 -0500 Received: by mail-wr1-x42d.google.com with SMTP id v30so1349747wrv.3 for ; Thu, 16 Feb 2023 09:11:37 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.36 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=AerA0OknWJqQzriuIbTWlCJrYfPW5ifmeAoCsYc7SKg=; b=r7mTDzJAcr6woh0tuC5Fyaoqma8R1LH4HCS1p2687KkooPJd1oC5Qg41Nn3KPrCqhG vEz2EPls7oDlINufY8cXzpXC+eKj+haQTah3gZzAHvFJJjhx7EQgPHMdO3/MRvjnA5if Y0VYIvT25jf1Ce+xFYgG6HfWU14olDNIeyozI0XMMKMgnUWs525Br5nhVSBFVQpP3pNZ 049QtALXefa1Lhh5jU2UhO8QZ1QZuHOSxRjlYdGHcgZAHQ4yo5MdiIBQNPrQR3cMi1z5 PLEnedjGrwlU9iJeldubASZn4LFHZvOAq+VNYkhInZBiPLaI4hQ8fbdEC92rPY2sH6JO XmOw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AerA0OknWJqQzriuIbTWlCJrYfPW5ifmeAoCsYc7SKg=; b=codBWHWa9TrBIbNMzLCwMRpPISXYaw2zn2Uzazk4G1rlcommk6a0ZH8DA+ucmYcM1C CijhpLtrBxLMX+u3iEFYH3A/v1U63oQ6ZTCed2djHY9QrUehyW83JEY9C2HACaTPuvgE xhDwp5sjU1FAhDMMFs1p7odjkI8tQer4MJCieHyMk1zZCK2bTZhPWkJ2Ciw6eQAI3f3k /Jh0HJGv+dNecNDxSNkUes7NhgM9fsMkyFndJiObz489Dh30kl0RczhcHDkgfIGDe2xa Y2UtCWrAapNoQfUCIZ2Lbfw0yMFC1EesKpei857IbdOXtOVxhd0uQWLlpLhu1PkIPVzu k8kw== X-Gm-Message-State: AO0yUKXhQWrYgrHlrhMQUXVmRJfUcs18iLSH/lBt0BjpDwWIFG7DIi2C c9+SBstGDeM9AqiW1RJQRa20Jsdjc/xGNTzI X-Google-Smtp-Source: AK7set8h7l2sgFxaRKW1sLcBOrBgbSyLrPQW1Gyv6uD3FWxq23TYIBFuK6LtzX39/HctGcp9/Qohqw== X-Received: by 2002:adf:f2c1:0:b0:2c3:f0a6:43e3 with SMTP id d1-20020adff2c1000000b002c3f0a643e3mr5274081wrp.39.1676567497123; Thu, 16 Feb 2023 09:11:37 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 14/30] hw/arm: Add missing XLNX_ZYNQMP_ARM -> USB_DWC3 Kconfig dependency Date: Thu, 16 Feb 2023 17:11:07 +0000 Message-Id: <20230216171123.2518285-15-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567723138100007 From: Philippe Mathieu-Daud=C3=A9 Since commit acc0b8b05a when running the ZynqMP ZCU102 board with a QEMU configured using --without-default-devices, we get: $ qemu-system-aarch64 -M xlnx-zcu102 qemu-system-aarch64: missing object type 'usb_dwc3' Abort trap: 6 Fix by adding the missing Kconfig dependency. Fixes: acc0b8b05a ("hw/arm/xlnx-zynqmp: Connect ZynqMP's USB controllers") Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20230216092327.2203-1-philmd@linaro.org Reviewed-by: Francisco Iglesias Signed-off-by: Peter Maydell --- hw/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 2d157de9b8b..b5aed4aff56 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -389,6 +389,7 @@ config XLNX_ZYNQMP_ARM select XLNX_CSU_DMA select XLNX_ZYNQMP select XLNX_ZDMA + select USB_DWC3 =20 config XLNX_VERSAL bool --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567741; cv=none; d=zohomail.com; s=zohoarc; b=IpWxY3u+EHY358WS7ehp3+eJS2CUDp0cmoUAlCfbsYDLnyeLEF3d8mOJg9/oE9V+c+zCuIXlBN6dR1QdEeUx0zrTEXbJDbHJqG7gE+RpuGBFl18SCCLcD0zqsllQc7EhlwuWZKMGgtOG6LVy3BCBaH12noOo46QizARTRih2+vw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567741; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=b/ZJPvKYLNs02JbKxyWAve6/lJ0RBSn21cgFd8J9qhw=; b=NOrkQsQk8WUhqJOtn4DRRkMrTdHCRGFjDibCkLMrZkKUkuwrc69Grh1lDefQ33Gv8vd1q1fGFnrWbc2Wgdw49N8xANQ2oWyew7kE1JS0WJcxZ2qRSFBesaXF3CRSfxPspBZCXtSRDgEsKu6MWS3GMKUkWO94Nc+fJmte1eMgCmA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 167656774181045.70818091290823; Thu, 16 Feb 2023 09:15:41 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShnK-0008EO-Me; Thu, 16 Feb 2023 12:11:42 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShnJ-0008Bb-1w for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:41 -0500 Received: from mail-wr1-x431.google.com ([2a00:1450:4864:20::431]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShnH-0007sY-GM for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:40 -0500 Received: by mail-wr1-x431.google.com with SMTP id o15so2519809wrc.9 for ; Thu, 16 Feb 2023 09:11:39 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.37 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=b/ZJPvKYLNs02JbKxyWAve6/lJ0RBSn21cgFd8J9qhw=; b=N/bTgqvLq/x6rhJOCGYWLDaW+b6ku9+Tf7tyNqG9vH7C7EC9DcFOGSA2u491T9nlet 27fmOMY+fXlG/Z2VqzBNzVaAJSxM00UAtliDF9M1D29pejtPLGUCu+rARtXUCSNNDheN WP9Ry7nE2GlkMn2MOJ5mzNgfSFXYi0b3AKQ8dx40odPp5IIxm9SXKeURXoPU5akdPFo9 lADCBp4UhVzrf3Vd2LoTNkxuWIOE8jOXUydVAiigwIKd4x7SrN3eJ6aM+dkP0Vzrb7Iv jgC+/o8ahUDYs4BCevqb9Y8ts+i1VofYnSRNIOjc42/RVi/jRErEvdYq0VcqpmPtGB5L o/SA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=b/ZJPvKYLNs02JbKxyWAve6/lJ0RBSn21cgFd8J9qhw=; b=5RULK+tGb9Tg0LI2BqqtJVSaUjZiEMLWuqvAQv6T4SvN0b3qimh6Tf9+02H0yxoKgg QXLX5lRiOSVUux4BcGuidn9WOFdOYlRRQLNLtwcKcBb9wt9tMCfModocZKrlgn6K8SR6 aAe7/76G5CmJcKqaA9m9hBQ9d9aKvqf2eZ5lZjJW5Y/2+xE35Q9jol+mYlUDM50aMX6Q cpf2/K1A9x+h0JOiH6o5F4HLTl84mxxcQ7urq2UWtCl493TmJ/Kwl9xYLp1FDqTNo9RY lWbvIek7DzeazvYxD+Mk0MEixVJKKVNXqu8l9fMoWWri88LE6a5W2CAWqVTkjwMUB3Jg dIkg== X-Gm-Message-State: AO0yUKW7yO1XlleWIVdC3Mx2vm6rKs5Lx//O7mGEkwULN8tGDX88cWKj /pU+Ric4XwwtxNMkR/AI8Yfwpe26GKMnikv4 X-Google-Smtp-Source: AK7set+B0Gz+bpSJ8hUCpOVlkW4wOH3f0QFFx91vdtgbGq+ni8qWJ+aflasEQCnJ+1sQlrdLtwar4Q== X-Received: by 2002:adf:f111:0:b0:2c5:586b:f53d with SMTP id r17-20020adff111000000b002c5586bf53dmr5085650wro.48.1676567498012; Thu, 16 Feb 2023 09:11:38 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 15/30] arm/virt: don't try to spell out the accelerator Date: Thu, 16 Feb 2023 17:11:08 +0000 Message-Id: <20230216171123.2518285-16-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567743359100005 Content-Type: text/plain; charset="utf-8" From: Cornelia Huck Just use current_accel_name() directly. Signed-off-by: Cornelia Huck Reviewed-by: Eric Auger Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell --- hw/arm/virt.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 75f28947de0..8d13e4486b1 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2133,21 +2133,21 @@ static void machvirt_init(MachineState *machine) if (vms->secure && (kvm_enabled() || hvf_enabled())) { error_report("mach-virt: %s does not support providing " "Security extensions (TrustZone) to the guest CPU", - kvm_enabled() ? "KVM" : "HVF"); + current_accel_name()); exit(1); } =20 if (vms->virt && (kvm_enabled() || hvf_enabled())) { error_report("mach-virt: %s does not support providing " "Virtualization extensions to the guest CPU", - kvm_enabled() ? "KVM" : "HVF"); + current_accel_name()); exit(1); } =20 if (vms->mte && (kvm_enabled() || hvf_enabled())) { error_report("mach-virt: %s does not support providing " "MTE to the guest CPU", - kvm_enabled() ? "KVM" : "HVF"); + current_accel_name()); exit(1); } =20 --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567585; cv=none; d=zohomail.com; s=zohoarc; b=bSyL2mKWrPhy3c0oFD/szVmGtIcKbw5OirvPGxV9IVNCI1bj0NP+zHcKTnBNpt6vmtQ/k+J2dRtEotx/wx+CE0inx9NjJpyt0fU1/ns8QJJsxP66OUNjHY0OqE/4pOo6o5OyVXTv4zbaroTxnHzHeTRqE4mijEAfZvqKbC9QPSk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567585; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=2zywtH9b/6tdry3j6/dUKW82Gbwh6aCOng5TK2UZt/4=; b=flS81philb2xGaEJkIoLQuEYOAS4c/8+LkM0EVG8nEKYZriiY+fDAN9vkZvKyXfw/P9o+b1J/H4Lr4BtA6ojW111sKn2QTl8DRpblUbuWDq7hZlkWpBv9uNpKvvLW3126KTxFgApLHN5tte9xbEe5oxjM9OAMijk05gOM6SNq8A= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16765675858641011.4099857288237; Thu, 16 Feb 2023 09:13:05 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShnM-0008Jx-1x; Thu, 16 Feb 2023 12:11:44 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShnJ-0008CE-QY for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:41 -0500 Received: from mail-wm1-x331.google.com ([2a00:1450:4864:20::331]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShnI-0007tG-89 for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:41 -0500 Received: by mail-wm1-x331.google.com with SMTP id n33so2119474wms.0 for ; Thu, 16 Feb 2023 09:11:39 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.38 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=2zywtH9b/6tdry3j6/dUKW82Gbwh6aCOng5TK2UZt/4=; b=ghGqCNFEWrHVq3z297yQlCPhbR3oBgJYuRsWM5FcbGkXo0HnxhXWAU4Bv8UB8T48Qy yVxYt3ehjZa56/t8tKZRqIhZCWji1EYBUbVtmn2bmu4dL8rLL59MBVwR5I+IoZE/kU3T jGG/M4Yo4woAYq7tHIu7mDT9c/C1TOQ0Wy3a6j/g5qGZYUNniFfb4tfpiw4Mv47x9xLB 9fVTbreSsIuzwi+O+4nV8/uaJJcag1djS8ZXNvwqxytnhykoJSE3YYb2Upg0QvG+A33u kh9rCPGd2kjQcYQVgVOozvWzrCOuNWYsl3kIMdo6OJdrytOcCvzi8ir/HjRT/i/PQfsW 3Hwg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2zywtH9b/6tdry3j6/dUKW82Gbwh6aCOng5TK2UZt/4=; b=rvzOJntj4u4qMT1efH61R5c42WAnhbVo9kTsZIBm2Fci6+FgfNYH/jrNh8s0cOUEm7 xH5N/ebuPP/bCwS2UsP9TJWZIx8qv4MTupuuS7knDYz8+TdrFpxAKhgV1HQrBnX0owMO 6ba5I2DVBkareRS6hhj2k1WfSO7LsDYsSH2X/7/xmhlsMiN8zGrmazEx/hOTNWrMORfh Wu97FolyLxS6Qs2nKZ0eY3rYd+DGNWTUtPo611iuDqQ7BaEE7SyfgGeETGc3KkhilHWs uZyttQhuo9MeMj6OZpuEHnY8sWrv8AjlHZtjUCTlN/DFR7136kDbI00sEx7DQ+IHdNa3 J5dw== X-Gm-Message-State: AO0yUKW1Ug4WID3ZPmhitorIgUbVwWc+Edoy3uPzn7jBmlda9Yc4YIpa eW04rsRfsb0mvY71Y573vkKx6oNKdY0rNAT5 X-Google-Smtp-Source: AK7set94bmXnVCeVSBUumtqzSiJO2ekrIcClI87UIxFkhyfIc0uNylEF6+VYg3M6Rmn+yG6WVMcsYw== X-Received: by 2002:a05:600c:318f:b0:3e1:f8af:8772 with SMTP id s15-20020a05600c318f00b003e1f8af8772mr6156749wmp.9.1676567498850; Thu, 16 Feb 2023 09:11:38 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 16/30] MAINTAINERS: Add myself to maintainers and remove Havard Date: Thu, 16 Feb 2023 17:11:09 +0000 Message-Id: <20230216171123.2518285-17-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567588120100003 Content-Type: text/plain; charset="utf-8" From: Hao Wu Havard is no longer working on the Nuvoton systems for a while and won't be able to do any work on it in the future. So I'll take over maintaining the Nuvoton system from him. Signed-off-by: Hao Wu Acked-by: Havard Skinnemoen Reviewed-by: Philippe Mathieu-Daude Message-id: 20230208235433.3989937-2-wuhaotsh@google.com Signed-off-by: Peter Maydell --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index fd54c1f1401..94659e42c2c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -807,8 +807,8 @@ F: include/hw/net/mv88w8618_eth.h F: docs/system/arm/musicpal.rst =20 Nuvoton NPCM7xx -M: Havard Skinnemoen M: Tyrone Ting +M: Hao Wu L: qemu-arm@nongnu.org S: Supported F: hw/*/npcm7xx* --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567753; cv=none; d=zohomail.com; s=zohoarc; b=Rsj04VIt0plNMgm5koLnSBzOkzenWyZ6Nb+nvvqL2ZKL8+Q8TE16DmLOf7Qh++hzrTHWWRdWYmAUplUC1Zwz5WeGX1341toJs8AxSWwZCUwEEUyo0lFgj/qWYrNhZ0LbmxxgGyM3S5LCMQLlK7BqIrI21AuL2oZWW64odX7Syu4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567753; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=WJGiFDdYVNEAwNHmoXQCKuWGS/DxAbFTps8rYNvQTJ0=; b=CXBzcXF7fIZgBHVyXI1n6JiSreTskfaLXvHx05FNnjod8v8FtEYrqQLTRanlJCgtbvSnoIXO9PBjOfnLcDS4jb5MhaQ8Ze+t48nCt/+hPmdjAZb2HwsX5hwEdeS0aFsaW7mj2hiXi5ebMw6dgRKvGnEU/GbtAfYwHszrpqJ5EZ4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1676567753383342.8496778091252; Thu, 16 Feb 2023 09:15:53 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShnN-0008Pv-Oe; Thu, 16 Feb 2023 12:11:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShnL-0008GO-Fs for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:43 -0500 Received: from mail-wr1-x434.google.com ([2a00:1450:4864:20::434]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShnJ-0007tg-44 for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:43 -0500 Received: by mail-wr1-x434.google.com with SMTP id h16so2503429wrz.12 for ; Thu, 16 Feb 2023 09:11:40 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.38 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=WJGiFDdYVNEAwNHmoXQCKuWGS/DxAbFTps8rYNvQTJ0=; b=konmaSU/eFtQbEdxjxRjndHqrEewv59ZMNeu8lRYJVFCkpuJC+QGZSqU3hXJCw9374 AJpFN+4XR/MnjXlnDSpk1g48Mcv3hAYyPAcrIbF/Y1d7gnRPg0tmUYk1RYghxeBqPDCw b1nTlqWDDsZzdBnhuhYWHEP/hvUKh6IadbIqTiEn7vMUKJ0bfspPpXa8RzTaBN4T9WlK lX5JWmwfxc60pT2Wz0U9pSHG3fAAlizUDhQshLvd40+g82kkFFIuxfjXQLx+pSi/N3R2 7El6ZEBZSNTL/6V1NTaZfdGG8KacFOvVi3agP+LEzQtO3mJDElSASzINwE/8PqAIQE/e RU+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WJGiFDdYVNEAwNHmoXQCKuWGS/DxAbFTps8rYNvQTJ0=; b=mKEMGtu5FvGVjmdGgsZHMEj3WLXZ2S3Vx166Oe/ihk7D7q64ItGTq/1uHmfnkiW4iz I5ohWrj+m1fHfS8F16gUJjESckLzeOutZFr931uiZ2SJBuxYW97ppASm0IYqr4JLuRFa 6WBNkhpSJDBR19w+2IOm7n6gEFiVS3EFKNnTvPcVo7/9DJtwsBbcUJvUWOYd3cHtdn4Y jBAk1mMBOn5CFQUk0IMpYmT62vuGOSEE2hjTIBDaeB2jNGbRjusOi2IiCGk7dG/Tswpl Iz0VUACzyAB2vnhLn/9qWisYT8Kqj2NUI3GwkUHuCO9IxxHMteVa6gBd0c1K2ZOi7kMF HCGA== X-Gm-Message-State: AO0yUKXO842rv6AWgYbt+dayWgntK556V5VT3PPNV0QSYt05H+uNa0WO ImbtJPzs3stoSr6hArEXz12eLPzfTkYrtPNO X-Google-Smtp-Source: AK7set9uDRQzYk831P6RkpGc0o8xsK20gAc8xLY4H+CcZueho+oOZ1WylSrO6Nx20dURIpyCUeb2uw== X-Received: by 2002:a5d:564a:0:b0:2c5:9ab9:60f6 with SMTP id j10-20020a5d564a000000b002c59ab960f6mr1515706wrw.62.1676567499672; Thu, 16 Feb 2023 09:11:39 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 17/30] hw/ssi: Add Nuvoton PSPI Module Date: Thu, 16 Feb 2023 17:11:10 +0000 Message-Id: <20230216171123.2518285-18-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567755374100003 Content-Type: text/plain; charset="utf-8" From: Hao Wu Nuvoton's PSPI is a general purpose SPI module which enables connections to SPI-based peripheral devices. Signed-off-by: Hao Wu Reviewed-by: Chris Rauer Reviewed-by: Philippe Mathieu-Daude Message-id: 20230208235433.3989937-3-wuhaotsh@google.com Signed-off-by: Peter Maydell --- MAINTAINERS | 6 +- include/hw/ssi/npcm_pspi.h | 53 +++++++++ hw/ssi/npcm_pspi.c | 221 +++++++++++++++++++++++++++++++++++++ hw/ssi/meson.build | 2 +- hw/ssi/trace-events | 5 + 5 files changed, 283 insertions(+), 4 deletions(-) create mode 100644 include/hw/ssi/npcm_pspi.h create mode 100644 hw/ssi/npcm_pspi.c diff --git a/MAINTAINERS b/MAINTAINERS index 94659e42c2c..21595f0aadd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -811,9 +811,9 @@ M: Tyrone Ting M: Hao Wu L: qemu-arm@nongnu.org S: Supported -F: hw/*/npcm7xx* -F: include/hw/*/npcm7xx* -F: tests/qtest/npcm7xx* +F: hw/*/npcm* +F: include/hw/*/npcm* +F: tests/qtest/npcm* F: pc-bios/npcm7xx_bootrom.bin F: roms/vbootrom F: docs/system/arm/nuvoton.rst diff --git a/include/hw/ssi/npcm_pspi.h b/include/hw/ssi/npcm_pspi.h new file mode 100644 index 00000000000..37cc784d962 --- /dev/null +++ b/include/hw/ssi/npcm_pspi.h @@ -0,0 +1,53 @@ +/* + * Nuvoton Peripheral SPI Module + * + * Copyright 2023 Google LLC + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WIT= HOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + */ +#ifndef NPCM_PSPI_H +#define NPCM_PSPI_H + +#include "hw/ssi/ssi.h" +#include "hw/sysbus.h" + +/* + * Number of registers in our device state structure. Don't change this wi= thout + * incrementing the version_id in the vmstate. + */ +#define NPCM_PSPI_NR_REGS 3 + +/** + * NPCMPSPIState - Device state for one Flash Interface Unit. + * @parent: System bus device. + * @mmio: Memory region for register access. + * @spi: The SPI bus mastered by this controller. + * @regs: Register contents. + * @irq: The interrupt request queue for this module. + * + * Each PSPI has a shared bank of registers, and controls up to four chip + * selects. Each chip select has a dedicated memory region which may be us= ed to + * read and write the flash connected to that chip select as if it were me= mory. + */ +typedef struct NPCMPSPIState { + SysBusDevice parent; + + MemoryRegion mmio; + + SSIBus *spi; + uint16_t regs[NPCM_PSPI_NR_REGS]; + qemu_irq irq; +} NPCMPSPIState; + +#define TYPE_NPCM_PSPI "npcm-pspi" +OBJECT_DECLARE_SIMPLE_TYPE(NPCMPSPIState, NPCM_PSPI) + +#endif /* NPCM_PSPI_H */ diff --git a/hw/ssi/npcm_pspi.c b/hw/ssi/npcm_pspi.c new file mode 100644 index 00000000000..3fb935043ab --- /dev/null +++ b/hw/ssi/npcm_pspi.c @@ -0,0 +1,221 @@ +/* + * Nuvoton NPCM Peripheral SPI Module (PSPI) + * + * Copyright 2023 Google LLC + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WIT= HOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + */ + +#include "qemu/osdep.h" + +#include "hw/irq.h" +#include "hw/registerfields.h" +#include "hw/ssi/npcm_pspi.h" +#include "migration/vmstate.h" +#include "qapi/error.h" +#include "qemu/error-report.h" +#include "qemu/log.h" +#include "qemu/module.h" +#include "qemu/units.h" + +#include "trace.h" + +REG16(PSPI_DATA, 0x0) +REG16(PSPI_CTL1, 0x2) + FIELD(PSPI_CTL1, SPIEN, 0, 1) + FIELD(PSPI_CTL1, MOD, 2, 1) + FIELD(PSPI_CTL1, EIR, 5, 1) + FIELD(PSPI_CTL1, EIW, 6, 1) + FIELD(PSPI_CTL1, SCM, 7, 1) + FIELD(PSPI_CTL1, SCIDL, 8, 1) + FIELD(PSPI_CTL1, SCDV, 9, 7) +REG16(PSPI_STAT, 0x4) + FIELD(PSPI_STAT, BSY, 0, 1) + FIELD(PSPI_STAT, RBF, 1, 1) + +static void npcm_pspi_update_irq(NPCMPSPIState *s) +{ + int level =3D 0; + + /* Only fire IRQ when the module is enabled. */ + if (FIELD_EX16(s->regs[R_PSPI_CTL1], PSPI_CTL1, SPIEN)) { + /* Update interrupt as BSY is cleared. */ + if ((!FIELD_EX16(s->regs[R_PSPI_STAT], PSPI_STAT, BSY)) && + FIELD_EX16(s->regs[R_PSPI_CTL1], PSPI_CTL1, EIW)) { + level =3D 1; + } + + /* Update interrupt as RBF is set. */ + if (FIELD_EX16(s->regs[R_PSPI_STAT], PSPI_STAT, RBF) && + FIELD_EX16(s->regs[R_PSPI_CTL1], PSPI_CTL1, EIR)) { + level =3D 1; + } + } + qemu_set_irq(s->irq, level); +} + +static uint16_t npcm_pspi_read_data(NPCMPSPIState *s) +{ + uint16_t value =3D s->regs[R_PSPI_DATA]; + + /* Clear stat bits as the value are read out. */ + s->regs[R_PSPI_STAT] =3D 0; + + return value; +} + +static void npcm_pspi_write_data(NPCMPSPIState *s, uint16_t data) +{ + uint16_t value =3D 0; + + if (FIELD_EX16(s->regs[R_PSPI_CTL1], PSPI_CTL1, MOD)) { + value =3D ssi_transfer(s->spi, extract16(data, 8, 8)) << 8; + } + value |=3D ssi_transfer(s->spi, extract16(data, 0, 8)); + s->regs[R_PSPI_DATA] =3D value; + + /* Mark data as available */ + s->regs[R_PSPI_STAT] =3D R_PSPI_STAT_BSY_MASK | R_PSPI_STAT_RBF_MASK; +} + +/* Control register read handler. */ +static uint64_t npcm_pspi_ctrl_read(void *opaque, hwaddr addr, + unsigned int size) +{ + NPCMPSPIState *s =3D opaque; + uint16_t value; + + switch (addr) { + case A_PSPI_DATA: + value =3D npcm_pspi_read_data(s); + break; + + case A_PSPI_CTL1: + value =3D s->regs[R_PSPI_CTL1]; + break; + + case A_PSPI_STAT: + value =3D s->regs[R_PSPI_STAT]; + break; + + default: + qemu_log_mask(LOG_GUEST_ERROR, + "%s: write to invalid offset 0x%" PRIx64 "\n", + DEVICE(s)->canonical_path, addr); + return 0; + } + trace_npcm_pspi_ctrl_read(DEVICE(s)->canonical_path, addr, value); + npcm_pspi_update_irq(s); + + return value; +} + +/* Control register write handler. */ +static void npcm_pspi_ctrl_write(void *opaque, hwaddr addr, uint64_t v, + unsigned int size) +{ + NPCMPSPIState *s =3D opaque; + uint16_t value =3D v; + + trace_npcm_pspi_ctrl_write(DEVICE(s)->canonical_path, addr, value); + + switch (addr) { + case A_PSPI_DATA: + npcm_pspi_write_data(s, value); + break; + + case A_PSPI_CTL1: + s->regs[R_PSPI_CTL1] =3D value; + break; + + case A_PSPI_STAT: + qemu_log_mask(LOG_GUEST_ERROR, + "%s: write to read-only register PSPI_STAT: 0x%08" + PRIx64 "\n", DEVICE(s)->canonical_path, v); + break; + + default: + qemu_log_mask(LOG_GUEST_ERROR, + "%s: write to invalid offset 0x%" PRIx64 "\n", + DEVICE(s)->canonical_path, addr); + return; + } + npcm_pspi_update_irq(s); +} + +static const MemoryRegionOps npcm_pspi_ctrl_ops =3D { + .read =3D npcm_pspi_ctrl_read, + .write =3D npcm_pspi_ctrl_write, + .endianness =3D DEVICE_LITTLE_ENDIAN, + .valid =3D { + .min_access_size =3D 1, + .max_access_size =3D 2, + .unaligned =3D false, + }, + .impl =3D { + .min_access_size =3D 2, + .max_access_size =3D 2, + .unaligned =3D false, + }, +}; + +static void npcm_pspi_enter_reset(Object *obj, ResetType type) +{ + NPCMPSPIState *s =3D NPCM_PSPI(obj); + + trace_npcm_pspi_enter_reset(DEVICE(obj)->canonical_path, type); + memset(s->regs, 0, sizeof(s->regs)); +} + +static void npcm_pspi_realize(DeviceState *dev, Error **errp) +{ + NPCMPSPIState *s =3D NPCM_PSPI(dev); + SysBusDevice *sbd =3D SYS_BUS_DEVICE(dev); + Object *obj =3D OBJECT(dev); + + s->spi =3D ssi_create_bus(dev, "pspi"); + memory_region_init_io(&s->mmio, obj, &npcm_pspi_ctrl_ops, s, + "mmio", 4 * KiB); + sysbus_init_mmio(sbd, &s->mmio); + sysbus_init_irq(sbd, &s->irq); +} + +static const VMStateDescription vmstate_npcm_pspi =3D { + .name =3D "npcm-pspi", + .version_id =3D 0, + .minimum_version_id =3D 0, + .fields =3D (VMStateField[]) { + VMSTATE_UINT16_ARRAY(regs, NPCMPSPIState, NPCM_PSPI_NR_REGS), + VMSTATE_END_OF_LIST(), + }, +}; + + +static void npcm_pspi_class_init(ObjectClass *klass, void *data) +{ + ResettableClass *rc =3D RESETTABLE_CLASS(klass); + DeviceClass *dc =3D DEVICE_CLASS(klass); + + dc->desc =3D "NPCM Peripheral SPI Module"; + dc->realize =3D npcm_pspi_realize; + dc->vmsd =3D &vmstate_npcm_pspi; + rc->phases.enter =3D npcm_pspi_enter_reset; +} + +static const TypeInfo npcm_pspi_types[] =3D { + { + .name =3D TYPE_NPCM_PSPI, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(NPCMPSPIState), + .class_init =3D npcm_pspi_class_init, + }, +}; +DEFINE_TYPES(npcm_pspi_types); diff --git a/hw/ssi/meson.build b/hw/ssi/meson.build index 702aa5e4dfe..904a47161a4 100644 --- a/hw/ssi/meson.build +++ b/hw/ssi/meson.build @@ -1,6 +1,6 @@ softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_smc.c')) softmmu_ss.add(when: 'CONFIG_MSF2', if_true: files('mss-spi.c')) -softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_fiu.c')) +softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_fiu.c', 'np= cm_pspi.c')) softmmu_ss.add(when: 'CONFIG_PL022', if_true: files('pl022.c')) softmmu_ss.add(when: 'CONFIG_SIFIVE_SPI', if_true: files('sifive_spi.c')) softmmu_ss.add(when: 'CONFIG_SSI', if_true: files('ssi.c')) diff --git a/hw/ssi/trace-events b/hw/ssi/trace-events index c707d4aabaf..2d5bd2b83d0 100644 --- a/hw/ssi/trace-events +++ b/hw/ssi/trace-events @@ -21,6 +21,11 @@ npcm7xx_fiu_ctrl_write(const char *id, uint64_t addr, ui= nt32_t data) "%s offset: npcm7xx_fiu_flash_read(const char *id, int cs, uint64_t addr, unsigned int= size, uint64_t value) "%s[%d] offset: 0x%08" PRIx64 " size: %u value: 0x%"= PRIx64 npcm7xx_fiu_flash_write(const char *id, unsigned cs, uint64_t addr, unsign= ed int size, uint64_t value) "%s[%d] offset: 0x%08" PRIx64 " size: %u value= : 0x%" PRIx64 =20 +# npcm_pspi.c +npcm_pspi_enter_reset(const char *id, int reset_type) "%s reset type: %d" +npcm_pspi_ctrl_read(const char *id, uint64_t addr, uint16_t data) "%s offs= et: 0x%03" PRIx64 " value: 0x%04" PRIx16 +npcm_pspi_ctrl_write(const char *id, uint64_t addr, uint16_t data) "%s off= set: 0x%03" PRIx64 " value: 0x%04" PRIx16 + # ibex_spi_host.c =20 ibex_spi_host_reset(const char *msg) "%s" --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567769446100001 Content-Type: text/plain; charset="utf-8" From: Hao Wu Signed-off-by: Hao Wu Reviewed-by: Titus Rwantare Reviewed-by: Philippe Mathieu-Daude Message-id: 20230208235433.3989937-4-wuhaotsh@google.com Signed-off-by: Peter Maydell --- docs/system/arm/nuvoton.rst | 2 +- include/hw/arm/npcm7xx.h | 2 ++ hw/arm/npcm7xx.c | 25 +++++++++++++++++++++++-- 3 files changed, 26 insertions(+), 3 deletions(-) diff --git a/docs/system/arm/nuvoton.rst b/docs/system/arm/nuvoton.rst index c38df32bde0..0424cae4b01 100644 --- a/docs/system/arm/nuvoton.rst +++ b/docs/system/arm/nuvoton.rst @@ -49,6 +49,7 @@ Supported devices * SMBus controller (SMBF) * Ethernet controller (EMC) * Tachometer + * Peripheral SPI controller (PSPI) =20 Missing devices --------------- @@ -64,7 +65,6 @@ Missing devices =20 * Ethernet controller (GMAC) * USB device (USBD) - * Peripheral SPI controller (PSPI) * SD/MMC host * PECI interface * PCI and PCIe root complex and bridges diff --git a/include/hw/arm/npcm7xx.h b/include/hw/arm/npcm7xx.h index f1b7e4a48d3..72c77220964 100644 --- a/include/hw/arm/npcm7xx.h +++ b/include/hw/arm/npcm7xx.h @@ -32,6 +32,7 @@ #include "hw/nvram/npcm7xx_otp.h" #include "hw/timer/npcm7xx_timer.h" #include "hw/ssi/npcm7xx_fiu.h" +#include "hw/ssi/npcm_pspi.h" #include "hw/usb/hcd-ehci.h" #include "hw/usb/hcd-ohci.h" #include "target/arm/cpu.h" @@ -104,6 +105,7 @@ struct NPCM7xxState { NPCM7xxFIUState fiu[2]; NPCM7xxEMCState emc[2]; NPCM7xxSDHCIState mmc; + NPCMPSPIState pspi[2]; }; =20 #define TYPE_NPCM7XX "npcm7xx" diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c index d85cc027651..15ff21d0472 100644 --- a/hw/arm/npcm7xx.c +++ b/hw/arm/npcm7xx.c @@ -86,6 +86,8 @@ enum NPCM7xxInterrupt { NPCM7XX_EMC1RX_IRQ =3D 15, NPCM7XX_EMC1TX_IRQ, NPCM7XX_MMC_IRQ =3D 26, + NPCM7XX_PSPI2_IRQ =3D 28, + NPCM7XX_PSPI1_IRQ =3D 31, NPCM7XX_TIMER0_IRQ =3D 32, /* Timer Module 0 */ NPCM7XX_TIMER1_IRQ, NPCM7XX_TIMER2_IRQ, @@ -220,6 +222,12 @@ static const hwaddr npcm7xx_emc_addr[] =3D { 0xf0826000, }; =20 +/* Register base address for each PSPI Module */ +static const hwaddr npcm7xx_pspi_addr[] =3D { + 0xf0200000, + 0xf0201000, +}; + static const struct { hwaddr regs_addr; uint32_t unconnected_pins; @@ -444,6 +452,10 @@ static void npcm7xx_init(Object *obj) object_initialize_child(obj, "emc[*]", &s->emc[i], TYPE_NPCM7XX_EM= C); } =20 + for (i =3D 0; i < ARRAY_SIZE(s->pspi); i++) { + object_initialize_child(obj, "pspi[*]", &s->pspi[i], TYPE_NPCM_PSP= I); + } + object_initialize_child(obj, "mmc", &s->mmc, TYPE_NPCM7XX_SDHCI); } =20 @@ -715,6 +727,17 @@ static void npcm7xx_realize(DeviceState *dev, Error **= errp) sysbus_connect_irq(SYS_BUS_DEVICE(&s->mmc), 0, npcm7xx_irq(s, NPCM7XX_MMC_IRQ)); =20 + /* PSPI */ + QEMU_BUILD_BUG_ON(ARRAY_SIZE(npcm7xx_pspi_addr) !=3D ARRAY_SIZE(s->psp= i)); + for (i =3D 0; i < ARRAY_SIZE(s->pspi); i++) { + SysBusDevice *sbd =3D SYS_BUS_DEVICE(&s->pspi[i]); + int irq =3D (i =3D=3D 0) ? NPCM7XX_PSPI1_IRQ : NPCM7XX_PSPI2_IRQ; + + sysbus_realize(sbd, &error_abort); + sysbus_mmio_map(sbd, 0, npcm7xx_pspi_addr[i]); + sysbus_connect_irq(sbd, 0, npcm7xx_irq(s, irq)); + } + create_unimplemented_device("npcm7xx.shm", 0xc0001000, 4 * = KiB); create_unimplemented_device("npcm7xx.vdmx", 0xe0800000, 4 * = KiB); create_unimplemented_device("npcm7xx.pcierc", 0xe1000000, 64 * = KiB); @@ -724,8 +747,6 @@ static void npcm7xx_realize(DeviceState *dev, Error **e= rrp) create_unimplemented_device("npcm7xx.peci", 0xf0100000, 4 * = KiB); create_unimplemented_device("npcm7xx.siox[1]", 0xf0101000, 4 * = KiB); create_unimplemented_device("npcm7xx.siox[2]", 0xf0102000, 4 * = KiB); - create_unimplemented_device("npcm7xx.pspi1", 0xf0200000, 4 * = KiB); - create_unimplemented_device("npcm7xx.pspi2", 0xf0201000, 4 * = KiB); create_unimplemented_device("npcm7xx.ahbpci", 0xf0400000, 1 * = MiB); create_unimplemented_device("npcm7xx.mcphy", 0xf05f0000, 64 * = KiB); create_unimplemented_device("npcm7xx.gmac1", 0xf0802000, 8 * = KiB); --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567721; cv=none; d=zohomail.com; s=zohoarc; b=W6ry416WasS5qIoWGJihRCRofY3AgtyrFBTkrlPZavGSXMKU+5v8Ta3/HIujTbNvL86sVq7rYR+oYBP+ozR1yjIN77WcjviBO5yEclNf8PIg/bLvW3VHNeVmezcn+PIU2PMaVaPa41Z4m5gC/V5QYBsXkFVKWyVIalCEPWPfXIw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567721; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=zD+gZe3NwGNlSfMSq90UNcL0FHuG48xEwAB0qrl/tCo=; b=ms5Jr4+wFfUw8Pj7QouiuOmWcJ9c4zKOg7xCFgVWPy73xjt5NkqX7Kxd8z5FLF3s0jqU11s7Tg7Pv1uj+vrXdIOAzDt0ZaDMM2yqbdLP3QkzFS7krS+ZwfyWRuoYb6nWb22GllGyoCZonuVWgCkm931h+SPaFr1W9iShHmS8hFI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1676567721286504.3673519415188; Thu, 16 Feb 2023 09:15:21 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShnO-0008ST-71; Thu, 16 Feb 2023 12:11:46 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShnL-0008JG-QX for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:43 -0500 Received: from mail-wr1-x429.google.com ([2a00:1450:4864:20::429]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShnK-0007oV-3N for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:43 -0500 Received: by mail-wr1-x429.google.com with SMTP id bu23so2524831wrb.8 for ; Thu, 16 Feb 2023 09:11:41 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.40 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=zD+gZe3NwGNlSfMSq90UNcL0FHuG48xEwAB0qrl/tCo=; b=cLsqx9DnS1kGAR7sg6OZeZz6lU/Ez1p14F+dH/RUieysPYmlqkv0JzVYqQCniZ4saZ G+iAEwLcfxxime0TOJXP5rrMFcSpb/WBjWXy4jajYRGcU7p7/wVlWX9F1DgV2s6FhJzt a4otSoHMDYXinUXACDgy1l98NySiQFaWx1D4nf3p0k+ZzdB2TOucUQfwrt+m5Xe9vO1C fZQVQwb/TApYOGxyCkNoCW5hQFvNKKHeRheTztfc/XQTgqCb/hfJmNM4jzurk5nJ/WKM d/ohQQyu2pP5M354VBl7tSuS5sQO1XxA9//eXFTv4tcqlaQk7ASbH59lcxMdrL84a3vv V6AA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zD+gZe3NwGNlSfMSq90UNcL0FHuG48xEwAB0qrl/tCo=; b=wfv/Pg8t/8noVlwAFaeG+FkcJLtGNXh6Grq47J/8taaTbLzWeX7Z95xDL/wTueshd0 C3ldnMyRyxfV0XRzBsWXcy8rCX7K83hXgme1t6PT34QT8KOsYCDTmzpdPtllrwAOxdt/ 0QiKn2jCZ6B7DWmUcXi3P1Oe5Jw4G2hDMgKioFRNSi3HvchrgaLGa1p0L6GZVf6W0kwp d3pkcSuBdT2H5HWA4bxuX4C0cJnSqd5fqPJhVpwwJtBt6zTIEiyhEdqE9/OHTAj+d/Jc jYaeyiVMfnh7XkumJ4vNbJLs4PHWAPTgKvI4Ev/Iv1a1DfDKmmSXHZWQLaLw9kpIvRrk K92g== X-Gm-Message-State: AO0yUKUbYPzUNKr6OEr2WnzgLyisNrCHibQdL7Fqyco13v+3FCGCID2S KJxrxDz4tJ8yoHVKWRJyR9qprcmrgAR/zriy X-Google-Smtp-Source: AK7set8LGJAtNy/2CS4mBTiJPY44gDHbqyY2/Bzt/wzad0h1N5M2jCBjj5+eDNkrz7jLUeSFEMiBRw== X-Received: by 2002:a5d:5082:0:b0:2c5:4d68:5511 with SMTP id a2-20020a5d5082000000b002c54d685511mr5904976wrt.48.1676567501343; Thu, 16 Feb 2023 09:11:41 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 19/30] hw/arm/smmu-common: Support 64-bit addresses Date: Thu, 16 Feb 2023 17:11:12 +0000 Message-Id: <20230216171123.2518285-20-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567723138100008 Content-Type: text/plain; charset="utf-8" From: Jean-Philippe Brucker Addresses targeting the second translation table (TTB1) in the SMMU have all upper bits set. Ensure the IOMMU region covers all 64 bits. Reviewed-by: Richard Henderson Signed-off-by: Jean-Philippe Brucker Reviewed-by: Eric Auger Message-id: 20230214171921.1917916-2-jean-philippe@linaro.org Signed-off-by: Peter Maydell --- include/hw/arm/smmu-common.h | 2 -- hw/arm/smmu-common.c | 2 +- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h index c5683af07d6..9fcff26357f 100644 --- a/include/hw/arm/smmu-common.h +++ b/include/hw/arm/smmu-common.h @@ -27,8 +27,6 @@ #define SMMU_PCI_DEVFN_MAX 256 #define SMMU_PCI_DEVFN(sid) (sid & 0xFF) =20 -#define SMMU_MAX_VA_BITS 48 - /* * Page table walk error types */ diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c index 733c9647784..2b8c67b9a1d 100644 --- a/hw/arm/smmu-common.c +++ b/hw/arm/smmu-common.c @@ -439,7 +439,7 @@ static AddressSpace *smmu_find_add_as(PCIBus *bus, void= *opaque, int devfn) =20 memory_region_init_iommu(&sdev->iommu, sizeof(sdev->iommu), s->mrtypename, - OBJECT(s), name, 1ULL << SMMU_MAX_VA_BITS= ); + OBJECT(s), name, UINT64_MAX); address_space_init(&sdev->as, MEMORY_REGION(&sdev->iommu), name); trace_smmu_add_mr(name); --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567721; cv=none; d=zohomail.com; s=zohoarc; b=d1qlLRUg94Gylyn8AP7l3R4zrOk0i0SJoO3Xq9qPEsiGZLNDSStgq15erwBQsm8bItgxJGaUymMopXE7mmSDhcZt7gabZdySVVC9N5NEIOYGvNXrUoCYFrqZ4qMFyKpAW8JsBlVFaxJ/hCA+R7bCtZTiTwkTHQ19CB3q8Sg6/Rw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567721; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=nb5AAn5zyFKHHN1q+dOOj2I4towk0anX1Vqm7ObRW+M=; b=DklJ8eek0pANlbU8DnVbm1RwNFrrnDu7eJCJus9XQlJOfzBVoxT8GstrjrQUxamkWQTECK8VAKj+tS2l1LWV7UivIdnUWBMlt4nFY9qrZZWEMUchj8h6owb9pt5aVfjvLOySSDzICirXm+JaFf5f8HNGv7Fm8hzcl78MKzihlJA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1676567721022618.700181293659; Thu, 16 Feb 2023 09:15:21 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShnO-00005A-U7; Thu, 16 Feb 2023 12:11:46 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShnM-0008MA-Uz for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:44 -0500 Received: from mail-wm1-x331.google.com ([2a00:1450:4864:20::331]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShnL-0007tG-6c for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:44 -0500 Received: by mail-wm1-x331.google.com with SMTP id n33so2119585wms.0 for ; Thu, 16 Feb 2023 09:11:42 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.41 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=nb5AAn5zyFKHHN1q+dOOj2I4towk0anX1Vqm7ObRW+M=; b=O0SuPXKp3pkuo21ByfCvHGxIJr/TGXLSdeC293hEpCd4wHrWHCfYmCxysQdRkDTZIk EZsfmTY6VnIX/lmSRca+U4d2VuFeZ5ITSDucW1z1SAHWGDZ8g5QOuzMVBye2e0zMuhs5 zEJDbnjpZYml7UDAUpGB89xRlKs9VBG5iRTb525oDswNIitlgM08NpPezHouho7dqSzw yENAyyfU9pFWwi5cBXUjvtnxqTGFoPcIr3JRsl9M7gbbPpd8BW4V/sYDvTfL8AwwQIg2 md7/N5duTSorhcgoFREMSrJE3/+JSDlyVweXF3dEVI0w7CWO13BcLrV3TPxt1sKuH1GL T4Gg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nb5AAn5zyFKHHN1q+dOOj2I4towk0anX1Vqm7ObRW+M=; b=QwngrgTMLHpD38ZZtPz4CPEMrMy2MvsHAvdKoRmqHv/0BPEsLrSO6riSIII1WXt05p qbTlavrNJUF69jhozeML2wW64YVyE/x78ka7nY2GrRCuyoa2L+fT0ZTCepPsQAatj7Hl G7TcApqnvO5b7N2CyW0kboQyMZZvI87CWtzIM5FeLR/1Da97oObE5c4Fwhuz/iudlFTJ ljD1TbTutHMWTAlqpLCSSytdisZe5ph6PUhaCdNpVZdb+QR/MaS318rANf0Lke09htkW 3gcBT6pBlU4MJGxvGbcZvLIaMl17aQpoOrB43o9sSladzlTLPVP0KZ9tRaV61kHf3SSh fLBQ== X-Gm-Message-State: AO0yUKVdK7ecbepM/NG+ehubWu4kIb59UOxb4Gza0sNaHanxygQMUeIs uSaDVtz8q4zkgmA92g/d8YCrAMYoObpl0kbO X-Google-Smtp-Source: AK7set8eZsEGmgM/UU2qwq0eXtUx0ZDOJJITFd7OKWlXWqGld/oRcTYYrbmHIHFgvTyBgu2Em/eXUQ== X-Received: by 2002:a05:600c:4752:b0:3df:f7e7:5f01 with SMTP id w18-20020a05600c475200b003dff7e75f01mr5676085wmo.15.1676567502456; Thu, 16 Feb 2023 09:11:42 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 20/30] hw/arm/smmu-common: Fix TTB1 handling Date: Thu, 16 Feb 2023 17:11:13 +0000 Message-Id: <20230216171123.2518285-21-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567723138100009 Content-Type: text/plain; charset="utf-8" From: Jean-Philippe Brucker Addresses targeting the second translation table (TTB1) in the SMMU have all upper bits set (except for the top byte when TBI is enabled). Fix the TTB1 check. Reported-by: Ola Hugosson Reviewed-by: Eric Auger Reviewed-by: Richard Henderson Signed-off-by: Jean-Philippe Brucker Message-id: 20230214171921.1917916-3-jean-philippe@linaro.org Signed-off-by: Peter Maydell --- hw/arm/smmu-common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c index 2b8c67b9a1d..0a5a60ca1e9 100644 --- a/hw/arm/smmu-common.c +++ b/hw/arm/smmu-common.c @@ -249,7 +249,7 @@ SMMUTransTableInfo *select_tt(SMMUTransCfg *cfg, dma_ad= dr_t iova) /* there is a ttbr0 region and we are in it (high bits all zero) */ return &cfg->tt[0]; } else if (cfg->tt[1].tsz && - !extract64(iova, 64 - cfg->tt[1].tsz, cfg->tt[1].tsz - tbi_byte= )) { + sextract64(iova, 64 - cfg->tt[1].tsz, cfg->tt[1].tsz - tbi_byte) = =3D=3D -1) { /* there is a ttbr1 region and we are in it (high bits all one) */ return &cfg->tt[1]; } else if (!cfg->tt[0].tsz) { --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567741; cv=none; d=zohomail.com; s=zohoarc; b=h1CbY+Rw1lCUVZMo6GG2U3jJiy1euq2do8RuMKT+Ik4nHSFAb5ro5V2toI59MHFR+Pg0DhsH+IqxoPg8HirrD6MzeFOZY7Vv94tzuApCrHX2hputZvwZ6hjrKcsWFYIbZdYyZQL1f3J7njfxmfoBJNP8t+TTgMjmFVatwMrdtE4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567741; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=RdFlF/b3VYR2fecwChpgN5HOR7iNVGAod5mHzESL9uI=; b=G/ctXIsSLcTM2fahADfmUDyyalZdazxRQTXhK5h0vGpWmYX0uIGqBDxnScYIxwWozNx55iTjSzQnYXB2VGG+eRJLZRLjl2UtrhpZ5Sl5l/UMZ7meysLQ2ZuqaTvl7mpVHJyBI/gbsMir3UGqq/XYcRPXTX9JxhDgj8QuAqE8Eik= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1676567741482433.2039438485481; Thu, 16 Feb 2023 09:15:41 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShnP-000095-TV; Thu, 16 Feb 2023 12:11:48 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShnO-0008Sv-Ag for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:46 -0500 Received: from mail-wr1-x429.google.com ([2a00:1450:4864:20::429]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShnM-0007wh-Lh for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:45 -0500 Received: by mail-wr1-x429.google.com with SMTP id bk16so2510469wrb.11 for ; Thu, 16 Feb 2023 09:11:44 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.42 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=RdFlF/b3VYR2fecwChpgN5HOR7iNVGAod5mHzESL9uI=; b=znvZml3ZjylSoN2v8dvO4Z/GkBv12CdVnUKtc5oZbcxyDATpA4eQZLXMydqOyKo5X/ VU/Pgm34HSphHIb/zrgCyvk12HSm+osqNVheBCNqXE9Z3bqdS+8+1CfrGgzV87tPvSCH GgthlS+n9xOZNXUVfOpjnZveBp7qb8nhttzn8ooAw8+03wrOFSl87McXki1SdBZJPjEG 3ZPMOAcdb6+z0mz+Dn5wdATsAGSb1D4Q6eBFGjG1kk/dt7j587ayXTXBJiOvmp87TOpm sAD+0f7/aZC7hmO7oIuhGA4OqpRfdoKn7LJl8q1joUeN2jxF922m4nnMAIwHLOFITHlU LKKQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RdFlF/b3VYR2fecwChpgN5HOR7iNVGAod5mHzESL9uI=; b=wW2lb16x6Az2x1ceoclSSpczF2r9wOUtDAbxbPoY0tT076lKJPfcQ0A5PkTB3m5AgC 8xlPw+p0L20qeR5g067qIJBh0jZTDXSnQgBkhLCXjlG7gJgRL394Nqa6AeAE/yRxEuo2 S3WQFNcnPhgTKbyDujnBjO9ga2bOnsmFiFDXyytCa3KydHOBE5PS5fdBm2rp/8Fh1SsJ ieuAOaPs9KDJE36I1YIlYYOnlrCIZ1I9XJEWXxcccITsVwfLBRBWmey5Qegyz/HMYsLv wfJ/9uUM8X3buLPib2LtOpS8rbl+2cuA8frnA63+7q4WySRMBoVV73XOi8P7Q116zxgM /KJQ== X-Gm-Message-State: AO0yUKXE5X+Aui5fUHiCWZfOtYv0f5RUTZWa5y13MS2rK8hasgP8DPDJ mPal1heRqwMxVfWspU70rCby2fSdxzo+cXaX X-Google-Smtp-Source: AK7set91lhvxG/dDP+QRSzdfS7CjUHIuIo9OTjjE9p3ghnpbmJfYA8I9r61AU7DqvXUcN74n+k5aCg== X-Received: by 2002:adf:e64e:0:b0:2c5:5847:7374 with SMTP id b14-20020adfe64e000000b002c558477374mr5619107wrn.67.1676567503412; Thu, 16 Feb 2023 09:11:43 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 21/30] target/arm: rename handle_semihosting to tcg_handle_semihosting Date: Thu, 16 Feb 2023 17:11:14 +0000 Message-Id: <20230216171123.2518285-22-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567743241100003 From: Claudio Fontana make it clearer from the name that this is a tcg-only function. Signed-off-by: Claudio Fontana Signed-off-by: Fabiano Rosas Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Peter Maydell --- target/arm/helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 22670c20c00..509e674b0f0 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11014,7 +11014,7 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *= cs) * trapped to the hypervisor in KVM. */ #ifdef CONFIG_TCG -static void handle_semihosting(CPUState *cs) +static void tcg_handle_semihosting(CPUState *cs) { ARMCPU *cpu =3D ARM_CPU(cs); CPUARMState *env =3D &cpu->env; @@ -11076,7 +11076,7 @@ void arm_cpu_do_interrupt(CPUState *cs) */ #ifdef CONFIG_TCG if (cs->exception_index =3D=3D EXCP_SEMIHOST) { - handle_semihosting(cs); + tcg_handle_semihosting(cs); return; } #endif --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567741; cv=none; d=zohomail.com; s=zohoarc; b=Jf3MyraBh5T6MAax/cGvN6wJoakVsH6b3mcGgaGSvQ4NVdMqW7cBS6yLjGVjN0NFTUIrGtzFrmckqmHBq/y4vMG6kLekllxDWFscSrzTg273kruxKlxNfLCmuYdpE3havJtez6JbJ3ADwTXpTbOy/CtFcEU8JU81J9w3IcyWL+Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567741; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=MLAn5GKevaRJXltRfdrt51PNhBydmEzcr/VkvxtQ/eA=; b=juQx0b1vKwwXZeKb8TRbZE4Ti9nNlpdSsdHYWO8JfWq21m0IbtjbsykisF4iqkBDQEsEI98Nf8wGcLX3EQAvof4mowlrLP50yj3mBPLOYjoxPK/CQYXmNKvbnesZX1Hj7/hBVDszaAzUL57iLyIX6tBQkfiFUoU86yA8L+/JMjg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1676567741543732.7758987532274; Thu, 16 Feb 2023 09:15:41 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShnR-0000I7-Kg; Thu, 16 Feb 2023 12:11:49 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShnO-0008U9-El for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:46 -0500 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShnM-0007p5-Sq for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:46 -0500 Received: by mail-wr1-x42a.google.com with SMTP id y1so2553980wru.2 for ; Thu, 16 Feb 2023 09:11:44 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.43 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=MLAn5GKevaRJXltRfdrt51PNhBydmEzcr/VkvxtQ/eA=; b=RbrEQ+AmR7SOWcjt3q6cGXU5Z7Pq4+bSFkyVALOFsgqEMT899oug0Zvt4l4N4m8enI QEN+ZbqZTjzfyNB5/EKR13xXa5ZrhxtcBj92/SfLkCkN2Ebr4jtp4XWW0s+KRNZQrCPS u/izTODjm/9LlXqRApI5OPjsCoIS8po6DtxQwq2Ttb5kWx9LfQ44tzbeyddDfUz1z8lQ whE4Wvlz7TwlowZfwZaMa1FQwpISzCrVwuPvgRob9hOSlkyM7g962jbcQWPm1t4DwqHp r1XvU+FUTuufqaQVN2epBpy8m2aiiWSnhBd5A4b6I3sbGP6i1rMcx7Iua/0BJLLZNU9/ JBtQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MLAn5GKevaRJXltRfdrt51PNhBydmEzcr/VkvxtQ/eA=; b=4c96x1x121hrcerMUSl/LlDlUvf/1EQBNB9P+JUATR4ksvx5sNHkryy4juPbn+rWZu W5Hu20CEqoXtmKVvOsPyQ3jJgM1hftwwA/oGNVrlyWQ7t3lWnIZyRPXBsImJzigLvZaO nBeeFJwJq+V+pJHyq76bLwXoKQMcri3rESIlvjgXipzlCpZq22LRiDkGH8qS8xNAdb/m bTqZDn1Dla6alpgsFxqjGcnjexihJUtZy8PPV+558EUrUjVFBwrPGhPKkvo12CbhPl4O J7bGS4wiHIhtFDhamPXybymemVi7E0m+D6vZUcaK20cayXpT+TupM7ohVeRppGdeJR2l ek9A== X-Gm-Message-State: AO0yUKWmr1yinFIPjc+Rak3x6Ny/B1/mov/yHdjhtBgrOEh2To18Z50k WGdb+UJTgRKSFntdD+nUcQUTBZypZeE+SqlC X-Google-Smtp-Source: AK7set879RsEdwAxHPzRMczFRiLHgbSJt7hwXEAeO2A1Cz9Sz5H+3PlQJvrp3rYrMeafQWBJrw/eEQ== X-Received: by 2002:a5d:6a47:0:b0:2bd:d34e:5355 with SMTP id t7-20020a5d6a47000000b002bdd34e5355mr4936544wrw.20.1676567504211; Thu, 16 Feb 2023 09:11:44 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 22/30] target/arm: wrap psci call with tcg_enabled Date: Thu, 16 Feb 2023 17:11:15 +0000 Message-Id: <20230216171123.2518285-23-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567743349100004 From: Claudio Fontana for "all" builds (tcg + kvm), we want to avoid doing the psci check if tcg is built-in, but not enabled. Signed-off-by: Claudio Fontana Reviewed-by: Richard Henderson Signed-off-by: Fabiano Rosas Tested-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Peter Maydell --- target/arm/helper.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 509e674b0f0..2d38c3ed7aa 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -22,6 +22,7 @@ #include "hw/irq.h" #include "sysemu/cpu-timers.h" #include "sysemu/kvm.h" +#include "sysemu/tcg.h" #include "qapi/qapi-commands-machine-target.h" #include "qapi/error.h" #include "qemu/guest-random.h" @@ -11063,7 +11064,7 @@ void arm_cpu_do_interrupt(CPUState *cs) env->exception.syndrome); } =20 - if (arm_is_psci_call(cpu, cs->exception_index)) { + if (tcg_enabled() && arm_is_psci_call(cpu, cs->exception_index)) { arm_handle_psci_call(cpu); qemu_log_mask(CPU_LOG_INT, "...handled as PSCI call\n"); return; --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567659; cv=none; d=zohomail.com; s=zohoarc; b=kpMXLnrqF7SptNMZDZI+t+rGBoliWRd2/aCMtEg7Ywp/2r8ZSKrTeUnPLQ04dlEona0+4A7AEv5ueBPMu3afKEbmc4sWs9L/kWOPFgcDqfTaEQ9POTmS7B0d6zjS0lr70TdO+QOTucFPUuaxo+3ezuIeFST0qpPoyGUYc7K4jYE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567659; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=X3rMKJZAHSn2N53RNjbN11WgeDbh222tQ0PpdvQC108=; b=Sd/Vx/FAUxEu88XGs+JY/xfIlDKq4AgLdVxI6IIFIz+/OLJfKDgrVQ7a9rJnIDt4l1KoqTsmQthFU0x0O6nN+dVVg7mXnpvLPkiLI5atiwAQhnhUMt831Nl73MiKMqkRD5CVBmioCw8CL6SDzikPDxWj3+eCpMMkUU4eoxqwfRo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1676567659270986.4749298888487; Thu, 16 Feb 2023 09:14:19 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShnS-0000Po-L8; Thu, 16 Feb 2023 12:11:50 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShnP-000098-Tq for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:48 -0500 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShnO-0007yG-7r for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:47 -0500 Received: by mail-wm1-x32c.google.com with SMTP id m16-20020a05600c3b1000b003dc4050c94aso2222032wms.4 for ; Thu, 16 Feb 2023 09:11:45 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.44 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=X3rMKJZAHSn2N53RNjbN11WgeDbh222tQ0PpdvQC108=; b=RPl6tlOExMAOxcuVnbKf2igH3qJ9l1ZRYvhZuJxh9Eeyn/FmF3dYGv7tCANbJa0/bj gjw6HRAeucUwfzOxG2Hqm0996ok7c0hbMd5wnNXx1Inv9lLLbmBr/z4u2bu8AeyANWSI S2QWWz0bxdnU5RZrI7xEG93tQ4CefGd0emF/1GxRlOewmkOabR5hbrKT3HHoBuvEZfSd 5ZevAoGCQVHCVg/84YAQnhTpRZOI3WHB6Nknn0+/rysRo7/VLwNpYX1tF7OQemFqS3gl fpm5eHkvx2A6+zVYLvLCXjdyw6t2EAWep1FG2CaXKZhg0ZEItoDwQv57nA5YDYE7XBP9 vDCw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=X3rMKJZAHSn2N53RNjbN11WgeDbh222tQ0PpdvQC108=; b=6j0Elt5hx/qCPcrm3lcKrMyd0HdnB5j05/jMYVnNRwizUytZVnvtAj/FNPG/ScqdZU GiLoNkAOOMPYyY77CDwqPqoTelBf91jfsYb1ISqDFNtXxmFldbo1KK6/BYX0qCdB0QNk iLcx9ufCjUTZRsHMFYhQhaFtE52EC2yVfvTlG6OM+ExhN5oAHzIa6mpJ+h4MdTjsVREt IcQtZf+zM8Oi7QxTfG8k2IaBUiJ3zVDXD7z4Yb62BgnLhyJpciN/B1OwAQWhwtA2wjq6 I3IeKVhy+TQHFj6wO3gCC9IRVApBrrGOjErjZGU/UJZoh33Sft/Fqa6P+6upG9xMpCFJ A27w== X-Gm-Message-State: AO0yUKVywtF6sKT5ZaoauwEDktZh5dE4LJ/G9nZVNueZUq2c2Ph8Gika Hw66YcDxsbCbuwtcar/C3PSnV6ErNHIAh//9 X-Google-Smtp-Source: AK7set8KCa7UIYCBaC93iKwCTt/tS3nSxgLXJyN2gyw6DN0ZxMvwaVP/4t64yig9DfnhMjtrPVLqaQ== X-Received: by 2002:a05:600c:188a:b0:3e2:918:ecd4 with SMTP id x10-20020a05600c188a00b003e20918ecd4mr3354962wmp.37.1676567504983; Thu, 16 Feb 2023 09:11:44 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 23/30] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled() Date: Thu, 16 Feb 2023 17:11:16 +0000 Message-Id: <20230216171123.2518285-24-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567660583100001 From: Claudio Fontana Signed-off-by: Claudio Fontana Reviewed-by: Richard Henderson Signed-off-by: Fabiano Rosas Tested-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Peter Maydell --- target/arm/helper.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 2d38c3ed7aa..07d41003654 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -10827,11 +10827,13 @@ static void arm_cpu_do_interrupt_aarch64(CPUState= *cs) unsigned int cur_el =3D arm_current_el(env); int rt; =20 - /* - * Note that new_el can never be 0. If cur_el is 0, then - * el0_a64 is is_a64(), else el0_a64 is ignored. - */ - aarch64_sve_change_el(env, cur_el, new_el, is_a64(env)); + if (tcg_enabled()) { + /* + * Note that new_el can never be 0. If cur_el is 0, then + * el0_a64 is is_a64(), else el0_a64 is ignored. + */ + aarch64_sve_change_el(env, cur_el, new_el, is_a64(env)); + } =20 if (cur_el < new_el) { /* --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567718; cv=none; d=zohomail.com; s=zohoarc; b=CboZ3qa6I0B8GXS0fZi+zV4ZvIQkTSszdUxka4MfiDSPN2KH1NTz6dZBXD1SMj/6zTosJIoMzbTUXt/8mZyZzps5H58b5IzeErUyhdQmNdRJQJoFyR3t4a8X1FWl+heloOqR401IeAoGp07YhpkbgXhqKJB/BMAY9fkxiShpZVU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567718; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=uCZjE6lvYgX4qXFndfs51jkpgm8/Sewi06RQDXzjFJQ=; b=JalxKFY3IWBecT9Gd8HpPsZc91c6pSy4Kd9fSD2zcT8JVMtau+1R28WivxHEbs8qVHLz51P7m4MGDh8emfKgcLzwgHptCR7tqZHFtrIbjm2KsrjumKl5jetRdsmlGON2DJVMMGnHzvdI7IyjPlT9er5+h6FeKf9kfUWPCAs3k+o= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16765677186071014.9656657070441; Thu, 16 Feb 2023 09:15:18 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShnX-0000qP-NB; Thu, 16 Feb 2023 12:11:55 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShnU-0000a1-4g for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:52 -0500 Received: from mail-wm1-x331.google.com ([2a00:1450:4864:20::331]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShnO-0007tG-IB for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:51 -0500 Received: by mail-wm1-x331.google.com with SMTP id n33so2119703wms.0 for ; Thu, 16 Feb 2023 09:11:46 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.45 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=uCZjE6lvYgX4qXFndfs51jkpgm8/Sewi06RQDXzjFJQ=; b=KySVwczsfpIVPV8who6SfOSo1JBJqKfK5g7CJZm7YN8bpyA3rEXqxxJiDvoxbJO2XZ yLwxKd61O6wJq7nh52igkgqJEOQBiAXfrmXzsOIehYLkOg+igKzimjOmzlMTUcDO5CH4 nIqPybGtuDLfWqB9cbnqG9IE/LtQSR9y93D+hZER46AVX1yd9Kg0G5KoZWexDn0jR/W/ vpI+bkvyly6/VL73oRH4BnCMmc0f5V4Dk46BIB5SfsSWLJcEzb/gKH7ptpr5YCtZQRVm Q8dqPeTXpeXwJbl2pW9LDsNlCzD4r7VAUQCzxSBE5aZeqeim/oxz5YTcvdZn1OluJE+P fOzg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uCZjE6lvYgX4qXFndfs51jkpgm8/Sewi06RQDXzjFJQ=; b=ld3V/LUqb9Uj89R37rVz1egw3NwABEvj2yo+sSxFGtOw2VbP+1PP1uUs56o+58kCAt vqCWYYHLSdhUZUrE+f5Z6TeljUwc+xCKQCXEk04n1dM9jgqfb2OUqQa7F8t/CEuHuHrw D8PT4pnNIwKAx5WVk2mS8UbNEEZUaVukMZJSWVugfCz8D8VTT2wHIQGEO85TqRqKv8CL RoPLKCTzf7Eal4l4Dv4ABp95pt7H4x3PkoXb0DshXh+pWzvhyKzcEtdSYIxuTUXNWBz0 KLB2fsKvCb1VucNIbAzn6iJwrJMmiQ50RtGZEMSSh3zZmmmL/pO/ZdgRiiPtEp1+wRiu r57A== X-Gm-Message-State: AO0yUKW1rZki8dSECnT1LYZnAvrsaVBy2r8/L3h5cTy8rR6hLOmvY3BZ d7GfCiLo8q/ztG19RZJB1ssN2dm8hx73YS16 X-Google-Smtp-Source: AK7set8q2F5XUJrywUA2ae4S0Ykr+l9SjIVjpwIsHe8c7UV9ddthbRitqfhNmAyG3Lp4icxMvOb+lQ== X-Received: by 2002:a05:600c:1c07:b0:3df:9858:c033 with SMTP id j7-20020a05600c1c0700b003df9858c033mr2530230wms.8.1676567505761; Thu, 16 Feb 2023 09:11:45 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 24/30] target/arm: Move PC alignment check Date: Thu, 16 Feb 2023 17:11:17 +0000 Message-Id: <20230216171123.2518285-25-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567719098100001 From: Fabiano Rosas Move this earlier to make the next patch diff cleaner. While here update the comment slightly to not give the impression that the misalignment affects only TCG. Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Fabiano Rosas Tested-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Peter Maydell --- target/arm/machine.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/target/arm/machine.c b/target/arm/machine.c index 5f261526525..b4c3850570c 100644 --- a/target/arm/machine.c +++ b/target/arm/machine.c @@ -839,6 +839,15 @@ static int cpu_post_load(void *opaque, int version_id) } } =20 + /* + * Misaligned thumb pc is architecturally impossible. Fail the + * incoming migration. For TCG it would trigger the assert in + * thumb_tr_translate_insn(). + */ + if (!is_a64(env) && env->thumb && (env->regs[15] & 1)) { + return -1; + } + hw_breakpoint_update_all(cpu); hw_watchpoint_update_all(cpu); =20 @@ -856,15 +865,6 @@ static int cpu_post_load(void *opaque, int version_id) } } =20 - /* - * Misaligned thumb pc is architecturally impossible. - * We have an assert in thumb_tr_translate_insn to verify this. - * Fail an incoming migrate to avoid this assert. - */ - if (!is_a64(env) && env->thumb && (env->regs[15] & 1)) { - return -1; - } - if (!kvm_enabled()) { pmu_op_finish(&cpu->env); } --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567645; cv=none; d=zohomail.com; s=zohoarc; b=EclB9r2KKipjWgnlvKa8/s6U7zJYkTl663oFcSP9aBkgDP3E/KoVUfiUQ+B2kMcHRqcyYUvA6mcQf1s4410leI5tAEop0FgPlL5pO/U7PYzCJo10ZjxRi2t5WXCwttni3nzxE1VONZLDOMDyczKc7PV9LoIhvHX5whH/CgJwCME= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567645; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=rLdLg7FVc+e5cTbBnKEvOZt66LpMMYrauCjY8XnM1eg=; b=ab4YaRCiPdvGkdcVNTzIC2A/rJ8Rf/YTFsbRJ0I7UOd+XRRIwJX7OYmGkOnnxrMn/CxhGOpRIXXp58SNCbSfdaklogDXYWYNbLVEQkwTXCUO+oMFm1lXasbmiprsIuDEYjB0yK/462dzvoEZmRc+QSBa7JLoZb2OPFmIi5G7lBs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1676567645112151.59059013664012; Thu, 16 Feb 2023 09:14:05 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShnT-0000Ve-HH; Thu, 16 Feb 2023 12:11:51 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShnS-0000OJ-7v for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:50 -0500 Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShnQ-0007yg-5S for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:49 -0500 Received: by mail-wr1-x42e.google.com with SMTP id r2so2527463wrv.7 for ; Thu, 16 Feb 2023 09:11:47 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.45 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=rLdLg7FVc+e5cTbBnKEvOZt66LpMMYrauCjY8XnM1eg=; b=DVMkLF61ZN+6Z+hVcj5SGXqL6oNaxuI2zAxHhBtuYNvkV3lIADq7utXpfhOrk2Dy1V pWyD/Lg0YnlJsoz7zXTSzqKK6vJDnicayc6P0lTCL95Ppd5goav9Bh4Tkrm8rt3wcO12 SLUkYkeKUMFBG2IZCp3NiwHeiwD6h1fQtgwCgWhuo+mNEHzuyGh78F1F5BepK7104xYx ShVccRJXXSqGE3jua1CdHMNgTZWFmZnIQRCUiUqP+kaNK6ctv8SP73LbOJJVVFmMqJhn rPFG4s/bgrGnLJo7zdwGP88F0UpYi4038pjwFuk3L5kK6jiSPpnhkryh41F9J1/Anw3j vr0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rLdLg7FVc+e5cTbBnKEvOZt66LpMMYrauCjY8XnM1eg=; b=hnXdAxjhWGfy8RrMZ1fHdFKs6J8ES9/WTmHDNAUDW5bqULnHMH+JM3Qjb/7LWVbTjj MTQ9+LjPXzmt2voW1vzAV7letLg4t8oreVkpmjCJIr387qD/aYMdrZiq0RGJQx+fJ+Tm /c815TJoFzDL7AFHmXofUZ3uQiCZd34XLBOsFQvMLmSzk0crE5vCJFfFaZnovk0I0oL9 k12KYT5dwt0keKExr/lsJZhKU7Ec0HCCp3vkvJVXtcqcIOgBSJG7qEyVXCLxT9VvdpMp FYDCt1SZAivZDCku0eDzs9pSUiQMLy+BWFbAsXQjpgdgwA1VA8AkANFf5WDuCI6Bm7PZ lpng== X-Gm-Message-State: AO0yUKWK5W0xENuGhPHf4+SSJ59zfHOf9Ybx7yV2a/JRl1DdVE5xfucg v80LSj549twuQZ0h5sWQrABx+V4dFH/mrXje X-Google-Smtp-Source: AK7set8S0CCaZDa+ZfVQ/j4U25UjZ7CuNjO+CW6UmpPf4vRqZ/u2G5aHCBTg0WGrA4Z9pDB8zYiJDA== X-Received: by 2002:adf:fccd:0:b0:2c5:a5e5:8c9e with SMTP id f13-20020adffccd000000b002c5a5e58c9emr372361wrs.18.1676567506800; Thu, 16 Feb 2023 09:11:46 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 25/30] target/arm: Move cpregs code out of cpu.h Date: Thu, 16 Feb 2023 17:11:18 +0000 Message-Id: <20230216171123.2518285-26-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567646489100001 From: Fabiano Rosas Since commit cf7c6d1004 ("target/arm: Split out cpregs.h") we now have a cpregs.h header which is more suitable for this code. Code moved verbatim. Signed-off-by: Fabiano Rosas Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Peter Maydell --- target/arm/cpregs.h | 98 +++++++++++++++++++++++++++++++++++++++++++++ target/arm/cpu.h | 91 ----------------------------------------- 2 files changed, 98 insertions(+), 91 deletions(-) diff --git a/target/arm/cpregs.h b/target/arm/cpregs.h index efcf9181b97..1ee64e99de8 100644 --- a/target/arm/cpregs.h +++ b/target/arm/cpregs.h @@ -120,6 +120,104 @@ enum { ARM_CP_SME =3D 1 << 19, }; =20 +/* + * Interface for defining coprocessor registers. + * Registers are defined in tables of arm_cp_reginfo structs + * which are passed to define_arm_cp_regs(). + */ + +/* + * When looking up a coprocessor register we look for it + * via an integer which encodes all of: + * coprocessor number + * Crn, Crm, opc1, opc2 fields + * 32 or 64 bit register (ie is it accessed via MRC/MCR + * or via MRRC/MCRR?) + * non-secure/secure bank (AArch32 only) + * We allow 4 bits for opc1 because MRRC/MCRR have a 4 bit field. + * (In this case crn and opc2 should be zero.) + * For AArch64, there is no 32/64 bit size distinction; + * instead all registers have a 2 bit op0, 3 bit op1 and op2, + * and 4 bit CRn and CRm. The encoding patterns are chosen + * to be easy to convert to and from the KVM encodings, and also + * so that the hashtable can contain both AArch32 and AArch64 + * registers (to allow for interprocessing where we might run + * 32 bit code on a 64 bit core). + */ +/* + * This bit is private to our hashtable cpreg; in KVM register + * IDs the AArch64/32 distinction is the KVM_REG_ARM/ARM64 + * in the upper bits of the 64 bit ID. + */ +#define CP_REG_AA64_SHIFT 28 +#define CP_REG_AA64_MASK (1 << CP_REG_AA64_SHIFT) + +/* + * To enable banking of coprocessor registers depending on ns-bit we + * add a bit to distinguish between secure and non-secure cpregs in the + * hashtable. + */ +#define CP_REG_NS_SHIFT 29 +#define CP_REG_NS_MASK (1 << CP_REG_NS_SHIFT) + +#define ENCODE_CP_REG(cp, is64, ns, crn, crm, opc1, opc2) \ + ((ns) << CP_REG_NS_SHIFT | ((cp) << 16) | ((is64) << 15) | \ + ((crn) << 11) | ((crm) << 7) | ((opc1) << 3) | (opc2)) + +#define ENCODE_AA64_CP_REG(cp, crn, crm, op0, op1, op2) \ + (CP_REG_AA64_MASK | \ + ((cp) << CP_REG_ARM_COPROC_SHIFT) | \ + ((op0) << CP_REG_ARM64_SYSREG_OP0_SHIFT) | \ + ((op1) << CP_REG_ARM64_SYSREG_OP1_SHIFT) | \ + ((crn) << CP_REG_ARM64_SYSREG_CRN_SHIFT) | \ + ((crm) << CP_REG_ARM64_SYSREG_CRM_SHIFT) | \ + ((op2) << CP_REG_ARM64_SYSREG_OP2_SHIFT)) + +/* + * Convert a full 64 bit KVM register ID to the truncated 32 bit + * version used as a key for the coprocessor register hashtable + */ +static inline uint32_t kvm_to_cpreg_id(uint64_t kvmid) +{ + uint32_t cpregid =3D kvmid; + if ((kvmid & CP_REG_ARCH_MASK) =3D=3D CP_REG_ARM64) { + cpregid |=3D CP_REG_AA64_MASK; + } else { + if ((kvmid & CP_REG_SIZE_MASK) =3D=3D CP_REG_SIZE_U64) { + cpregid |=3D (1 << 15); + } + + /* + * KVM is always non-secure so add the NS flag on AArch32 register + * entries. + */ + cpregid |=3D 1 << CP_REG_NS_SHIFT; + } + return cpregid; +} + +/* + * Convert a truncated 32 bit hashtable key into the full + * 64 bit KVM register ID. + */ +static inline uint64_t cpreg_to_kvm_id(uint32_t cpregid) +{ + uint64_t kvmid; + + if (cpregid & CP_REG_AA64_MASK) { + kvmid =3D cpregid & ~CP_REG_AA64_MASK; + kvmid |=3D CP_REG_SIZE_U64 | CP_REG_ARM64; + } else { + kvmid =3D cpregid & ~(1 << 15); + if (cpregid & (1 << 15)) { + kvmid |=3D CP_REG_SIZE_U64 | CP_REG_ARM; + } else { + kvmid |=3D CP_REG_SIZE_U32 | CP_REG_ARM; + } + } + return kvmid; +} + /* * Valid values for ARMCPRegInfo state field, indicating which of * the AArch32 and AArch64 execution states this register is visible in. diff --git a/target/arm/cpu.h b/target/arm/cpu.h index d623afe84af..12b1082537c 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2559,97 +2559,6 @@ void arm_cpu_list(void); uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t excp_idx, uint32_t cur_el, bool secure); =20 -/* Interface for defining coprocessor registers. - * Registers are defined in tables of arm_cp_reginfo structs - * which are passed to define_arm_cp_regs(). - */ - -/* When looking up a coprocessor register we look for it - * via an integer which encodes all of: - * coprocessor number - * Crn, Crm, opc1, opc2 fields - * 32 or 64 bit register (ie is it accessed via MRC/MCR - * or via MRRC/MCRR?) - * non-secure/secure bank (AArch32 only) - * We allow 4 bits for opc1 because MRRC/MCRR have a 4 bit field. - * (In this case crn and opc2 should be zero.) - * For AArch64, there is no 32/64 bit size distinction; - * instead all registers have a 2 bit op0, 3 bit op1 and op2, - * and 4 bit CRn and CRm. The encoding patterns are chosen - * to be easy to convert to and from the KVM encodings, and also - * so that the hashtable can contain both AArch32 and AArch64 - * registers (to allow for interprocessing where we might run - * 32 bit code on a 64 bit core). - */ -/* This bit is private to our hashtable cpreg; in KVM register - * IDs the AArch64/32 distinction is the KVM_REG_ARM/ARM64 - * in the upper bits of the 64 bit ID. - */ -#define CP_REG_AA64_SHIFT 28 -#define CP_REG_AA64_MASK (1 << CP_REG_AA64_SHIFT) - -/* To enable banking of coprocessor registers depending on ns-bit we - * add a bit to distinguish between secure and non-secure cpregs in the - * hashtable. - */ -#define CP_REG_NS_SHIFT 29 -#define CP_REG_NS_MASK (1 << CP_REG_NS_SHIFT) - -#define ENCODE_CP_REG(cp, is64, ns, crn, crm, opc1, opc2) \ - ((ns) << CP_REG_NS_SHIFT | ((cp) << 16) | ((is64) << 15) | \ - ((crn) << 11) | ((crm) << 7) | ((opc1) << 3) | (opc2)) - -#define ENCODE_AA64_CP_REG(cp, crn, crm, op0, op1, op2) \ - (CP_REG_AA64_MASK | \ - ((cp) << CP_REG_ARM_COPROC_SHIFT) | \ - ((op0) << CP_REG_ARM64_SYSREG_OP0_SHIFT) | \ - ((op1) << CP_REG_ARM64_SYSREG_OP1_SHIFT) | \ - ((crn) << CP_REG_ARM64_SYSREG_CRN_SHIFT) | \ - ((crm) << CP_REG_ARM64_SYSREG_CRM_SHIFT) | \ - ((op2) << CP_REG_ARM64_SYSREG_OP2_SHIFT)) - -/* Convert a full 64 bit KVM register ID to the truncated 32 bit - * version used as a key for the coprocessor register hashtable - */ -static inline uint32_t kvm_to_cpreg_id(uint64_t kvmid) -{ - uint32_t cpregid =3D kvmid; - if ((kvmid & CP_REG_ARCH_MASK) =3D=3D CP_REG_ARM64) { - cpregid |=3D CP_REG_AA64_MASK; - } else { - if ((kvmid & CP_REG_SIZE_MASK) =3D=3D CP_REG_SIZE_U64) { - cpregid |=3D (1 << 15); - } - - /* KVM is always non-secure so add the NS flag on AArch32 register - * entries. - */ - cpregid |=3D 1 << CP_REG_NS_SHIFT; - } - return cpregid; -} - -/* Convert a truncated 32 bit hashtable key into the full - * 64 bit KVM register ID. - */ -static inline uint64_t cpreg_to_kvm_id(uint32_t cpregid) -{ - uint64_t kvmid; - - if (cpregid & CP_REG_AA64_MASK) { - kvmid =3D cpregid & ~CP_REG_AA64_MASK; - kvmid |=3D CP_REG_SIZE_U64 | CP_REG_ARM64; - } else { - kvmid =3D cpregid & ~(1 << 15); - if (cpregid & (1 << 15)) { - kvmid |=3D CP_REG_SIZE_U64 | CP_REG_ARM; - } else { - kvmid |=3D CP_REG_SIZE_U32 | CP_REG_ARM; - } - } - return kvmid; -} - /* Return the highest implemented Exception Level */ static inline int arm_highest_el(CPUARMState *env) { --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567608; cv=none; d=zohomail.com; s=zohoarc; b=a11ohOO7GNiy188qFr940y4yYWExv8vUt2XOQj0Tt+l/UBH8rbS0nZS/trZL3XigMs8wtOIzt0rMqhoFzsyGUV9W9EqN4l8+/EXPwCO87mx4mXml8KJ2Qi8fx0mXDDzNpmmKFTB/zCu2b8gD9Rwsy4mdC9dey8d9eFhQnBacBjM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567608; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=fKaIoyL82f1ne64Qgj6g8dHFUQLBIO6UYjkBABaWKfo=; b=hVnMK1ZZLkqZygxv7nEzRX7Um5pAeJ9fdAAoTxiNxfhcg5afGUhyemiiyrDDYCD2iWKbxU3wOUp+IJ1Wb1I5RV89l5hVq7gLkkTXrtmhZTTIRjzHuyIXPhtsmV9Ih/I1xxiBuHamuAsvgKAyxT0+x9p8XyXQNk9A62TJsJcyyB8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1676567608818677.1463694922309; Thu, 16 Feb 2023 09:13:28 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShnU-0000ca-NM; Thu, 16 Feb 2023 12:11:52 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShnT-0000Y3-My for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:51 -0500 Received: from mail-wr1-x429.google.com ([2a00:1450:4864:20::429]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShnR-0007zA-UA for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:51 -0500 Received: by mail-wr1-x429.google.com with SMTP id d4so2453182wrj.1 for ; Thu, 16 Feb 2023 09:11:49 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.46 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=fKaIoyL82f1ne64Qgj6g8dHFUQLBIO6UYjkBABaWKfo=; b=DgMZthnnyOXKstFHEfxLIhWvu3GsizjxAKRkE6vmPlD5aqylDgssdLO5ZudJ+tzCcU aHTuR1f9OLzMytjBXrRcxi61hIUyGbIyOprb8RIU8N0omXrTReXicjH2x9wDd+oH/XNL eof/51EhN9ilCNKKNvFLemIv+ZLDWvrDp1ViUJGnXh3irLEVc+l6uZYx6pjN0iBRZ9q2 ksa5i5HCMznEFdtjFl8vvcS0fqoiFUcYSAUsKeXPdXyk5n0MFfglRldx2HlVU98nr/HV 7lnJYK4RfHfu+YgXZwMMyTVg8ooY53kirY4R3iMmEDdn/2N4UGKMa6OhrhG9jiEdQNP2 2C6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fKaIoyL82f1ne64Qgj6g8dHFUQLBIO6UYjkBABaWKfo=; b=4QV7MZAlO1Hyhp93dZs4C432BEmqaFoAvs2DQRZvCp5tZZv/7w24zsJVNGITNOFMT7 y3s5DMw8awbxEEn4z0Ci911eUl0aXAQYEW9rzqru3YErjms+h5hKxaWfCl5P0y9S0hPy +gDPVbJuAq7QUAFuT23gNcvZq+UpJtOobaycebcKC8tEUEX7PYtuiad/kp2LcghVHXlK H5yE0MgWlYWOYstaafPDdgmviw1aP1iOUdeq2LFMJPr+B+WfE632O1hJ3xsdRn9EJTWZ QJaMfCcvWbYkC/4v/4Cjj1/qvzKBs9dKFvjuRRthRh79Hf+lbSyvd7cSsV2CLNwFd1l6 r4Cw== X-Gm-Message-State: AO0yUKVMUc1N7NT0wKLZl4w+nn25m7pRDx00WiKyBETij4pNzCw85bRc Polfj6dmfU5kGK7JWKrXjzmZOyG01rJJeoq/ X-Google-Smtp-Source: AK7set8lAtvWZwvMg7AaQme2SYwkU2S5/AjnQirPpzrfD3y9MamXbNJHq0MgGNoRWFhZwmNrJtCDuQ== X-Received: by 2002:adf:f851:0:b0:2bf:ee7d:5369 with SMTP id d17-20020adff851000000b002bfee7d5369mr4703442wrq.59.1676567507588; Thu, 16 Feb 2023 09:11:47 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 26/30] tests/avocado: Skip tests that require a missing accelerator Date: Thu, 16 Feb 2023 17:11:19 +0000 Message-Id: <20230216171123.2518285-27-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567610210100001 From: Fabiano Rosas If a test was tagged with the "accel" tag and the specified accelerator it not present in the qemu binary, cancel the test. We can now write tests without explicit calls to require_accelerator, just the tag is enough. Signed-off-by: Fabiano Rosas Reviewed-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Peter Maydell --- tests/avocado/avocado_qemu/__init__.py | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/tests/avocado/avocado_qemu/__init__.py b/tests/avocado/avocado= _qemu/__init__.py index 25a546842fa..a313e88c07e 100644 --- a/tests/avocado/avocado_qemu/__init__.py +++ b/tests/avocado/avocado_qemu/__init__.py @@ -274,6 +274,10 @@ def setUp(self): =20 super().setUp('qemu-system-') =20 + accel_required =3D self._get_unique_tag_val('accel') + if accel_required: + self.require_accelerator(accel_required) + self.machine =3D self.params.get('machine', default=3Dself._get_unique_tag_val(= 'machine')) =20 --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567763; cv=none; d=zohomail.com; s=zohoarc; b=UonIG4nOFdugSeROcjAwddKUtfnMsfmoRGoXq17olFNJggKhvovHvk0QWNKbxuITKzLswpI8/L6hIDqBAvgErZvUk+sqkRb7z/Yqjg39AQf36KBmVrnA83bs9iduQ6BVoEsM7kRk8ZIAJqnxut/NMZCCKaWU6PG2WU2w0f/S9e8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567763; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=tgMbUsRHeiMP1zN6oNigLk88zA1/eZdSv72d9GFz8HA=; b=mjZLX7ascaY49LrbBVoDZI1XqWvdGWEA9bSCNRiuOCAKROBz80rI0z9uzzU1sqfoZzAeHa8K1rdJS/zXTXY1FvGUH85bspKumfzotKGZ5HQ3SG7ZjW8nIKthxo3bG17Y1lwU8lJRRTlzOnvXMQeKPHF9PwIpARmMSaVMseA8kEQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1676567763712739.7042711318157; Thu, 16 Feb 2023 09:16:03 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShnX-0000pS-9K; Thu, 16 Feb 2023 12:11:55 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShnU-0000bL-Gj for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:52 -0500 Received: from mail-wr1-x431.google.com ([2a00:1450:4864:20::431]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShnS-0007zE-CN for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:52 -0500 Received: by mail-wr1-x431.google.com with SMTP id m14so2497118wrg.13 for ; Thu, 16 Feb 2023 09:11:49 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=tgMbUsRHeiMP1zN6oNigLk88zA1/eZdSv72d9GFz8HA=; b=xzGzqmUfZcoiTUqYbvT+vyI6i5sw3LXjQPcgk+ov2E2shYpriY9A70MSENUFncuM3P VzsHYIyR8rG5bqskuI1PtlaWNod4Dd0Ux7a+xlJcpUvnBebBErnqvP0KzWy/NMqrS0ou QygRTj+GlT4HvA836Iva26YynWrRp1uif3nPdLQtSOlC1qxnaHf+H4AWMfKaCXYkBIMH 1RZZF70BxzleSlbC86CEc5NVZqi8zJ8yBARomsHYjFVo5rjtR+OLFEHV2QV/PyW+mZOo iX0PGnj3pI3y9biqrmeCHW996Q7rLJH8UpQ7iQSoYkbJ2vlQ4YASkpwDgCH3kXxtxwex 3yGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tgMbUsRHeiMP1zN6oNigLk88zA1/eZdSv72d9GFz8HA=; b=wHRiPVHAACg+agvqXPE65nw5WgFI/aXWVrEHMlL/cIpqL0MDpXceDXjoqWxr4o/r/e WM7tPjwPfkTGXsm71Un5WzUm3AKT6kNsmp/C88Tv55aP0CsK5Hy1Jr58j96lmSIjiNc/ OHFBrDGQYmmnfcVdwqjv4CczclumPYZ0bjNijP0qbgUYcwt6KqGkosSsCf93coly+mk6 BOoRkkgzJfyuIWRMb77cuty/FH/eE5DyVfvDnYr6GHMv22hA1OlEhsrQqEd0NyerCwp+ gmVrrSHAB38ZDBmK5XKsOG2a/P3hVNvYZg3B4/pokXttajwtHT3P7nGlNEmxQ4xRtOvD 0+dg== X-Gm-Message-State: AO0yUKWeovI+/zIfJ2ZjlXExnckmdsV+vAhtvULpCo87wGIv1Ta/Ut78 gASJ7D3Lc2NdaMVHcFrJbfAuQvvZfaKzv5Wu X-Google-Smtp-Source: AK7set/zbAPGiatm02NppjEpqUmNRHProWlmoVsRS0Z/Se3qAuBwTBnRUEPbnoox0YTEH5sFIOrzcg== X-Received: by 2002:adf:f087:0:b0:2c5:6036:2567 with SMTP id n7-20020adff087000000b002c560362567mr5368430wro.11.1676567508992; Thu, 16 Feb 2023 09:11:48 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 27/30] tests/avocado: Tag TCG tests with accel:tcg Date: Thu, 16 Feb 2023 17:11:20 +0000 Message-Id: <20230216171123.2518285-28-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567765361100001 From: Fabiano Rosas This allows the test to be skipped when TCG is not present in the QEMU binary. Signed-off-by: Fabiano Rosas Reviewed-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Peter Maydell --- tests/avocado/boot_linux_console.py | 1 + tests/avocado/reverse_debugging.py | 8 ++++++++ 2 files changed, 9 insertions(+) diff --git a/tests/avocado/boot_linux_console.py b/tests/avocado/boot_linux= _console.py index be60f8cda9a..574609bf43b 100644 --- a/tests/avocado/boot_linux_console.py +++ b/tests/avocado/boot_linux_console.py @@ -997,6 +997,7 @@ def test_arm_orangepi_uboot_netbsd9(self): =20 def test_aarch64_raspi3_atf(self): """ + :avocado: tags=3Daccel:tcg :avocado: tags=3Darch:aarch64 :avocado: tags=3Dmachine:raspi3b :avocado: tags=3Dcpu:cortex-a53 diff --git a/tests/avocado/reverse_debugging.py b/tests/avocado/reverse_deb= ugging.py index d2921e70c3b..680c314cfcc 100644 --- a/tests/avocado/reverse_debugging.py +++ b/tests/avocado/reverse_debugging.py @@ -173,6 +173,10 @@ def reverse_debugging(self, shift=3D7, args=3DNone): vm.shutdown() =20 class ReverseDebugging_X86_64(ReverseDebugging): + """ + :avocado: tags=3Daccel:tcg + """ + REG_PC =3D 0x10 REG_CS =3D 0x12 def get_pc(self, g): @@ -190,6 +194,10 @@ def test_x86_64_pc(self): self.reverse_debugging() =20 class ReverseDebugging_AArch64(ReverseDebugging): + """ + :avocado: tags=3Daccel:tcg + """ + REG_PC =3D 32 =20 # unidentified gitlab timeout problem --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567692; cv=none; d=zohomail.com; s=zohoarc; b=Y4RPC4oShVfSaPzoLwNSyEZVP5MlpKOunPFxFTub50jawW/3W6QII7irZmr7Eics+9ulVewX/L6GWJGcYtiyjm8e2MXV9bX+0nO11D/ZiuIjIy/TSK3uP20xIw+bU8ljfOQCKh/iXtthGXBRLzNGpK2YBSOFfePGrSefW/eu8ak= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567692; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=XVRtdPWy6SO/+ib4dr2eJvk7NAPUzEubpNbchybnbuU=; b=AzjCIu30S76UWv0qOJpiGSAVW/+5ao/Rs8PdgZ3U7aHQddKlawqtEW/AfFcO9V7JHgtaotmOFZVbCNtDwDY3IBKL/9ZdHZ3Ue3528FfAqoJVbP1jrMUlXXYPADA9odUBcZNapgtbBufwC7+fMxk+5/K0xt31V7f0bvjxU+HhaP4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1676567692427143.41134979318463; Thu, 16 Feb 2023 09:14:52 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShnV-0000gJ-I8; Thu, 16 Feb 2023 12:11:53 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShnU-0000dE-R4 for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:52 -0500 Received: from mail-wr1-x431.google.com ([2a00:1450:4864:20::431]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShnS-0007sY-V0 for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:52 -0500 Received: by mail-wr1-x431.google.com with SMTP id o15so2520346wrc.9 for ; Thu, 16 Feb 2023 09:11:50 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.49 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=XVRtdPWy6SO/+ib4dr2eJvk7NAPUzEubpNbchybnbuU=; b=P2VxbLaosfCf1ciXxTbdEXDxtGbVReKmF58y+bRoIHDTkKoOKK/h1nOrWP6gMjil9S SELZG2uF2HL4LhGv9XWgilwQCFcoHjoD0Pl+0C/NHaZZ5dRqZu2MaovVSegM8wB3ZnQ/ lbCL2t5flQZhs5di4GCMZUxz2/Vs+svSOOOCsaG4rm9vYQEMBKliuoM3dq5ZVzGDvurW lnMPeAGFaP1UBYtSm/MiLINdp7W/v7IEPTjtmxy7/+HU9DppwGAaF7EfM2KChylr5RxK mWLdvFf9xqeqnO83CtKQi+eC9Li7too11kdlQ/AL9KJVAD3lnUImhtitTpGXFllhgFZJ 8/bw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XVRtdPWy6SO/+ib4dr2eJvk7NAPUzEubpNbchybnbuU=; b=nHQH6Te/IwZBG95iiPLloPHkuDq6yx5GnZ0nxt5z9MOxSpcSfcSyOxa/7+2DgPAEWO Vn0T8HuYDxVvIADX58T0LJ87Xio6LQytXuGwIFhc2GPo2JaleqZ3vU2eX5vQC6IKJBJt gplrFLy4pWn/CU5tsHpcI1pCmMGBldH3etJOI6bbSaJ11OvjNxgQLpr+mA8KDz7wCrm3 km8h167qlQg93fHLNU/oLH5imBZ+NbIyuho+bBrUK0/ZfxTtuwUKwRKC7AUfHw8gtnP+ 89wBawNmKpyDXAifZ0s+cXZGTey+mMlesjEBDJSu1zcg7+ArC73hujTrPpu0R7Xvw+6I qLMg== X-Gm-Message-State: AO0yUKXFeybQlpkSxDx/aEONoeO5M+1B9+BK/JaZdJmQVOFzCwnNwRS6 gXfABGhsP02PBvMw4VmjWZRmdd8wlfb2uMdN X-Google-Smtp-Source: AK7set+/seRN9IpQ+GZOlm+Df85F2En9TdX88UpFgkwU402PUdXFhbUf05JunGmuH8E9QV2SNw9aaQ== X-Received: by 2002:a5d:6486:0:b0:2c5:519f:307a with SMTP id o6-20020a5d6486000000b002c5519f307amr2844105wri.30.1676567510137; Thu, 16 Feb 2023 09:11:50 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 28/30] target/arm: Use "max" as default cpu for the virt machine with KVM Date: Thu, 16 Feb 2023 17:11:21 +0000 Message-Id: <20230216171123.2518285-29-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567692941100001 Content-Type: text/plain; charset="utf-8" From: Fabiano Rosas Now that the cortex-a15 is under CONFIG_TCG, use as default CPU for a KVM-only build the 'max' cpu. Note that we cannot use 'host' here because the qtests can run without any other accelerator (than qtest) and 'host' depends on KVM being enabled. Signed-off-by: Fabiano Rosas Acked-by: Richard Henderson Reviewed-by: Thomas Huth Signed-off-by: Peter Maydell --- hw/arm/virt.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 8d13e4486b1..ac626b3bef7 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -3013,7 +3013,11 @@ static void virt_machine_class_init(ObjectClass *oc,= void *data) mc->minimum_page_bits =3D 12; mc->possible_cpu_arch_ids =3D virt_possible_cpu_arch_ids; mc->cpu_index_to_instance_props =3D virt_cpu_index_to_props; +#ifdef CONFIG_TCG mc->default_cpu_type =3D ARM_CPU_TYPE_NAME("cortex-a15"); +#else + mc->default_cpu_type =3D ARM_CPU_TYPE_NAME("max"); +#endif mc->get_default_cpu_node_id =3D virt_get_default_cpu_node_id; mc->kvm_type =3D virt_kvm_type; assert(!mc->get_hotplug_handler); --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567697; cv=none; d=zohomail.com; s=zohoarc; b=jfGVnZl/ydfc/6OY6fvV0RxdQyW7kVQouXhLDj36MyPf70pXR6KyYsG4i5hpPwFxtYKiIe5X3LhPnTTReiMTtu1x2N0j/e6iGVDFsvVbcqUwQ9qDD1++4CmqWBsvSJI5ZjpRKNexFeBvfKJcYp0x6pfVTLQWUagMZFOP8+jFQHA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567697; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=VvgfuLUSNrvN4aahIRpGRRD0M1CGU3JQCC4h/XD559w=; b=HuHgQeWMkMqJ0wahIMvZtsvY5fytxU4hqTyedPAG8v94P9gteCp4+ZPahQvViTZojonFh5bjIhjm4I+jhcXbdPEl8016c6dRkL6rU3A0UBhYLlfjl3ZsbpsIiQWR/x4O4GvRBO8iDcjQrfLQpQmKqzN28x10yis+j1VG/tNveWo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1676567697847206.08406201880757; Thu, 16 Feb 2023 09:14:57 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShnX-0000qi-P7; Thu, 16 Feb 2023 12:11:55 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShnV-0000g3-E6 for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:53 -0500 Received: from mail-wr1-x434.google.com ([2a00:1450:4864:20::434]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShnT-0007tg-Jt for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:53 -0500 Received: by mail-wr1-x434.google.com with SMTP id h16so2503920wrz.12 for ; Thu, 16 Feb 2023 09:11:51 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.50 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=VvgfuLUSNrvN4aahIRpGRRD0M1CGU3JQCC4h/XD559w=; b=J8c8hg6zPetXqDX4OJxCBhKZ2iv3496Z++5N4FwMcjJNhky0u2TJxc2ky+o3kzPjdk u/zCcPPg5csN/p1H2ICt13lW2OMXfIKyBTd2nLYDMn1BNVt5dvkjrjR3QGhmiuBXfl+N /kltfzn0AFW9VDr1VXDbm9CbiqywTFZ+J4zBh7/M41SS7a9oFVcZQzXDDJjAViZGwS7d S3oDtduHTkL3ERMcUhoT6cKZEILi3cG8lUpIVbgmgJtZJTH0vP6oztMAiBjjNIgslXMz Dnily5B+oO3m4QHADUKQBhvjui6BHCVFJ/uiHF+2u889NElPHbRDMQgO9amkBiYeIdXW ZuyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VvgfuLUSNrvN4aahIRpGRRD0M1CGU3JQCC4h/XD559w=; b=05m68hd4jLWiSg1DPIPHPoQ0SfhGss7BHYXwApVzBqZ97SG1l2nMZt3gh41GrLmh+M rnkzFxaKc31gxqph/Pe1SoG4QDtl3euhK74zb/J/tFoYyOz/ZZhUyuh5XXqqKRn+bzsd nG1ZumnzPfSvhDCeP4c89sXXyP6rHqfZGC6TRtnKZLDeX6dVAOMsyqcC6USj93PFrh8w gZI/RjwTbc7fnJpT+GjrHBkzB68pEFwZQr4VYuMBOJ9TTQofjIWtr99xdDe5TnoX3WoC /uCwzT7ayoe1wOKQokaIDxAyKzQnyJNFlxKefXsJPAS07Sl1fChopijPN03y4txIstDm b5zg== X-Gm-Message-State: AO0yUKXbB0gem6D8bTMAChL0ugK0TIRpksoxTwlD5vHJOLDltavqeLap hF3tRUxhcy2lcQduHrJuAO/MaOLm3wBcUbXU X-Google-Smtp-Source: AK7set+VdVlQCIVsURITowe5v682rN8/f24uuddpoSTCqAdgjy/jW8aeaW+NKfYgi8ot1Z2ElsJNug== X-Received: by 2002:a5d:5012:0:b0:2c5:5878:e5a6 with SMTP id e18-20020a5d5012000000b002c55878e5a6mr5322041wrt.61.1676567510861; Thu, 16 Feb 2023 09:11:50 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 29/30] tests/qtest: arm-cpu-features: Match tests to required accelerators Date: Thu, 16 Feb 2023 17:11:22 +0000 Message-Id: <20230216171123.2518285-30-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567698951100001 Content-Type: text/plain; charset="utf-8" From: Fabiano Rosas Signed-off-by: Fabiano Rosas Reviewed-by: Richard Henderson Acked-by: Thomas Huth Signed-off-by: Peter Maydell --- tests/qtest/arm-cpu-features.c | 28 ++++++++++++++++++---------- 1 file changed, 18 insertions(+), 10 deletions(-) diff --git a/tests/qtest/arm-cpu-features.c b/tests/qtest/arm-cpu-features.c index 8691802950c..1cb08138ad1 100644 --- a/tests/qtest/arm-cpu-features.c +++ b/tests/qtest/arm-cpu-features.c @@ -21,7 +21,7 @@ #define SVE_MAX_VQ 16 =20 #define MACHINE "-machine virt,gic-version=3Dmax -accel tcg " -#define MACHINE_KVM "-machine virt,gic-version=3Dmax -accel kvm -accel tcg= " +#define MACHINE_KVM "-machine virt,gic-version=3Dmax -accel kvm " #define QUERY_HEAD "{ 'execute': 'query-cpu-model-expansion', " \ " 'arguments': { 'type': 'full', " #define QUERY_TAIL "}}" @@ -607,31 +607,39 @@ int main(int argc, char **argv) { g_test_init(&argc, &argv, NULL); =20 - qtest_add_data_func("/arm/query-cpu-model-expansion", - NULL, test_query_cpu_model_expansion); + if (qtest_has_accel("tcg")) { + qtest_add_data_func("/arm/query-cpu-model-expansion", + NULL, test_query_cpu_model_expansion); + } + + if (!g_str_equal(qtest_get_arch(), "aarch64")) { + goto out; + } =20 /* * For now we only run KVM specific tests with AArch64 QEMU in * order avoid attempting to run an AArch32 QEMU with KVM on * AArch64 hosts. That won't work and isn't easy to detect. */ - if (g_str_equal(qtest_get_arch(), "aarch64") && qtest_has_accel("kvm")= ) { + if (qtest_has_accel("kvm")) { /* * This tests target the 'host' CPU type, so register it only if * KVM is available. */ qtest_add_data_func("/arm/kvm/query-cpu-model-expansion", NULL, test_query_cpu_model_expansion_kvm); - } =20 - if (g_str_equal(qtest_get_arch(), "aarch64")) { - qtest_add_data_func("/arm/max/query-cpu-model-expansion/sve-max-vq= -8", - NULL, sve_tests_sve_max_vq_8); - qtest_add_data_func("/arm/max/query-cpu-model-expansion/sve-off", - NULL, sve_tests_sve_off); qtest_add_data_func("/arm/kvm/query-cpu-model-expansion/sve-off", NULL, sve_tests_sve_off_kvm); } =20 + if (qtest_has_accel("tcg")) { + qtest_add_data_func("/arm/max/query-cpu-model-expansion/sve-max-vq= -8", + NULL, sve_tests_sve_max_vq_8); + qtest_add_data_func("/arm/max/query-cpu-model-expansion/sve-off", + NULL, sve_tests_sve_off); + } + +out: return g_test_run(); } --=20 2.34.1 From nobody Sat May 18 22:54:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1676567538; cv=none; d=zohomail.com; s=zohoarc; b=aX7Pf9NvrC1oJqj7VBilZqgG824a7yM0CSfk6QaHY4X1+NIiYJRGn1LB2v2eJDthI4OFfg/pwb29Fn/esgvzabqwZBaE8USMS0c6X68O8eP4zZnJfXzT7lNPEHzLdYpNcniO1HPZamTE0SPRctTNxfM6hn/TxTnwqh+pVyNq1Ks= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1676567538; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=evm0X8KpwexdZmoAXGBwk/4u+Ox8rhWrbCkUwekUiFs=; b=cEznA/txjFGS50+rxoTfLDcrGVC7lsUdXWJ8z08DiMTgT4RBUGwpLocaxZBPzmrF5mCXPmZ/kRAF/rWWBW5AiCQWXEHbWQz81NpZrRtzodlIJT6VtvR+gUUaKfEb736BtMgrC64OQ8NLk9iRnDfz2znaQEeKKdQUXEeVIYU8I2s= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1676567538652402.1736091847515; Thu, 16 Feb 2023 09:12:18 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pShna-0000uZ-Fs; Thu, 16 Feb 2023 12:11:58 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pShnW-0000jO-4y for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:54 -0500 Received: from mail-wr1-x429.google.com ([2a00:1450:4864:20::429]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pShnU-0007zA-Ee for qemu-devel@nongnu.org; Thu, 16 Feb 2023 12:11:53 -0500 Received: by mail-wr1-x429.google.com with SMTP id d4so2453371wrj.1 for ; Thu, 16 Feb 2023 09:11:51 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12-20020a5d4dcc000000b002c556a4f1casm2049107wru.42.2023.02.16.09.11.50 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 09:11:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=evm0X8KpwexdZmoAXGBwk/4u+Ox8rhWrbCkUwekUiFs=; b=o8Nk+uCCSc1IK7uSlxoYhce9KLeTEePoVsBNjtUEbl3jZxX9RLPX6+a1CD70Vw7oEn z9oiieAAwE+Pk+fzMnr31FEZGbYNWaL3HzBkL/Ftza2ANmXi/QceiHWkf8Da1gctIyij lRKI590+aBY98XPSpydGNZAEzdk9ZxK2+dmZD0TYqdu6EcgX+5RKxNuTkkUbs5Yy8oID ZXIQ2wyy9RlLt1J/4n4tb0scPG8j/9qlWTv/uS3+W0rDhbZrev8peVZsBZXNT89dC2bw MZYbOFwkt6jxKBbU76pyocyIOyhZ1/MQQxeoS+VHNcGiU6IGrFQnFx14qOlPTKnqVU0w R1Tw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=evm0X8KpwexdZmoAXGBwk/4u+Ox8rhWrbCkUwekUiFs=; b=lP7yU29H5eAROwjriUFsLyWcFv/1NStMRXg8I1WERy2ce6tEelEis3bu+Y82j/WUwR 15P8xgV4HcRikxM6kURdVj3S6JLyW12E574FxiE9/BRKXCwU7snaxOllymSpvSz4U5Bb xLpr3TdXHE/O9nQg5lUbhkLzcyyH1dteKynHDKkvhX0sTGcDv7x+Pes/hLT6zvrh4W5F O7YT/H8oZatERKzDdP+lIlLEO/OHJ/+22bt+wZhExJ7UBeWKfvQwroAP5w1dQti0GN7n D5ODp4dUhDlT1QQ5w+Kcv6FW/mHSiHlz1ratE+MuDtgMiU7aMTVVf7nQpaRHwvo7hT6m UoAQ== X-Gm-Message-State: AO0yUKVYPOLMoS/F+qQotNK2JRtB7kmi5vjP1wbm9SwnrW8FF9vl/GiW f/uhLrtkEkB6zoElYSQ2TCf8z8zZICcbpptb X-Google-Smtp-Source: AK7set8VvcOYb/OkhhpIAFIC0bFowM1rWH6oVg8lNuRWgUQLyx8iTEuh6LpwX+vyLn4AapoAYn1azg== X-Received: by 2002:a5d:640c:0:b0:2c5:52ef:b46b with SMTP id z12-20020a5d640c000000b002c552efb46bmr6519088wru.6.1676567511715; Thu, 16 Feb 2023 09:11:51 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 30/30] tests/qtest: Restrict tpm-tis-devices-{swtpm}-test to CONFIG_TCG Date: Thu, 16 Feb 2023 17:11:23 +0000 Message-Id: <20230216171123.2518285-31-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230216171123.2518285-1-peter.maydell@linaro.org> References: <20230216171123.2518285-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676567539669100001 Content-Type: text/plain; charset="utf-8" From: Fabiano Rosas These tests set -accel tcg, so restrict them to when TCG is present. Signed-off-by: Fabiano Rosas Acked-by: Richard Henderson Reviewed-by: Thomas Huth Signed-off-by: Peter Maydell --- tests/qtest/meson.build | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build index 222e1892fb5..29a4efb4c24 100644 --- a/tests/qtest/meson.build +++ b/tests/qtest/meson.build @@ -208,8 +208,8 @@ qtests_arm =3D \ # TODO: once aarch64 TCG is fixed on ARM 32 bit host, make bios-tables-tes= t unconditional qtests_aarch64 =3D \ (cpu !=3D 'arm' and unpack_edk2_blobs ? ['bios-tables-test'] : []) + = \ - (config_all_devices.has_key('CONFIG_TPM_TIS_SYSBUS') ? ['tpm-tis-device-= test'] : []) + \ - (config_all_devices.has_key('CONFIG_TPM_TIS_SYSBUS') ? ['tpm-tis-device-= swtpm-test'] : []) + \ + (config_all.has_key('CONFIG_TCG') and config_all_devices.has_key('CONFIG= _TPM_TIS_SYSBUS') ? \ + ['tpm-tis-device-test', 'tpm-tis-device-swtpm-test'] : []) + = \ (config_all_devices.has_key('CONFIG_XLNX_ZYNQMP_ARM') ? ['xlnx-can-test'= , 'fuzz-xlnx-dp-test'] : []) + \ (config_all_devices.has_key('CONFIG_RASPI') ? ['bcm2835-dma-test'] : [])= + \ ['arm-cpu-features', --=20 2.34.1