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Tue, 14 Feb 2023 02:02:56 +0800 (CST) X-QQ-mid: bizesmtp62t1676311378tlu4k43z X-QQ-SSF: 01200000000000C0D000000A0000000 X-QQ-FEAT: BVPw/Nqi9Grtg7tRFRZoTfBiG7gScx6U/2qXlUA8RfZaEjn1F2cAtjWA9wMyM KcdXQ57czja/dtRFHauqFc6cZGEMmi7CFE0seNme8PV55VBIuSlw+LmnVZ5sJJXGVmwjLeK /vj06OCIZLXCS15e9hKsdp0Se+b9tQU+rOuuO3avDfpBIdTbdfUtWFA+SxB0sDdoTk5YrYs oLV1ooQd9bapgsyJw56GBapSIHe4knzFBpXZxMIfJUfJEnQ18Bw33M9YXMGhhIztC5mXW1H O6E3w6oG9qgCJtO+nOi0FgLP+yss8ih4XOg1JYE4qbG31JJ3aGtwhxZAgUB4Wz2QV+K0EJt U1x6//7DFaMP/au6KsaXiT0VEAqUF3NZEN7yr/24AeOijnq1Zo= X-QQ-GoodBg: 0 From: Bin Meng To: qemu-devel@nongnu.org Cc: Alistair Francis , Bin Meng , Daniel Henrique Barboza , Liu Zhiwei , Palmer Dabbelt , Weiwei Li , qemu-riscv@nongnu.org Subject: [PATCH 05/18] target/riscv: Coding style fixes in csr.c Date: Tue, 14 Feb 2023 02:02:01 +0800 Message-Id: <20230213180215.1524938-6-bmeng@tinylab.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230213180215.1524938-1-bmeng@tinylab.org> References: <20230213180215.1524938-1-bmeng@tinylab.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvr:qybglogicsvr3 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=43.155.65.254; envelope-from=bmeng@tinylab.org; helo=bg4.exmail.qq.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1676311462469100002 Content-Type: text/plain; charset="utf-8" Fix various places that violate QEMU coding style: - correct multi-line comment format - indent to opening parenthesis Signed-off-by: Bin Meng Reviewed-by: LIU Zhiwei Reviewed-by: Weiwei Li --- target/riscv/csr.c | 62 ++++++++++++++++++++++++---------------------- 1 file changed, 32 insertions(+), 30 deletions(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index c2dd9d5af0..cc74819759 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -963,7 +963,7 @@ static RISCVException sstc_32(CPURISCVState *env, int c= srno) } =20 static RISCVException read_vstimecmp(CPURISCVState *env, int csrno, - target_ulong *val) + target_ulong *val) { *val =3D env->vstimecmp; =20 @@ -971,7 +971,7 @@ static RISCVException read_vstimecmp(CPURISCVState *env= , int csrno, } =20 static RISCVException read_vstimecmph(CPURISCVState *env, int csrno, - target_ulong *val) + target_ulong *val) { *val =3D env->vstimecmp >> 32; =20 @@ -979,7 +979,7 @@ static RISCVException read_vstimecmph(CPURISCVState *en= v, int csrno, } =20 static RISCVException write_vstimecmp(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { RISCVCPU *cpu =3D env_archcpu(env); =20 @@ -996,7 +996,7 @@ static RISCVException write_vstimecmp(CPURISCVState *en= v, int csrno, } =20 static RISCVException write_vstimecmph(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { RISCVCPU *cpu =3D env_archcpu(env); =20 @@ -1020,7 +1020,7 @@ static RISCVException read_stimecmp(CPURISCVState *en= v, int csrno, } =20 static RISCVException read_stimecmph(CPURISCVState *env, int csrno, - target_ulong *val) + target_ulong *val) { if (riscv_cpu_virt_enabled(env)) { *val =3D env->vstimecmp >> 32; @@ -1032,7 +1032,7 @@ static RISCVException read_stimecmph(CPURISCVState *e= nv, int csrno, } =20 static RISCVException write_stimecmp(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { RISCVCPU *cpu =3D env_archcpu(env); =20 @@ -1055,7 +1055,7 @@ static RISCVException write_stimecmp(CPURISCVState *e= nv, int csrno, } =20 static RISCVException write_stimecmph(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { RISCVCPU *cpu =3D env_archcpu(env); =20 @@ -1342,7 +1342,8 @@ static RISCVException write_misa(CPURISCVState *env, = int csrno, =20 /* 'E' excludes all other extensions */ if (val & RVE) { - /* when we support 'E' we can do "val =3D RVE;" however + /* + * when we support 'E' we can do "val =3D RVE;" however * for now we just drop writes if 'E' is present. */ return RISCV_EXCP_NONE; @@ -1364,7 +1365,8 @@ static RISCVException write_misa(CPURISCVState *env, = int csrno, val &=3D ~RVD; } =20 - /* Suppress 'C' if next instruction is not aligned + /* + * Suppress 'C' if next instruction is not aligned * TODO: this should check next_pc */ if ((val & RVC) && (GETPC() & ~3) !=3D 0) { @@ -1833,28 +1835,28 @@ static RISCVException write_mscratch(CPURISCVState = *env, int csrno, } =20 static RISCVException read_mepc(CPURISCVState *env, int csrno, - target_ulong *val) + target_ulong *val) { *val =3D env->mepc; return RISCV_EXCP_NONE; } =20 static RISCVException write_mepc(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { env->mepc =3D val; return RISCV_EXCP_NONE; } =20 static RISCVException read_mcause(CPURISCVState *env, int csrno, - target_ulong *val) + target_ulong *val) { *val =3D env->mcause; return RISCV_EXCP_NONE; } =20 static RISCVException write_mcause(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { env->mcause =3D val; return RISCV_EXCP_NONE; @@ -1876,14 +1878,14 @@ static RISCVException write_mtval(CPURISCVState *en= v, int csrno, =20 /* Execution environment configuration setup */ static RISCVException read_menvcfg(CPURISCVState *env, int csrno, - target_ulong *val) + target_ulong *val) { *val =3D env->menvcfg; return RISCV_EXCP_NONE; } =20 static RISCVException write_menvcfg(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { uint64_t mask =3D MENVCFG_FIOM | MENVCFG_CBIE | MENVCFG_CBCFE | MENVCF= G_CBZE; =20 @@ -1896,14 +1898,14 @@ static RISCVException write_menvcfg(CPURISCVState *= env, int csrno, } =20 static RISCVException read_menvcfgh(CPURISCVState *env, int csrno, - target_ulong *val) + target_ulong *val) { *val =3D env->menvcfg >> 32; return RISCV_EXCP_NONE; } =20 static RISCVException write_menvcfgh(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { uint64_t mask =3D MENVCFG_PBMTE | MENVCFG_STCE; uint64_t valh =3D (uint64_t)val << 32; @@ -1914,7 +1916,7 @@ static RISCVException write_menvcfgh(CPURISCVState *e= nv, int csrno, } =20 static RISCVException read_senvcfg(CPURISCVState *env, int csrno, - target_ulong *val) + target_ulong *val) { RISCVException ret; =20 @@ -1928,7 +1930,7 @@ static RISCVException read_senvcfg(CPURISCVState *env= , int csrno, } =20 static RISCVException write_senvcfg(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { uint64_t mask =3D SENVCFG_FIOM | SENVCFG_CBIE | SENVCFG_CBCFE | SENVCF= G_CBZE; RISCVException ret; @@ -1943,7 +1945,7 @@ static RISCVException write_senvcfg(CPURISCVState *en= v, int csrno, } =20 static RISCVException read_henvcfg(CPURISCVState *env, int csrno, - target_ulong *val) + target_ulong *val) { RISCVException ret; =20 @@ -1957,7 +1959,7 @@ static RISCVException read_henvcfg(CPURISCVState *env= , int csrno, } =20 static RISCVException write_henvcfg(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { uint64_t mask =3D HENVCFG_FIOM | HENVCFG_CBIE | HENVCFG_CBCFE | HENVCF= G_CBZE; RISCVException ret; @@ -1977,7 +1979,7 @@ static RISCVException write_henvcfg(CPURISCVState *en= v, int csrno, } =20 static RISCVException read_henvcfgh(CPURISCVState *env, int csrno, - target_ulong *val) + target_ulong *val) { RISCVException ret; =20 @@ -1991,7 +1993,7 @@ static RISCVException read_henvcfgh(CPURISCVState *en= v, int csrno, } =20 static RISCVException write_henvcfgh(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { uint64_t mask =3D HENVCFG_PBMTE | HENVCFG_STCE; uint64_t valh =3D (uint64_t)val << 32; @@ -2034,13 +2036,13 @@ static RISCVException write_mstateen0(CPURISCVState= *env, int csrno, } =20 static RISCVException write_mstateen_1_3(CPURISCVState *env, int csrno, - target_ulong new_val) + target_ulong new_val) { return write_mstateen(env, csrno, SMSTATEEN_STATEEN, new_val); } =20 static RISCVException read_mstateenh(CPURISCVState *env, int csrno, - target_ulong *val) + target_ulong *val) { *val =3D env->mstateen[csrno - CSR_MSTATEEN0H] >> 32; =20 @@ -2061,7 +2063,7 @@ static RISCVException write_mstateenh(CPURISCVState *= env, int csrno, } =20 static RISCVException write_mstateen0h(CPURISCVState *env, int csrno, - target_ulong new_val) + target_ulong new_val) { uint64_t wr_mask =3D SMSTATEEN_STATEEN | SMSTATEEN0_HSENVCFG; =20 @@ -2069,7 +2071,7 @@ static RISCVException write_mstateen0h(CPURISCVState = *env, int csrno, } =20 static RISCVException write_mstateenh_1_3(CPURISCVState *env, int csrno, - target_ulong new_val) + target_ulong new_val) { return write_mstateenh(env, csrno, SMSTATEEN_STATEEN, new_val); } @@ -2106,7 +2108,7 @@ static RISCVException write_hstateen0(CPURISCVState *= env, int csrno, } =20 static RISCVException write_hstateen_1_3(CPURISCVState *env, int csrno, - target_ulong new_val) + target_ulong new_val) { return write_hstateen(env, csrno, SMSTATEEN_STATEEN, new_val); } @@ -2145,7 +2147,7 @@ static RISCVException write_hstateen0h(CPURISCVState = *env, int csrno, } =20 static RISCVException write_hstateenh_1_3(CPURISCVState *env, int csrno, - target_ulong new_val) + target_ulong new_val) { return write_hstateenh(env, csrno, SMSTATEEN_STATEEN, new_val); } @@ -3338,7 +3340,7 @@ static RISCVException read_mseccfg(CPURISCVState *env= , int csrno, } =20 static RISCVException write_mseccfg(CPURISCVState *env, int csrno, - target_ulong val) + target_ulong val) { mseccfg_csr_write(env, val); return RISCV_EXCP_NONE; --=20 2.25.1