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Tsirkin" , Eduardo Habkost , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Igor Mammedov , John G Johnson , Bernhard Beschow Subject: [PATCH v7 06/23] hw/isa/piix3: Move ISA bus IRQ assignments into host device Date: Sun, 12 Feb 2023 13:37:48 +0100 Message-Id: <20230212123805.30799-7-shentey@gmail.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230212123805.30799-1-shentey@gmail.com> References: <20230212123805.30799-1-shentey@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::52a; envelope-from=shentey@gmail.com; helo=mail-ed1-x52a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1676205769475100007 Content-Type: text/plain; charset="utf-8" Having the south bridge assign the ISA interrupts to the ISA bus itself makes the south bridge more self contained. Furthermore, it allows ISA interrupt wiring in pci_piix3_realize() which will be used in subsequent patches. Signed-off-by: Bernhard Beschow --- hw/i386/pc_piix.c | 6 +++--- hw/isa/piix3.c | 2 ++ 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 5ea8d4a585..dbddc3d060 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -245,10 +245,10 @@ static void pc_init1(MachineState *machine, object_property_set_bool(OBJECT(pci_dev), "smm-enabled", x86_machine_is_smm_enabled(x86ms), &error_abort); - pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); - piix3 =3D PIIX3_PCI_DEVICE(pci_dev); piix3->pic =3D x86ms->gsi; + pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); + piix3_devfn =3D piix3->dev.devfn; isa_bus =3D ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0")); rtc_state =3D ISA_DEVICE(object_resolve_path_component(OBJECT(pci_= dev), @@ -259,6 +259,7 @@ static void pc_init1(MachineState *machine, piix4_pm =3D NULL; isa_bus =3D isa_bus_new(NULL, get_system_memory(), system_io, &error_abort); + isa_bus_irqs(isa_bus, x86ms->gsi); =20 rtc_state =3D isa_new(TYPE_MC146818_RTC); qdev_prop_set_int32(DEVICE(rtc_state), "base_year", 2000); @@ -267,7 +268,6 @@ static void pc_init1(MachineState *machine, i8257_dma_init(isa_bus, 0); pcms->hpet_enabled =3D false; } - isa_bus_irqs(isa_bus, x86ms->gsi); =20 if (x86ms->pic =3D=3D ON_OFF_AUTO_ON || x86ms->pic =3D=3D ON_OFF_AUTO_= AUTO) { pc_i8259_create(isa_bus, gsi_state->i8259_irq); diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index 27bd4dbf65..007225a96e 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -302,6 +302,8 @@ static void pci_piix3_realize(PCIDevice *dev, Error **e= rrp) memory_region_add_subregion_overlap(pci_address_space_io(dev), PIIX_RCR_IOPORT, &d->rcr_mem, 1); =20 + isa_bus_irqs(isa_bus, d->pic); + i8257_dma_init(isa_bus, 0); =20 /* RTC */ --=20 2.39.1