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Tsirkin" , Marcel Apfelbaum , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 2/2] hw/pci: Trace IRQ routing on PCI topology Date: Sat, 11 Feb 2023 16:22:39 +0100 Message-Id: <20230211152239.88106-3-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230211152239.88106-1-philmd@linaro.org> References: <20230211152239.88106-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676129056409100003 Trace how IRQ are rooted from EP to RC. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/pci/pci.c | 8 ++++++++ hw/pci/trace-events | 1 + 2 files changed, 9 insertions(+) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 805e4b0c68..2e785e3aef 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -279,9 +279,13 @@ static void pci_change_irq_level(PCIDevice *pci_dev, i= nt irq_num, int change) { PCIBus *bus; for (;;) { + int dev_irq =3D irq_num; bus =3D pci_get_bus(pci_dev); assert(bus->map_irq); irq_num =3D bus->map_irq(pci_dev, irq_num); + trace_pci_route_irq(dev_irq, DEVICE(pci_dev)->canonical_path, irq_= num, + pci_bus_is_root(bus) ? "root-complex" + : DEVICE(bus->parent_dev)->canonical_p= ath); if (bus->set_irq) break; pci_dev =3D bus->parent_dev; @@ -1600,8 +1604,12 @@ PCIINTxRoute pci_device_route_intx_to_irq(PCIDevice = *dev, int pin) PCIBus *bus; =20 do { + int dev_irq =3D pin; bus =3D pci_get_bus(dev); pin =3D bus->map_irq(dev, pin); + trace_pci_route_irq(dev_irq, DEVICE(dev)->canonical_path, pin, + pci_bus_is_root(bus) ? "root-complex" + : DEVICE(bus->parent_dev)->canonical_p= ath); dev =3D bus->parent_dev; } while (dev); =20 diff --git a/hw/pci/trace-events b/hw/pci/trace-events index aaf46bc92d..42430869ce 100644 --- a/hw/pci/trace-events +++ b/hw/pci/trace-events @@ -3,6 +3,7 @@ # pci.c pci_update_mappings_del(const char *dev, uint32_t bus, uint32_t slot, uint= 32_t func, int bar, uint64_t addr, uint64_t size) "%s %02x:%02x.%x %d,0x%"P= RIx64"+0x%"PRIx64 pci_update_mappings_add(const char *dev, uint32_t bus, uint32_t slot, uint= 32_t func, int bar, uint64_t addr, uint64_t size) "%s %02x:%02x.%x %d,0x%"P= RIx64"+0x%"PRIx64 +pci_route_irq(int dev_irq, const char *dev_path, int parent_irq, const cha= r *parent_path) "IRQ %d @%s -> IRQ %d @%s" =20 # pci_host.c pci_cfg_read(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, = unsigned offs, unsigned val) "%s %02x:%02x.%x @0x%x -> 0x%x" --=20 2.38.1