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Tsirkin" , Thomas Huth , Eduardo Habkost , Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Huacai Chen , Jiaxun Yang Subject: [PATCH 1/3] hw/rtc/mc146818rtc: Rename RTCState -> MC146818RtcState Date: Sat, 11 Feb 2023 00:31:14 +0100 Message-Id: <20230210233116.80311-2-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230210233116.80311-1-philmd@linaro.org> References: <20230210233116.80311-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=philmd@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1676071903881100001 RTCState only represents a Motorola MC146818 model, not any RTC chipset. Rename the structure as MC146818RtcState using: $ sed -i -e s/RTCState/MC146818RtcState/g $(git grep -wl RTCState) Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- hw/isa/piix4.c | 2 +- hw/isa/vt82c686.c | 2 +- hw/rtc/mc146818rtc.c | 116 +++++++++++++++++------------------ include/hw/rtc/mc146818rtc.h | 6 +- 4 files changed, 63 insertions(+), 63 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index de60ceef73..e2fafc3b13 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -47,7 +47,7 @@ struct PIIX4State { qemu_irq cpu_intr; qemu_irq *isa; =20 - RTCState rtc; + MC146818RtcState rtc; PCIIDEState ide; UHCIState uhci; PIIX4PMState pm; diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 3f9bd0c04d..67cbb658aa 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -550,7 +550,7 @@ struct ViaISAState { qemu_irq cpu_intr; qemu_irq *isa_irqs; ViaSuperIOState via_sio; - RTCState rtc; + MC146818RtcState rtc; PCIIDEState ide; UHCIState uhci[2]; ViaPMState pm; diff --git a/hw/rtc/mc146818rtc.c b/hw/rtc/mc146818rtc.c index ba612a151d..08f6c0e0c5 100644 --- a/hw/rtc/mc146818rtc.c +++ b/hw/rtc/mc146818rtc.c @@ -71,19 +71,19 @@ =20 #define RTC_ISA_BASE 0x70 =20 -static void rtc_set_time(RTCState *s); -static void rtc_update_time(RTCState *s); -static void rtc_set_cmos(RTCState *s, const struct tm *tm); -static inline int rtc_from_bcd(RTCState *s, int a); -static uint64_t get_next_alarm(RTCState *s); +static void rtc_set_time(MC146818RtcState *s); +static void rtc_update_time(MC146818RtcState *s); +static void rtc_set_cmos(MC146818RtcState *s, const struct tm *tm); +static inline int rtc_from_bcd(MC146818RtcState *s, int a); +static uint64_t get_next_alarm(MC146818RtcState *s); =20 -static inline bool rtc_running(RTCState *s) +static inline bool rtc_running(MC146818RtcState *s) { return (!(s->cmos_data[RTC_REG_B] & REG_B_SET) && (s->cmos_data[RTC_REG_A] & 0x70) <=3D 0x20); } =20 -static uint64_t get_guest_rtc_ns(RTCState *s) +static uint64_t get_guest_rtc_ns(MC146818RtcState *s) { uint64_t guest_clock =3D qemu_clock_get_ns(rtc_clock); =20 @@ -91,7 +91,7 @@ static uint64_t get_guest_rtc_ns(RTCState *s) guest_clock - s->last_update + s->offset; } =20 -static void rtc_coalesced_timer_update(RTCState *s) +static void rtc_coalesced_timer_update(MC146818RtcState *s) { if (s->irq_coalesced =3D=3D 0) { timer_del(s->coalesced_timer); @@ -104,19 +104,19 @@ static void rtc_coalesced_timer_update(RTCState *s) } } =20 -static QLIST_HEAD(, RTCState) rtc_devices =3D +static QLIST_HEAD(, MC146818RtcState) rtc_devices =3D QLIST_HEAD_INITIALIZER(rtc_devices); =20 void qmp_rtc_reset_reinjection(Error **errp) { - RTCState *s; + MC146818RtcState *s; =20 QLIST_FOREACH(s, &rtc_devices, link) { s->irq_coalesced =3D 0; } } =20 -static bool rtc_policy_slew_deliver_irq(RTCState *s) +static bool rtc_policy_slew_deliver_irq(MC146818RtcState *s) { kvm_reset_irq_delivered(); qemu_irq_raise(s->irq); @@ -125,7 +125,7 @@ static bool rtc_policy_slew_deliver_irq(RTCState *s) =20 static void rtc_coalesced_timer(void *opaque) { - RTCState *s =3D opaque; + MC146818RtcState *s =3D opaque; =20 if (s->irq_coalesced !=3D 0) { s->cmos_data[RTC_REG_C] |=3D 0xc0; @@ -140,7 +140,7 @@ static void rtc_coalesced_timer(void *opaque) rtc_coalesced_timer_update(s); } =20 -static uint32_t rtc_periodic_clock_ticks(RTCState *s) +static uint32_t rtc_periodic_clock_ticks(MC146818RtcState *s) { int period_code; =20 @@ -158,7 +158,7 @@ static uint32_t rtc_periodic_clock_ticks(RTCState *s) * is just due to period adjustment. */ static void -periodic_timer_update(RTCState *s, int64_t current_time, uint32_t old_peri= od, bool period_change) +periodic_timer_update(MC146818RtcState *s, int64_t current_time, uint32_t = old_period, bool period_change) { uint32_t period; int64_t cur_clock, next_irq_clock, lost_clock =3D 0; @@ -234,7 +234,7 @@ periodic_timer_update(RTCState *s, int64_t current_time= , uint32_t old_period, bo =20 static void rtc_periodic_timer(void *opaque) { - RTCState *s =3D opaque; + MC146818RtcState *s =3D opaque; =20 periodic_timer_update(s, s->next_periodic_time, s->period, false); s->cmos_data[RTC_REG_C] |=3D REG_C_PF; @@ -255,7 +255,7 @@ static void rtc_periodic_timer(void *opaque) } =20 /* handle update-ended timer */ -static void check_update_timer(RTCState *s) +static void check_update_timer(MC146818RtcState *s) { uint64_t next_update_time; uint64_t guest_nsec; @@ -306,7 +306,7 @@ static void check_update_timer(RTCState *s) } } =20 -static inline uint8_t convert_hour(RTCState *s, uint8_t hour) +static inline uint8_t convert_hour(MC146818RtcState *s, uint8_t hour) { if (!(s->cmos_data[RTC_REG_B] & REG_B_24H)) { hour %=3D 12; @@ -317,7 +317,7 @@ static inline uint8_t convert_hour(RTCState *s, uint8_t= hour) return hour; } =20 -static uint64_t get_next_alarm(RTCState *s) +static uint64_t get_next_alarm(MC146818RtcState *s) { int32_t alarm_sec, alarm_min, alarm_hour, cur_hour, cur_min, cur_sec; int32_t hour, min, sec; @@ -410,7 +410,7 @@ static uint64_t get_next_alarm(RTCState *s) =20 static void rtc_update_timer(void *opaque) { - RTCState *s =3D opaque; + MC146818RtcState *s =3D opaque; int32_t irqs =3D REG_C_UF; int32_t new_irqs; =20 @@ -439,7 +439,7 @@ static void rtc_update_timer(void *opaque) static void cmos_ioport_write(void *opaque, hwaddr addr, uint64_t data, unsigned size) { - RTCState *s =3D opaque; + MC146818RtcState *s =3D opaque; uint32_t old_period; bool update_periodic_timer; =20 @@ -557,7 +557,7 @@ static void cmos_ioport_write(void *opaque, hwaddr addr, } } =20 -static inline int rtc_to_bcd(RTCState *s, int a) +static inline int rtc_to_bcd(MC146818RtcState *s, int a) { if (s->cmos_data[RTC_REG_B] & REG_B_DM) { return a; @@ -566,7 +566,7 @@ static inline int rtc_to_bcd(RTCState *s, int a) } } =20 -static inline int rtc_from_bcd(RTCState *s, int a) +static inline int rtc_from_bcd(MC146818RtcState *s, int a) { if ((a & 0xc0) =3D=3D 0xc0) { return -1; @@ -578,7 +578,7 @@ static inline int rtc_from_bcd(RTCState *s, int a) } } =20 -static void rtc_get_time(RTCState *s, struct tm *tm) +static void rtc_get_time(MC146818RtcState *s, struct tm *tm) { tm->tm_sec =3D rtc_from_bcd(s, s->cmos_data[RTC_SECONDS]); tm->tm_min =3D rtc_from_bcd(s, s->cmos_data[RTC_MINUTES]); @@ -597,7 +597,7 @@ static void rtc_get_time(RTCState *s, struct tm *tm) rtc_from_bcd(s, s->cmos_data[RTC_CENTURY]) * 100 - 1900; } =20 -static void rtc_set_time(RTCState *s) +static void rtc_set_time(MC146818RtcState *s) { struct tm tm; g_autofree const char *qom_path =3D object_get_canonical_path(OBJECT(s= )); @@ -609,7 +609,7 @@ static void rtc_set_time(RTCState *s) qapi_event_send_rtc_change(qemu_timedate_diff(&tm), qom_path); } =20 -static void rtc_set_cmos(RTCState *s, const struct tm *tm) +static void rtc_set_cmos(MC146818RtcState *s, const struct tm *tm) { int year; =20 @@ -633,7 +633,7 @@ static void rtc_set_cmos(RTCState *s, const struct tm *= tm) s->cmos_data[RTC_CENTURY] =3D rtc_to_bcd(s, year / 100); } =20 -static void rtc_update_time(RTCState *s) +static void rtc_update_time(MC146818RtcState *s) { struct tm ret; time_t guest_sec; @@ -649,7 +649,7 @@ static void rtc_update_time(RTCState *s) } } =20 -static int update_in_progress(RTCState *s) +static int update_in_progress(MC146818RtcState *s) { int64_t guest_nsec; =20 @@ -678,7 +678,7 @@ static int update_in_progress(RTCState *s) static uint64_t cmos_ioport_read(void *opaque, hwaddr addr, unsigned size) { - RTCState *s =3D opaque; + MC146818RtcState *s =3D opaque; int ret; if ((addr & 1) =3D=3D 0) { return 0xff; @@ -741,21 +741,21 @@ static uint64_t cmos_ioport_read(void *opaque, hwaddr= addr, =20 void rtc_set_memory(ISADevice *dev, int addr, int val) { - RTCState *s =3D MC146818_RTC(dev); + MC146818RtcState *s =3D MC146818_RTC(dev); if (addr >=3D 0 && addr <=3D 127) s->cmos_data[addr] =3D val; } =20 int rtc_get_memory(ISADevice *dev, int addr) { - RTCState *s =3D MC146818_RTC(dev); + MC146818RtcState *s =3D MC146818_RTC(dev); assert(addr >=3D 0 && addr <=3D 127); return s->cmos_data[addr]; } =20 static void rtc_set_date_from_host(ISADevice *dev) { - RTCState *s =3D MC146818_RTC(dev); + MC146818RtcState *s =3D MC146818_RTC(dev); struct tm tm; =20 qemu_get_timedate(&tm, 0); @@ -770,7 +770,7 @@ static void rtc_set_date_from_host(ISADevice *dev) =20 static int rtc_pre_save(void *opaque) { - RTCState *s =3D opaque; + MC146818RtcState *s =3D opaque; =20 rtc_update_time(s); =20 @@ -779,7 +779,7 @@ static int rtc_pre_save(void *opaque) =20 static int rtc_post_load(void *opaque, int version_id) { - RTCState *s =3D opaque; + MC146818RtcState *s =3D opaque; =20 if (version_id <=3D 2 || rtc_clock =3D=3D QEMU_CLOCK_REALTIME) { rtc_set_time(s); @@ -810,7 +810,7 @@ static int rtc_post_load(void *opaque, int version_id) =20 static bool rtc_irq_reinject_on_ack_count_needed(void *opaque) { - RTCState *s =3D (RTCState *)opaque; + MC146818RtcState *s =3D (MC146818RtcState *)opaque; return s->irq_reinject_on_ack_count !=3D 0; } =20 @@ -820,7 +820,7 @@ static const VMStateDescription vmstate_rtc_irq_reinjec= t_on_ack_count =3D { .minimum_version_id =3D 1, .needed =3D rtc_irq_reinject_on_ack_count_needed, .fields =3D (VMStateField[]) { - VMSTATE_UINT16(irq_reinject_on_ack_count, RTCState), + VMSTATE_UINT16(irq_reinject_on_ack_count, MC146818RtcState), VMSTATE_END_OF_LIST() } }; @@ -832,19 +832,19 @@ static const VMStateDescription vmstate_rtc =3D { .pre_save =3D rtc_pre_save, .post_load =3D rtc_post_load, .fields =3D (VMStateField[]) { - VMSTATE_BUFFER(cmos_data, RTCState), - VMSTATE_UINT8(cmos_index, RTCState), + VMSTATE_BUFFER(cmos_data, MC146818RtcState), + VMSTATE_UINT8(cmos_index, MC146818RtcState), VMSTATE_UNUSED(7*4), - VMSTATE_TIMER_PTR(periodic_timer, RTCState), - VMSTATE_INT64(next_periodic_time, RTCState), + VMSTATE_TIMER_PTR(periodic_timer, MC146818RtcState), + VMSTATE_INT64(next_periodic_time, MC146818RtcState), VMSTATE_UNUSED(3*8), - VMSTATE_UINT32_V(irq_coalesced, RTCState, 2), - VMSTATE_UINT32_V(period, RTCState, 2), - VMSTATE_UINT64_V(base_rtc, RTCState, 3), - VMSTATE_UINT64_V(last_update, RTCState, 3), - VMSTATE_INT64_V(offset, RTCState, 3), - VMSTATE_TIMER_PTR_V(update_timer, RTCState, 3), - VMSTATE_UINT64_V(next_alarm_time, RTCState, 3), + VMSTATE_UINT32_V(irq_coalesced, MC146818RtcState, 2), + VMSTATE_UINT32_V(period, MC146818RtcState, 2), + VMSTATE_UINT64_V(base_rtc, MC146818RtcState, 3), + VMSTATE_UINT64_V(last_update, MC146818RtcState, 3), + VMSTATE_INT64_V(offset, MC146818RtcState, 3), + VMSTATE_TIMER_PTR_V(update_timer, MC146818RtcState, 3), + VMSTATE_UINT64_V(next_alarm_time, MC146818RtcState, 3), VMSTATE_END_OF_LIST() }, .subsections =3D (const VMStateDescription*[]) { @@ -857,7 +857,7 @@ static const VMStateDescription vmstate_rtc =3D { BIOS will read it and start S3 resume at POST Entry */ static void rtc_notify_suspend(Notifier *notifier, void *data) { - RTCState *s =3D container_of(notifier, RTCState, suspend_notifier); + MC146818RtcState *s =3D container_of(notifier, MC146818RtcState, suspe= nd_notifier); rtc_set_memory(ISA_DEVICE(s), 0xF, 0xFE); } =20 @@ -873,7 +873,7 @@ static const MemoryRegionOps cmos_ops =3D { =20 static void rtc_get_date(Object *obj, struct tm *current_tm, Error **errp) { - RTCState *s =3D MC146818_RTC(obj); + MC146818RtcState *s =3D MC146818_RTC(obj); =20 rtc_update_time(s); rtc_get_time(s, current_tm); @@ -882,7 +882,7 @@ static void rtc_get_date(Object *obj, struct tm *curren= t_tm, Error **errp) static void rtc_realizefn(DeviceState *dev, Error **errp) { ISADevice *isadev =3D ISA_DEVICE(dev); - RTCState *s =3D MC146818_RTC(dev); + MC146818RtcState *s =3D MC146818_RTC(dev); =20 s->cmos_data[RTC_REG_A] =3D 0x26; s->cmos_data[RTC_REG_B] =3D 0x02; @@ -949,7 +949,7 @@ ISADevice *mc146818_rtc_init(ISABus *bus, int base_year= , qemu_irq intercept_irq) { DeviceState *dev; ISADevice *isadev; - RTCState *s; + MC146818RtcState *s; =20 isadev =3D isa_new(TYPE_MC146818_RTC); dev =3D DEVICE(isadev); @@ -969,17 +969,17 @@ ISADevice *mc146818_rtc_init(ISABus *bus, int base_ye= ar, qemu_irq intercept_irq) } =20 static Property mc146818rtc_properties[] =3D { - DEFINE_PROP_INT32("base_year", RTCState, base_year, 1980), - DEFINE_PROP_UINT16("iobase", RTCState, io_base, RTC_ISA_BASE), - DEFINE_PROP_UINT8("irq", RTCState, isairq, RTC_ISA_IRQ), - DEFINE_PROP_LOSTTICKPOLICY("lost_tick_policy", RTCState, + DEFINE_PROP_INT32("base_year", MC146818RtcState, base_year, 1980), + DEFINE_PROP_UINT16("iobase", MC146818RtcState, io_base, RTC_ISA_BASE), + DEFINE_PROP_UINT8("irq", MC146818RtcState, isairq, RTC_ISA_IRQ), + DEFINE_PROP_LOSTTICKPOLICY("lost_tick_policy", MC146818RtcState, lost_tick_policy, LOST_TICK_POLICY_DISCARD), DEFINE_PROP_END_OF_LIST(), }; =20 static void rtc_reset_enter(Object *obj, ResetType type) { - RTCState *s =3D MC146818_RTC(obj); + MC146818RtcState *s =3D MC146818_RTC(obj); =20 /* Reason: VM do suspend self will set 0xfe * Reset any values other than 0xfe(Guest suspend case) */ @@ -1000,14 +1000,14 @@ static void rtc_reset_enter(Object *obj, ResetType = type) =20 static void rtc_reset_hold(Object *obj) { - RTCState *s =3D MC146818_RTC(obj); + MC146818RtcState *s =3D MC146818_RTC(obj); =20 qemu_irq_lower(s->irq); } =20 static void rtc_build_aml(AcpiDevAmlIf *adev, Aml *scope) { - RTCState *s =3D MC146818_RTC(adev); + MC146818RtcState *s =3D MC146818_RTC(adev); Aml *dev; Aml *crs; =20 @@ -1045,7 +1045,7 @@ static void rtc_class_initfn(ObjectClass *klass, void= *data) static const TypeInfo mc146818rtc_info =3D { .name =3D TYPE_MC146818_RTC, .parent =3D TYPE_ISA_DEVICE, - .instance_size =3D sizeof(RTCState), + .instance_size =3D sizeof(MC146818RtcState), .class_init =3D rtc_class_initfn, .interfaces =3D (InterfaceInfo[]) { { TYPE_ACPI_DEV_AML_IF }, diff --git a/include/hw/rtc/mc146818rtc.h b/include/hw/rtc/mc146818rtc.h index 45bcd6f040..11631af7e3 100644 --- a/include/hw/rtc/mc146818rtc.h +++ b/include/hw/rtc/mc146818rtc.h @@ -16,9 +16,9 @@ #include "qom/object.h" =20 #define TYPE_MC146818_RTC "mc146818rtc" -OBJECT_DECLARE_SIMPLE_TYPE(RTCState, MC146818_RTC) +OBJECT_DECLARE_SIMPLE_TYPE(MC146818RtcState, MC146818_RTC) =20 -struct RTCState { +struct MC146818RtcState { ISADevice parent_obj; =20 MemoryRegion io; @@ -46,7 +46,7 @@ struct RTCState { Notifier clock_reset_notifier; LostTickPolicy lost_tick_policy; Notifier suspend_notifier; - QLIST_ENTRY(RTCState) link; + QLIST_ENTRY(MC146818RtcState) link; }; =20 #define RTC_ISA_IRQ 8 --=20 2.38.1