From nobody Thu Apr 10 22:02:25 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1675764664218832.1280712023492; Tue, 7 Feb 2023 02:11:04 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pPKuJ-0000wO-7S; Tue, 07 Feb 2023 05:08:59 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKtw-0000W5-Fs; Tue, 07 Feb 2023 05:08:37 -0500 Received: from gandalf.ozlabs.org ([150.107.74.76]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKtu-0002T3-Fy; Tue, 07 Feb 2023 05:08:36 -0500 Received: from gandalf.ozlabs.org (mail.ozlabs.org [IPv6:2404:9400:2221:ea00::3]) by gandalf.ozlabs.org (Postfix) with ESMTP id 4P9zNd3hjMz4xwl; Tue, 7 Feb 2023 21:08:33 +1100 (AEDT) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4P9zNb3Zzfz4xyf; Tue, 7 Feb 2023 21:08:31 +1100 (AEDT) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Peter Maydell , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Peter Delevoryas , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Subject: [PULL 15/25] hw/watchdog/wdt_aspeed: Rename MMIO region size as 'iosize' Date: Tue, 7 Feb 2023 11:07:34 +0100 Message-Id: <20230207100744.698694-16-clg@kaod.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230207100744.698694-1-clg@kaod.org> References: <20230207100744.698694-1-clg@kaod.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=150.107.74.76; envelope-from=SRS0=a43c=6D=kaod.org=clg@ozlabs.org; helo=gandalf.ozlabs.org X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1675764665863100003 From: Philippe Mathieu-Daud=C3=A9 Avoid confusing two different things: - the WDT I/O region size ('iosize') - at which offset the SoC map the WDT ('offset') While it is often the same, we can map smaller region sizes at larger offsets. Here we are interested in the I/O region size, so rename as 'iosize'. Reviewed-by: Peter Delevoryas Signed-off-by: Philippe Mathieu-Daud=C3=A9 [ clg: Introduced temporary wdt_offset variable ] Signed-off-by: C=C3=A9dric Le Goater --- include/hw/watchdog/wdt_aspeed.h | 2 +- hw/arm/aspeed_ast10x0.c | 4 ++-- hw/arm/aspeed_ast2600.c | 4 ++-- hw/arm/aspeed_soc.c | 4 ++-- hw/watchdog/wdt_aspeed.c | 8 ++++---- 5 files changed, 11 insertions(+), 11 deletions(-) diff --git a/include/hw/watchdog/wdt_aspeed.h b/include/hw/watchdog/wdt_asp= eed.h index dfa5dfa424..db91ee6b51 100644 --- a/include/hw/watchdog/wdt_aspeed.h +++ b/include/hw/watchdog/wdt_aspeed.h @@ -40,7 +40,7 @@ struct AspeedWDTState { struct AspeedWDTClass { SysBusDeviceClass parent_class; =20 - uint32_t offset; + uint32_t iosize; uint32_t ext_pulse_width_mask; uint32_t reset_ctrl_reg; void (*reset_pulse)(AspeedWDTState *s, uint32_t property); diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c index 4d0b9b115f..b483735dc2 100644 --- a/hw/arm/aspeed_ast10x0.c +++ b/hw/arm/aspeed_ast10x0.c @@ -318,14 +318,14 @@ static void aspeed_soc_ast1030_realize(DeviceState *d= ev_soc, Error **errp) /* Watch dog */ for (i =3D 0; i < sc->wdts_num; i++) { AspeedWDTClass *awc =3D ASPEED_WDT_GET_CLASS(&s->wdt[i]); + hwaddr wdt_offset =3D sc->memmap[ASPEED_DEV_WDT] + i * awc->iosize; =20 object_property_set_link(OBJECT(&s->wdt[i]), "scu", OBJECT(&s->scu= ), &error_abort); if (!sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), errp)) { return; } - aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->wdt[i]), 0, - sc->memmap[ASPEED_DEV_WDT] + i * awc->offset); + aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->wdt[i]), 0, wdt_offset); } =20 /* GPIO */ diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index cd75465c2b..bb2769df04 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -465,14 +465,14 @@ static void aspeed_soc_ast2600_realize(DeviceState *d= ev, Error **errp) /* Watch dog */ for (i =3D 0; i < sc->wdts_num; i++) { AspeedWDTClass *awc =3D ASPEED_WDT_GET_CLASS(&s->wdt[i]); + hwaddr wdt_offset =3D sc->memmap[ASPEED_DEV_WDT] + i * awc->iosize; =20 object_property_set_link(OBJECT(&s->wdt[i]), "scu", OBJECT(&s->scu= ), &error_abort); if (!sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), errp)) { return; } - aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->wdt[i]), 0, - sc->memmap[ASPEED_DEV_WDT] + i * awc->offset); + aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->wdt[i]), 0, wdt_offset); } =20 /* RAM */ diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index b05b9dd416..e884d6badc 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -386,14 +386,14 @@ static void aspeed_soc_realize(DeviceState *dev, Erro= r **errp) /* Watch dog */ for (i =3D 0; i < sc->wdts_num; i++) { AspeedWDTClass *awc =3D ASPEED_WDT_GET_CLASS(&s->wdt[i]); + hwaddr wdt_offset =3D sc->memmap[ASPEED_DEV_WDT] + i * awc->iosize; =20 object_property_set_link(OBJECT(&s->wdt[i]), "scu", OBJECT(&s->scu= ), &error_abort); if (!sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), errp)) { return; } - aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->wdt[i]), 0, - sc->memmap[ASPEED_DEV_WDT] + i * awc->offset); + aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->wdt[i]), 0, wdt_offset); } =20 /* RAM */ diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c index d753693a2e..958725a1b5 100644 --- a/hw/watchdog/wdt_aspeed.c +++ b/hw/watchdog/wdt_aspeed.c @@ -309,7 +309,7 @@ static void aspeed_2400_wdt_class_init(ObjectClass *kla= ss, void *data) AspeedWDTClass *awc =3D ASPEED_WDT_CLASS(klass); =20 dc->desc =3D "ASPEED 2400 Watchdog Controller"; - awc->offset =3D 0x20; + awc->iosize =3D 0x20; awc->ext_pulse_width_mask =3D 0xff; awc->reset_ctrl_reg =3D SCU_RESET_CONTROL1; awc->wdt_reload =3D aspeed_wdt_reload; @@ -346,7 +346,7 @@ static void aspeed_2500_wdt_class_init(ObjectClass *kla= ss, void *data) AspeedWDTClass *awc =3D ASPEED_WDT_CLASS(klass); =20 dc->desc =3D "ASPEED 2500 Watchdog Controller"; - awc->offset =3D 0x20; + awc->iosize =3D 0x20; awc->ext_pulse_width_mask =3D 0xfffff; awc->reset_ctrl_reg =3D SCU_RESET_CONTROL1; awc->reset_pulse =3D aspeed_2500_wdt_reset_pulse; @@ -369,7 +369,7 @@ static void aspeed_2600_wdt_class_init(ObjectClass *kla= ss, void *data) AspeedWDTClass *awc =3D ASPEED_WDT_CLASS(klass); =20 dc->desc =3D "ASPEED 2600 Watchdog Controller"; - awc->offset =3D 0x40; + awc->iosize =3D 0x40; awc->ext_pulse_width_mask =3D 0xfffff; /* TODO */ awc->reset_ctrl_reg =3D AST2600_SCU_RESET_CONTROL1; awc->reset_pulse =3D aspeed_2500_wdt_reset_pulse; @@ -392,7 +392,7 @@ static void aspeed_1030_wdt_class_init(ObjectClass *kla= ss, void *data) AspeedWDTClass *awc =3D ASPEED_WDT_CLASS(klass); =20 dc->desc =3D "ASPEED 1030 Watchdog Controller"; - awc->offset =3D 0x80; + awc->iosize =3D 0x80; awc->ext_pulse_width_mask =3D 0xfffff; /* TODO */ awc->reset_ctrl_reg =3D AST2600_SCU_RESET_CONTROL1; awc->reset_pulse =3D aspeed_2500_wdt_reset_pulse; --=20 2.39.1