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[173.197.98.118]) by smtp.gmail.com with ESMTPSA id w19-20020a1709029a9300b00186b69157ecsm3660859plp.202.2023.02.04.08.33.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 04 Feb 2023 08:33:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=C/L7rpu7pR8QgddFOconCzyTsPMIEKIuZwLXecbYJWA=; b=wUW2Lu87DyzITuKavq6i9MazlUZqE53ZPpCnGgNBinvJ4OtLtZLS+FW9b/fAuv0R1C eYhXxdTqn5lS1rG2DJWl1+1b81Nf3jjHuN8nJNtnHCeuHZr+pPWvz8H8qevlqwiBXwqr PUQTV3PzB7FcdRQUb1IZsZgiNeGUHPIk/OFw4P1Yr9L+lxYnOSwrXJ5PR7isXluFCovo +3Tg52g5TBIowD5ot4vigHGzF1uSiqIcGoTw3VdmUbyiahTegBWJi7a1qBIUan820Z8C 2BIpwWpWNZNr/OZfP02Ja+zKfHfY//vl17DzOrfTiXK2u9KlvGIZFG9oNxZuK3PG9Owx RfkQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=C/L7rpu7pR8QgddFOconCzyTsPMIEKIuZwLXecbYJWA=; b=2328hfL0XA4G3OnWYezJzr0q1/pkrP5cMx8spLviQyKNg3UuXQJu7XMZPu01bNjKoX H72LZ+Qjrhx870JHOSXkTQTuneXcHt6FnbBE/jSZwpEhr45hMzUkz5sYZRMeAmUyBAwC sI24RvIhyDT4FUoospBWYcn48foGIeLem0747jlNPcnbE33RPSOliLkNgVbmcApveaul +cEH4mwt9hE2WgmvvKVOqjznhBvP3Bak0lLe12MHYcb7rakFzTSdOeX2H2jnOpmL3Ve/ orNhTr4tz3Ll7Tg02zyyj6AzVfuKn+L95oRmofMRN8hjCjqXFX6VkegG3PHA3+QlbRt3 3BnA== X-Gm-Message-State: AO0yUKVEFQQN1mc9aoOK+gR8UASv/3lDBSu83LCaCdMzFfFvxxM+gS20 Zg5E/A7s7rGNYfLy3tzKhzoE0o1nMTQBO2mC X-Google-Smtp-Source: AK7set881masjEYCVmYoJs+uALbFweUtDfZ1y/Kc8iUyczfJngbhv8S9J5UmzsFweaRUNcXNJW32uQ== X-Received: by 2002:a05:6a21:3295:b0:bc:b9d2:f0f8 with SMTP id yt21-20020a056a21329500b000bcb9d2f0f8mr19914632pzb.24.1675528411334; Sat, 04 Feb 2023 08:33:31 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [PULL 11/40] tcg/i386: Add TCG_TARGET_CALL_{RET,ARG}_I128 Date: Sat, 4 Feb 2023 06:32:41 -1000 Message-Id: <20230204163310.815536-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230204163310.815536-1-richard.henderson@linaro.org> References: <20230204163310.815536-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1675528674590100001 Fill in the parameters for the host ABI for Int128. Adjust tcg_target_call_oarg_reg for _WIN64, and tcg_out_call for i386 sysv. Allow TCG_TYPE_V128 stores without AVX enabled. Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.h | 10 ++++++++++ tcg/i386/tcg-target.c.inc | 30 +++++++++++++++++++++++++++++- 2 files changed, 39 insertions(+), 1 deletion(-) diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index 5797a55ea0..d4f2a6f8c2 100644 --- a/tcg/i386/tcg-target.h +++ b/tcg/i386/tcg-target.h @@ -100,6 +100,16 @@ typedef enum { #endif #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL +#if defined(_WIN64) +# define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_BY_REF +# define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_BY_VEC +#elif TCG_TARGET_REG_BITS =3D=3D 64 +# define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL +# define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL +#else +# define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL +# define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_BY_REF +#endif =20 extern bool have_bmi1; extern bool have_popcnt; diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index 2f0a9521bf..883ced8168 100644 --- a/tcg/i386/tcg-target.c.inc +++ b/tcg/i386/tcg-target.c.inc @@ -115,6 +115,11 @@ static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKi= nd kind, int slot) case TCG_CALL_RET_NORMAL: tcg_debug_assert(slot >=3D 0 && slot <=3D 1); return slot ? TCG_REG_EDX : TCG_REG_EAX; +#ifdef _WIN64 + case TCG_CALL_RET_BY_VEC: + tcg_debug_assert(slot =3D=3D 0); + return TCG_REG_XMM0; +#endif default: g_assert_not_reached(); } @@ -1188,9 +1193,16 @@ static void tcg_out_st(TCGContext *s, TCGType type, = TCGReg arg, * The gvec infrastructure is asserts that v128 vector loads * and stores use a 16-byte aligned offset. Validate that the * final pointer is aligned by using an insn that will SIGSEGV. + * + * This specific instance is also used by TCG_CALL_RET_BY_VEC, + * for _WIN64, which must have SSE2 but may not have AVX. */ tcg_debug_assert(arg >=3D 16); - tcg_out_vex_modrm_offset(s, OPC_MOVDQA_WxVx, arg, 0, arg1, arg2); + if (have_avx1) { + tcg_out_vex_modrm_offset(s, OPC_MOVDQA_WxVx, arg, 0, arg1, arg= 2); + } else { + tcg_out_modrm_offset(s, OPC_MOVDQA_WxVx, arg, arg1, arg2); + } break; case TCG_TYPE_V256: /* @@ -1677,6 +1689,22 @@ static void tcg_out_call(TCGContext *s, const tcg_in= sn_unit *dest, const TCGHelperInfo *info) { tcg_out_branch(s, 1, dest); + +#ifndef _WIN32 + if (TCG_TARGET_REG_BITS =3D=3D 32 && info->out_kind =3D=3D TCG_CALL_RE= T_BY_REF) { + /* + * The sysv i386 abi for struct return places a reference as the + * first argument of the stack, and pops that argument with the + * return statement. Since we want to retain the aligned stack + * pointer for the callee, we do not want to actually push that + * argument before the call but rely on the normal store to the + * stack slot. But we do need to compensate for the pop in order + * to reset our correct stack pointer value. + * Pushing a garbage value back onto the stack is quickest. + */ + tcg_out_push(s, TCG_REG_EAX); + } +#endif } =20 static void tcg_out_jmp(TCGContext *s, const tcg_insn_unit *dest) --=20 2.34.1