From nobody Sun May 11 16:17:09 2025
Delivered-To: importer@patchew.org
Authentication-Results: mx.zohomail.com;
dkim=pass;
spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as
permitted sender)
smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org
ARC-Seal: i=1; a=rsa-sha256; t=1675346084; cv=none;
d=zohomail.com; s=zohoarc;
b=kjR0PbzLH+j4Kj0ZfR9HEj65eQsqcb4g686DRARsD5KEJlNg8gfBgMW6xoLlqxZxHDKsdcmnLOueLXGHqrZ+754oKK165XzwLFnfUCbywxWTTJwaIdTeAkd26z6iK5Zi9tyeVV2152n7SjwHXHXgm+2IQzf9W7h2Ybd/RI6rxAc=
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com;
s=zohoarc;
t=1675346084;
h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To;
bh=hdzoMAEBJTe3nsL3itLXWDGswEM52iM44T0PgtSJ3ls=;
b=b+DuTGkswnzY5T+lcf6EAexCAI8zVsmGjGkdfJ7I2Ti2Hb2SGuuomnXu3uQpN/F43bqskyeMOwLqvB0/04iz92f63wHP4vlGGdJmVu67ncMMAk7E1QH1UUbUJllHg4BW2Nf5b2heKpHHucap16ZLYDeVntzpXl8adtvkH8P9D+c=
ARC-Authentication-Results: i=1; mx.zohomail.com;
dkim=pass;
spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as
permitted sender)
smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org
Return-Path: <qemu-devel-bounces+importer=patchew.org@nongnu.org>
Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by
mx.zohomail.com
with SMTPS id 1675346084866220.0339324289787;
Thu, 2 Feb 2023 05:54:44 -0800 (PST)
Received: from localhost ([::1] helo=lists1p.gnu.org)
by lists.gnu.org with esmtp (Exim 4.90_1)
(envelope-from <qemu-devel-bounces@nongnu.org>)
id 1pNa1l-0001aS-Bj; Thu, 02 Feb 2023 08:53:25 -0500
Received: from eggs.gnu.org ([2001:470:142:3::10])
by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)
(Exim 4.90_1) (envelope-from <dbarboza@ventanamicro.com>)
id 1pNa1e-0001Ww-2p
for qemu-devel@nongnu.org; Thu, 02 Feb 2023 08:53:18 -0500
Received: from mail-oi1-x22f.google.com ([2607:f8b0:4864:20::22f])
by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)
(Exim 4.90_1) (envelope-from <dbarboza@ventanamicro.com>)
id 1pNa1Z-0007Y5-Te
for qemu-devel@nongnu.org; Thu, 02 Feb 2023 08:53:17 -0500
Received: by mail-oi1-x22f.google.com with SMTP id p185so1475163oif.2
for <qemu-devel@nongnu.org>; Thu, 02 Feb 2023 05:53:13 -0800 (PST)
Received: from grind.. ([177.102.69.207]) by smtp.gmail.com with ESMTPSA id
45-20020a9d0330000000b00684e55f4541sm6547416otv.70.2023.02.02.05.53.10
(version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);
Thu, 02 Feb 2023 05:53:12 -0800 (PST)
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed;
d=ventanamicro.com; s=google;
h=content-transfer-encoding:mime-version:references:in-reply-to
:message-id:date:subject:cc:to:from:from:to:cc:subject:date
:message-id:reply-to;
bh=hdzoMAEBJTe3nsL3itLXWDGswEM52iM44T0PgtSJ3ls=;
b=TH9cuEoDGyyx6tYwNozH5kaJ3J4PqmadwN1YmweYS4BDEh6z/aCRiG4XAjs0MbMlA3
+7gXiy9Y0D6FMHSVb8HsnDMfwRLRghf/npdlwUgQMDetp6xli54AuCaiguUbwZXsH9mi
Eir9Yw6o9B421xGjXvKzqFkb6UG3Um8JeTeMbheC6riOuUE5WLvFiW8Ezc5Fq89oTy80
Cj52LAV815D4RTAZpB7esfMaOk9Ie09EJM2SUvAFKM0o1QHQaRvkZlV4uhxIv16VGFIl
hvQPf1+YPRA+laKynYpbLp4f+3YTVPH2FVrrsoq6NL9NcTlO7nzujYI9ms/W6VF1oFqJ
k7Sg==
X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed;
d=1e100.net; s=20210112;
h=content-transfer-encoding:mime-version:references:in-reply-to
:message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc
:subject:date:message-id:reply-to;
bh=hdzoMAEBJTe3nsL3itLXWDGswEM52iM44T0PgtSJ3ls=;
b=EbUpMXABUoOICJ9v7q/Fa5IiNyscFCVkucIqTJkmY39FaJKIuS/TMxehnLsXfZe4jm
fr/mj7RZoSLs0WnTbS5dIwlAoKEpV2+FRR/Rwl9DtemXVK3NdI+OellAV1nMKRMFlvOs
hX7GgUqkoj5KVn6inQ1/zbdqb21O/9KCgjmR474G2UH0GbZv8cfykH6gAWVkhW5GYryr
Fj7+4Qi6Gfj5YsehYfbvbfTGkrzOYN/iiQcE9bDnIecMIUSvNdTvlgbMOubh84x3XTum
Ks8syGAD83QLm14qr8gDZDW46AnW+LWM0mrI3aPeeJulXdse/Ixo10czf3Za4JV4Fae0
YzKg==
X-Gm-Message-State: AO0yUKUjbXbnz11ZhJaa/WSzQircn+PGxTB56a94Z9asVS9ZPyQ9EQVJ
4h2vncoViZco9UNquTC6eQOVDPhyUfDwCewuZ1w=
X-Google-Smtp-Source:
AK7set9LAANoyKMcqAlVOVUZ+8N3vTSYn1WcfEZTZr4Q2FWai8lbwqNpT0XFtJGcdBuEHNMlR0mgOw==
X-Received: by 2002:a05:6808:a:b0:35c:46c8:2638 with SMTP id
u10-20020a056808000a00b0035c46c82638mr2871633oic.12.1675345992446;
Thu, 02 Feb 2023 05:53:12 -0800 (PST)
From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>,
Bin Meng <bmeng@tinylab.org>
Subject: [PATCH v10 3/3] hw/riscv/boot.c: make riscv_load_initrd() static
Date: Thu, 2 Feb 2023 10:52:57 -0300
Message-Id: <20230202135257.1657482-4-dbarboza@ventanamicro.com>
X-Mailer: git-send-email 2.39.1
In-Reply-To: <20230202135257.1657482-1-dbarboza@ventanamicro.com>
References: <20230202135257.1657482-1-dbarboza@ventanamicro.com>
MIME-Version: 1.0
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: quoted-printable
Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17
as permitted sender) client-ip=209.51.188.17;
envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org;
helo=lists.gnu.org;
Received-SPF: pass client-ip=2607:f8b0:4864:20::22f;
envelope-from=dbarboza@ventanamicro.com; helo=mail-oi1-x22f.google.com
X-Spam_score_int: -20
X-Spam_score: -2.1
X-Spam_bar: --
X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,
DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,
RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,
SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no
X-Spam_action: no action
X-BeenThere: qemu-devel@nongnu.org
X-Mailman-Version: 2.1.29
Precedence: list
List-Id: <qemu-devel.nongnu.org>
List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>,
<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>,
<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org
Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org
X-ZohoMail-DKIM: pass (identity @ventanamicro.com)
X-ZM-MESSAGEID: 1675346085736100005
The only remaining caller is riscv_load_kernel_and_initrd() which
belongs to the same file.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
hw/riscv/boot.c | 80 ++++++++++++++++++++---------------------
include/hw/riscv/boot.h | 1 -
2 files changed, 40 insertions(+), 41 deletions(-)
diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c
index 1e32ce1e10..72885e4a6f 100644
--- a/hw/riscv/boot.c
+++ b/hw/riscv/boot.c
@@ -173,6 +173,46 @@ target_ulong riscv_load_firmware(const char *firmware_=
filename,
exit(1);
}
=20
+static void riscv_load_initrd(MachineState *machine, uint64_t kernel_entry)
+{
+ const char *filename =3D machine->initrd_filename;
+ uint64_t mem_size =3D machine->ram_size;
+ void *fdt =3D machine->fdt;
+ hwaddr start, end;
+ ssize_t size;
+
+ g_assert(filename !=3D NULL);
+
+ /*
+ * We want to put the initrd far enough into RAM that when the
+ * kernel is uncompressed it will not clobber the initrd. However
+ * on boards without much RAM we must ensure that we still leave
+ * enough room for a decent sized initrd, and on boards with large
+ * amounts of RAM we must avoid the initrd being so far up in RAM
+ * that it is outside lowmem and inaccessible to the kernel.
+ * So for boards with less than 256MB of RAM we put the initrd
+ * halfway into RAM, and for boards with 256MB of RAM or more we put
+ * the initrd at 128MB.
+ */
+ start =3D kernel_entry + MIN(mem_size / 2, 128 * MiB);
+
+ size =3D load_ramdisk(filename, start, mem_size - start);
+ if (size =3D=3D -1) {
+ size =3D load_image_targphys(filename, start, mem_size - start);
+ if (size =3D=3D -1) {
+ error_report("could not load ramdisk '%s'", filename);
+ exit(1);
+ }
+ }
+
+ /* Some RISC-V machines (e.g. opentitan) don't have a fdt. */
+ if (fdt) {
+ end =3D start + size;
+ qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start", start);
+ qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end", end);
+ }
+}
+
target_ulong riscv_load_kernel(MachineState *machine,
RISCVHartArrayState *harts,
target_ulong kernel_start_addr,
@@ -231,46 +271,6 @@ out:
return kernel_entry;
}
=20
-void riscv_load_initrd(MachineState *machine, uint64_t kernel_entry)
-{
- const char *filename =3D machine->initrd_filename;
- uint64_t mem_size =3D machine->ram_size;
- void *fdt =3D machine->fdt;
- hwaddr start, end;
- ssize_t size;
-
- g_assert(filename !=3D NULL);
-
- /*
- * We want to put the initrd far enough into RAM that when the
- * kernel is uncompressed it will not clobber the initrd. However
- * on boards without much RAM we must ensure that we still leave
- * enough room for a decent sized initrd, and on boards with large
- * amounts of RAM we must avoid the initrd being so far up in RAM
- * that it is outside lowmem and inaccessible to the kernel.
- * So for boards with less than 256MB of RAM we put the initrd
- * halfway into RAM, and for boards with 256MB of RAM or more we put
- * the initrd at 128MB.
- */
- start =3D kernel_entry + MIN(mem_size / 2, 128 * MiB);
-
- size =3D load_ramdisk(filename, start, mem_size - start);
- if (size =3D=3D -1) {
- size =3D load_image_targphys(filename, start, mem_size - start);
- if (size =3D=3D -1) {
- error_report("could not load ramdisk '%s'", filename);
- exit(1);
- }
- }
-
- /* Some RISC-V machines (e.g. opentitan) don't have a fdt. */
- if (fdt) {
- end =3D start + size;
- qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start", start);
- qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end", end);
- }
-}
-
/*
* This function makes an assumption that the DRAM interval
* 'dram_base' + 'dram_size' is contiguous.
diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h
index ea1de8b020..a2e4ae9cb0 100644
--- a/include/hw/riscv/boot.h
+++ b/include/hw/riscv/boot.h
@@ -48,7 +48,6 @@ target_ulong riscv_load_kernel(MachineState *machine,
target_ulong firmware_end_addr,
bool load_initrd,
symbol_fn_t sym_cb);
-void riscv_load_initrd(MachineState *machine, uint64_t kernel_entry);
uint64_t riscv_compute_fdt_addr(hwaddr dram_start, uint64_t dram_size,
MachineState *ms);
void riscv_load_fdt(hwaddr fdt_addr, void *fdt);
--=20
2.39.1