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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id l13-20020adff48d000000b002366e3f1497sm4545089wro.6.2023.01.27.09.55.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Jan 2023 09:55:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=ocuh6zX/sB0nMJnNqY88PpTxJzWwkZIqSEj3aMaaCrM=; b=LGQraPldm78FfexAlnXi2RslvySLR7QJsSFhNXWxHyTZ4R+Hk133c0TSd07pCbexuz mBLGDOeiC2L6DZ2PguzmHCvE7oyKgc52YylRnNDNELdX/VXuY1P10z2ck8c/l7YD9RlN U40BLHILx/QB2TKXXh7+vSWHdk0mxSlJwes7v83s5RMst18YukLxsSoyf3yZTWacp/bZ A5y+C0bLKm3nsrzcKlu5xDTvaOo9+Ta1a8Bse5m2EwfW71z7dIvTvPnLZLIKzwTJdI70 LoFKSOjUoNpXNgnhzZXM/yP195BKNcG9d5Tb77SE8QFBXOXPeLLBypxCB4uT6Fvnipdn sjaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ocuh6zX/sB0nMJnNqY88PpTxJzWwkZIqSEj3aMaaCrM=; b=JbBfAVzbPci4Xck1D2SWXao484jNcsgNCoVKxMKwyoUG8oKSY2mQYcRpGh9/Jfxp0j feFPVG6Bq6cG/bzKOUzyfIN1/Dq3DVnc4DhCXv6EMdVoc9DkGh/pPM9emI1qLA1Sc5rq hS4ML/h03wYsHvWMX3MWqJkzBjv/phHf/0daCeCehkuyg4tmzOOg44Ga1JU3EeZrJjzu bOxW2zXBPu1aq7N0f89vDTc9Liuz1kujIMHjY5ewoSHn7GIypnMTB+Mzg7zc2AnpqB5e w+BCVtQSF8ZgEpEK3NmZiMHP/48pjdybjiwwTNZHeSO6dd201etCmJZAOeT1Rx8G0OCV nYvA== X-Gm-Message-State: AO0yUKX7vxsMhn+umBf5cnnBHS7RMmyvnvVd+CC15rkaqJdyqzJBUQr/ NzXPFi2Gi+l27FNbjC7o++yEoQ== X-Google-Smtp-Source: AK7set8fr5clC2UeFIcskAFrV6rK2ZjwJ30/48OQcixQ4357yZBsCC6W950dn/MqhHsMFdHG3NYrQQ== X-Received: by 2002:a5d:5406:0:b0:2bf:d89b:7e17 with SMTP id g6-20020a5d5406000000b002bfd89b7e17mr594309wrv.51.1674842117701; Fri, 27 Jan 2023 09:55:17 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 07/23] target/arm: Disable HSTR_EL2 traps if EL2 is not enabled Date: Fri, 27 Jan 2023 17:54:51 +0000 Message-Id: <20230127175507.2895013-8-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230127175507.2895013-1-peter.maydell@linaro.org> References: <20230127175507.2895013-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1674842309375100001 Content-Type: text/plain; charset="utf-8" The HSTR_EL2 register is not supposed to have an effect unless EL2 is enabled in the current security state. We weren't checking for this, which meant that if the guest set up the HSTR_EL2 register we would incorrectly trap even for accesses from Secure EL0 and EL1. Add the missing checks. (Other places where we look at HSTR_EL2 for the not-in-v8A bits TTEE and TJDBX are already checking that we are in NS EL0 or EL1, so there we alredy know EL2 is enabled.) Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/helper.c | 2 +- target/arm/op_helper.c | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 6f6772d8e04..66966869218 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11716,7 +11716,7 @@ static CPUARMTBFlags rebuild_hflags_a32(CPUARMState= *env, int fp_el, DP_TBFLAG_A32(flags, VFPEN, 1); } =20 - if (el < 2 && env->cp15.hstr_el2 && + if (el < 2 && env->cp15.hstr_el2 && arm_is_el2_enabled(env) && (arm_hcr_el2_eff(env) & (HCR_E2H | HCR_TGE)) !=3D (HCR_E2H | HCR_T= GE)) { DP_TBFLAG_A32(flags, HSTR_ACTIVE, 1); } diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c index 8ac176e0742..5c17a5bd176 100644 --- a/target/arm/op_helper.c +++ b/target/arm/op_helper.c @@ -670,6 +670,7 @@ const void *HELPER(access_check_cp_reg)(CPUARMState *en= v, uint32_t key, * we only need to check here for traps from EL0. */ if (!is_a64(env) && arm_current_el(env) =3D=3D 0 && ri->cp =3D=3D 15 && + arm_is_el2_enabled(env) && (arm_hcr_el2_eff(env) & (HCR_E2H | HCR_TGE)) !=3D (HCR_E2H | HCR_T= GE)) { uint32_t mask =3D 1 << ri->crn; =20 --=20 2.34.1