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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 29/38] hw/intc/omap_intc: Use CamelCase for TYPE_OMAP_INTC type
name
Date: Fri, 13 Jan 2023 14:11:17 +0000
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From: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Following docs/devel/style.rst guidelines, rename
omap_intr_handler_s -> OMAPIntcState. This also remove a
use of 'struct' in the DECLARE_INSTANCE_CHECKER() macro call.
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230109140306.23161-7-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/arm/omap.h | 9 ++++-----
hw/intc/omap_intc.c | 38 +++++++++++++++++++-------------------
2 files changed, 23 insertions(+), 24 deletions(-)
diff --git a/include/hw/arm/omap.h b/include/hw/arm/omap.h
index 9e30ba7ba24..c275d9b681c 100644
--- a/include/hw/arm/omap.h
+++ b/include/hw/arm/omap.h
@@ -70,9 +70,8 @@ void omap_clk_reparent(omap_clk clk, omap_clk parent);
=20
/* omap_intc.c */
#define TYPE_OMAP_INTC "common-omap-intc"
-typedef struct omap_intr_handler_s omap_intr_handler;
-DECLARE_INSTANCE_CHECKER(omap_intr_handler, OMAP_INTC,
- TYPE_OMAP_INTC)
+typedef struct OMAPIntcState OMAPIntcState;
+DECLARE_INSTANCE_CHECKER(OMAPIntcState, OMAP_INTC, TYPE_OMAP_INTC)
=20
=20
/*
@@ -89,8 +88,8 @@ DECLARE_INSTANCE_CHECKER(omap_intr_handler, OMAP_INTC,
* (ie the struct omap_mpu_state_s*) to do the clockname to pointer
* translation.)
*/
-void omap_intc_set_iclk(omap_intr_handler *intc, omap_clk clk);
-void omap_intc_set_fclk(omap_intr_handler *intc, omap_clk clk);
+void omap_intc_set_iclk(OMAPIntcState *intc, omap_clk clk);
+void omap_intc_set_fclk(OMAPIntcState *intc, omap_clk clk);
=20
/* omap_i2c.c */
#define TYPE_OMAP_I2C "omap_i2c"
diff --git a/hw/intc/omap_intc.c b/hw/intc/omap_intc.c
index 9f6a71ce305..647bf324a8e 100644
--- a/hw/intc/omap_intc.c
+++ b/hw/intc/omap_intc.c
@@ -38,7 +38,7 @@ struct omap_intr_handler_bank_s {
unsigned char priority[32];
};
=20
-struct omap_intr_handler_s {
+struct OMAPIntcState {
SysBusDevice parent_obj;
=20
qemu_irq *pins;
@@ -60,7 +60,7 @@ struct omap_intr_handler_s {
struct omap_intr_handler_bank_s bank[3];
};
=20
-static void omap_inth_sir_update(struct omap_intr_handler_s *s, int is_fiq)
+static void omap_inth_sir_update(OMAPIntcState *s, int is_fiq)
{
int i, j, sir_intr, p_intr, p;
uint32_t level;
@@ -88,7 +88,7 @@ static void omap_inth_sir_update(struct omap_intr_handler=
_s *s, int is_fiq)
s->sir_intr[is_fiq] =3D sir_intr;
}
=20
-static inline void omap_inth_update(struct omap_intr_handler_s *s, int is_=
fiq)
+static inline void omap_inth_update(OMAPIntcState *s, int is_fiq)
{
int i;
uint32_t has_intr =3D 0;
@@ -109,7 +109,7 @@ static inline void omap_inth_update(struct omap_intr_ha=
ndler_s *s, int is_fiq)
=20
static void omap_set_intr(void *opaque, int irq, int req)
{
- struct omap_intr_handler_s *ih =3D opaque;
+ OMAPIntcState *ih =3D opaque;
uint32_t rise;
=20
struct omap_intr_handler_bank_s *bank =3D &ih->bank[irq >> 5];
@@ -136,7 +136,7 @@ static void omap_set_intr(void *opaque, int irq, int re=
q)
/* Simplified version with no edge detection */
static void omap_set_intr_noedge(void *opaque, int irq, int req)
{
- struct omap_intr_handler_s *ih =3D opaque;
+ OMAPIntcState *ih =3D opaque;
uint32_t rise;
=20
struct omap_intr_handler_bank_s *bank =3D &ih->bank[irq >> 5];
@@ -156,7 +156,7 @@ static void omap_set_intr_noedge(void *opaque, int irq,=
int req)
static uint64_t omap_inth_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_intr_handler_s *s =3D opaque;
+ OMAPIntcState *s =3D opaque;
int i, offset =3D addr;
int bank_no =3D offset >> 8;
int line_no;
@@ -234,7 +234,7 @@ static uint64_t omap_inth_read(void *opaque, hwaddr add=
r,
static void omap_inth_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_intr_handler_s *s =3D opaque;
+ OMAPIntcState *s =3D opaque;
int i, offset =3D addr;
int bank_no =3D offset >> 8;
struct omap_intr_handler_bank_s *bank =3D &s->bank[bank_no];
@@ -336,7 +336,7 @@ static const MemoryRegionOps omap_inth_mem_ops =3D {
=20
static void omap_inth_reset(DeviceState *dev)
{
- struct omap_intr_handler_s *s =3D OMAP_INTC(dev);
+ OMAPIntcState *s =3D OMAP_INTC(dev);
int i;
=20
for (i =3D 0; i < s->nbanks; ++i){
@@ -366,7 +366,7 @@ static void omap_inth_reset(DeviceState *dev)
static void omap_intc_init(Object *obj)
{
DeviceState *dev =3D DEVICE(obj);
- struct omap_intr_handler_s *s =3D OMAP_INTC(obj);
+ OMAPIntcState *s =3D OMAP_INTC(obj);
SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj);
=20
s->nbanks =3D 1;
@@ -380,25 +380,25 @@ static void omap_intc_init(Object *obj)
=20
static void omap_intc_realize(DeviceState *dev, Error **errp)
{
- struct omap_intr_handler_s *s =3D OMAP_INTC(dev);
+ OMAPIntcState *s =3D OMAP_INTC(dev);
=20
if (!s->iclk) {
error_setg(errp, "omap-intc: clk not connected");
}
}
=20
-void omap_intc_set_iclk(omap_intr_handler *intc, omap_clk clk)
+void omap_intc_set_iclk(OMAPIntcState *intc, omap_clk clk)
{
intc->iclk =3D clk;
}
=20
-void omap_intc_set_fclk(omap_intr_handler *intc, omap_clk clk)
+void omap_intc_set_fclk(OMAPIntcState *intc, omap_clk clk)
{
intc->fclk =3D clk;
}
=20
static Property omap_intc_properties[] =3D {
- DEFINE_PROP_UINT32("size", struct omap_intr_handler_s, size, 0x100),
+ DEFINE_PROP_UINT32("size", OMAPIntcState, size, 0x100),
DEFINE_PROP_END_OF_LIST(),
};
=20
@@ -423,7 +423,7 @@ static const TypeInfo omap_intc_info =3D {
static uint64_t omap2_inth_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_intr_handler_s *s =3D opaque;
+ OMAPIntcState *s =3D opaque;
int offset =3D addr;
int bank_no, line_no;
struct omap_intr_handler_bank_s *bank =3D NULL;
@@ -504,7 +504,7 @@ static uint64_t omap2_inth_read(void *opaque, hwaddr ad=
dr,
static void omap2_inth_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_intr_handler_s *s =3D opaque;
+ OMAPIntcState *s =3D opaque;
int offset =3D addr;
int bank_no, line_no;
struct omap_intr_handler_bank_s *bank =3D NULL;
@@ -622,7 +622,7 @@ static const MemoryRegionOps omap2_inth_mem_ops =3D {
static void omap2_intc_init(Object *obj)
{
DeviceState *dev =3D DEVICE(obj);
- struct omap_intr_handler_s *s =3D OMAP_INTC(obj);
+ OMAPIntcState *s =3D OMAP_INTC(obj);
SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj);
=20
s->level_only =3D 1;
@@ -637,7 +637,7 @@ static void omap2_intc_init(Object *obj)
=20
static void omap2_intc_realize(DeviceState *dev, Error **errp)
{
- struct omap_intr_handler_s *s =3D OMAP_INTC(dev);
+ OMAPIntcState *s =3D OMAP_INTC(dev);
=20
if (!s->iclk) {
error_setg(errp, "omap2-intc: iclk not connected");
@@ -650,7 +650,7 @@ static void omap2_intc_realize(DeviceState *dev, Error =
**errp)
}
=20
static Property omap2_intc_properties[] =3D {
- DEFINE_PROP_UINT8("revision", struct omap_intr_handler_s,
+ DEFINE_PROP_UINT8("revision", OMAPIntcState,
revision, 0x21),
DEFINE_PROP_END_OF_LIST(),
};
@@ -676,7 +676,7 @@ static const TypeInfo omap2_intc_info =3D {
static const TypeInfo omap_intc_type_info =3D {
.name =3D TYPE_OMAP_INTC,
.parent =3D TYPE_SYS_BUS_DEVICE,
- .instance_size =3D sizeof(omap_intr_handler),
+ .instance_size =3D sizeof(OMAPIntcState),
.abstract =3D true,
};
=20
--=20
2.34.1