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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 26/38] hw/arm/omap: Drop useless casts from void * to pointer
Date: Fri, 13 Jan 2023 14:11:14 +0000
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From: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/omap1.c | 115 ++++++++++++++++++--------------------
hw/arm/omap2.c | 40 ++++++-------
hw/arm/omap_sx1.c | 2 +-
hw/arm/palm.c | 2 +-
hw/char/omap_uart.c | 7 +--
hw/display/omap_dss.c | 15 +++--
hw/display/omap_lcdc.c | 9 ++-
hw/dma/omap_dma.c | 15 +++--
hw/gpio/omap_gpio.c | 15 +++--
hw/intc/omap_intc.c | 12 ++--
hw/misc/omap_gpmc.c | 12 ++--
hw/misc/omap_l4.c | 7 +--
hw/misc/omap_sdrc.c | 7 +--
hw/misc/omap_tap.c | 5 +-
hw/sd/omap_mmc.c | 9 ++-
hw/ssi/omap_spi.c | 7 +--
hw/timer/omap_gptimer.c | 22 ++++----
hw/timer/omap_synctimer.c | 4 +-
18 files changed, 142 insertions(+), 163 deletions(-)
diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c
index f693faa43e0..559c066ce90 100644
--- a/hw/arm/omap1.c
+++ b/hw/arm/omap1.c
@@ -176,7 +176,7 @@ static void omap_timer_fire(void *opaque)
=20
static void omap_timer_tick(void *opaque)
{
- struct omap_mpu_timer_s *timer =3D (struct omap_mpu_timer_s *) opaque;
+ struct omap_mpu_timer_s *timer =3D opaque;
=20
omap_timer_sync(timer);
omap_timer_fire(timer);
@@ -185,7 +185,7 @@ static void omap_timer_tick(void *opaque)
=20
static void omap_timer_clk_update(void *opaque, int line, int on)
{
- struct omap_mpu_timer_s *timer =3D (struct omap_mpu_timer_s *) opaque;
+ struct omap_mpu_timer_s *timer =3D opaque;
=20
omap_timer_sync(timer);
timer->rate =3D on ? omap_clk_getrate(timer->clk) : 0;
@@ -202,7 +202,7 @@ static void omap_timer_clk_setup(struct omap_mpu_timer_=
s *timer)
static uint64_t omap_mpu_timer_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_timer_s *s =3D (struct omap_mpu_timer_s *) opaque;
+ struct omap_mpu_timer_s *s =3D opaque;
=20
if (size !=3D 4) {
return omap_badwidth_read32(opaque, addr);
@@ -226,7 +226,7 @@ static uint64_t omap_mpu_timer_read(void *opaque, hwadd=
r addr,
static void omap_mpu_timer_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpu_timer_s *s =3D (struct omap_mpu_timer_s *) opaque;
+ struct omap_mpu_timer_s *s =3D opaque;
=20
if (size !=3D 4) {
omap_badwidth_write32(opaque, addr, value);
@@ -308,7 +308,7 @@ struct omap_watchdog_timer_s {
static uint64_t omap_wd_timer_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_watchdog_timer_s *s =3D (struct omap_watchdog_timer_s *) o=
paque;
+ struct omap_watchdog_timer_s *s =3D opaque;
=20
if (size !=3D 2) {
return omap_badwidth_read16(opaque, addr);
@@ -333,7 +333,7 @@ static uint64_t omap_wd_timer_read(void *opaque, hwaddr=
addr,
static void omap_wd_timer_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_watchdog_timer_s *s =3D (struct omap_watchdog_timer_s *) o=
paque;
+ struct omap_watchdog_timer_s *s =3D opaque;
=20
if (size !=3D 2) {
omap_badwidth_write16(opaque, addr, value);
@@ -431,7 +431,7 @@ struct omap_32khz_timer_s {
static uint64_t omap_os_timer_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_32khz_timer_s *s =3D (struct omap_32khz_timer_s *) opaque;
+ struct omap_32khz_timer_s *s =3D opaque;
int offset =3D addr & OMAP_MPUI_REG_MASK;
=20
if (size !=3D 4) {
@@ -458,7 +458,7 @@ static uint64_t omap_os_timer_read(void *opaque, hwaddr=
addr,
static void omap_os_timer_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_32khz_timer_s *s =3D (struct omap_32khz_timer_s *) opaque;
+ struct omap_32khz_timer_s *s =3D opaque;
int offset =3D addr & OMAP_MPUI_REG_MASK;
=20
if (size !=3D 4) {
@@ -532,7 +532,7 @@ static struct omap_32khz_timer_s *omap_os_timer_init(Me=
moryRegion *memory,
static uint64_t omap_ulpd_pm_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_state_s *s =3D (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s =3D opaque;
uint16_t ret;
=20
if (size !=3D 2) {
@@ -600,7 +600,7 @@ static inline void omap_ulpd_req_update(struct omap_mpu=
_state_s *s,
static void omap_ulpd_pm_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpu_state_s *s =3D (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s =3D opaque;
int64_t now, ticks;
int div, mult;
static const int bypass_div[4] =3D { 1, 2, 4, 4 };
@@ -765,7 +765,7 @@ static void omap_ulpd_pm_init(MemoryRegion *system_memo=
ry,
static uint64_t omap_pin_cfg_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_state_s *s =3D (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s =3D opaque;
=20
if (size !=3D 4) {
return omap_badwidth_read32(opaque, addr);
@@ -876,7 +876,7 @@ static inline void omap_pin_modconf1_update(struct omap=
_mpu_state_s *s,
static void omap_pin_cfg_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpu_state_s *s =3D (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s =3D opaque;
uint32_t diff;
=20
if (size !=3D 4) {
@@ -988,7 +988,7 @@ static void omap_pin_cfg_init(MemoryRegion *system_memo=
ry,
static uint64_t omap_id_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_state_s *s =3D (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s =3D opaque;
=20
if (size !=3D 4) {
return omap_badwidth_read32(opaque, addr);
@@ -1070,7 +1070,7 @@ static void omap_id_init(MemoryRegion *memory, struct=
omap_mpu_state_s *mpu)
static uint64_t omap_mpui_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_state_s *s =3D (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s =3D opaque;
=20
if (size !=3D 4) {
return omap_badwidth_read32(opaque, addr);
@@ -1103,7 +1103,7 @@ static uint64_t omap_mpui_read(void *opaque, hwaddr a=
ddr,
static void omap_mpui_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpu_state_s *s =3D (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s =3D opaque;
=20
if (size !=3D 4) {
omap_badwidth_write32(opaque, addr, value);
@@ -1168,7 +1168,7 @@ struct omap_tipb_bridge_s {
static uint64_t omap_tipb_bridge_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_tipb_bridge_s *s =3D (struct omap_tipb_bridge_s *) opaque;
+ struct omap_tipb_bridge_s *s =3D opaque;
=20
if (size < 2) {
return omap_badwidth_read16(opaque, addr);
@@ -1198,7 +1198,7 @@ static uint64_t omap_tipb_bridge_read(void *opaque, h=
waddr addr,
static void omap_tipb_bridge_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_tipb_bridge_s *s =3D (struct omap_tipb_bridge_s *) opaque;
+ struct omap_tipb_bridge_s *s =3D opaque;
=20
if (size < 2) {
omap_badwidth_write16(opaque, addr, value);
@@ -1269,7 +1269,7 @@ static struct omap_tipb_bridge_s *omap_tipb_bridge_in=
it(
static uint64_t omap_tcmi_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_state_s *s =3D (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s =3D opaque;
uint32_t ret;
=20
if (size !=3D 4) {
@@ -1307,7 +1307,7 @@ static uint64_t omap_tcmi_read(void *opaque, hwaddr a=
ddr,
static void omap_tcmi_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpu_state_s *s =3D (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s =3D opaque;
=20
if (size !=3D 4) {
omap_badwidth_write32(opaque, addr, value);
@@ -1384,7 +1384,7 @@ struct dpll_ctl_s {
static uint64_t omap_dpll_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct dpll_ctl_s *s =3D (struct dpll_ctl_s *) opaque;
+ struct dpll_ctl_s *s =3D opaque;
=20
if (size !=3D 2) {
return omap_badwidth_read16(opaque, addr);
@@ -1400,7 +1400,7 @@ static uint64_t omap_dpll_read(void *opaque, hwaddr a=
ddr,
static void omap_dpll_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct dpll_ctl_s *s =3D (struct dpll_ctl_s *) opaque;
+ struct dpll_ctl_s *s =3D opaque;
uint16_t diff;
static const int bypass_div[4] =3D { 1, 2, 4, 4 };
int div, mult;
@@ -1464,7 +1464,7 @@ static struct dpll_ctl_s *omap_dpll_init(MemoryRegio=
n *memory,
static uint64_t omap_clkm_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_state_s *s =3D (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s =3D opaque;
=20
if (size !=3D 2) {
return omap_badwidth_read16(opaque, addr);
@@ -1668,7 +1668,7 @@ static inline void omap_clkm_ckout1_update(struct oma=
p_mpu_state_s *s,
static void omap_clkm_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpu_state_s *s =3D (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s =3D opaque;
uint16_t diff;
omap_clk clk;
static const char *clkschemename[8] =3D {
@@ -1756,7 +1756,7 @@ static const MemoryRegionOps omap_clkm_ops =3D {
static uint64_t omap_clkdsp_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_state_s *s =3D (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s =3D opaque;
CPUState *cpu =3D CPU(s->cpu);
=20
if (size !=3D 2) {
@@ -1801,7 +1801,7 @@ static inline void omap_clkdsp_idlect2_update(struct =
omap_mpu_state_s *s,
static void omap_clkdsp_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpu_state_s *s =3D (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s =3D opaque;
uint16_t diff;
=20
if (size !=3D 2) {
@@ -1911,7 +1911,7 @@ struct omap_mpuio_s {
=20
static void omap_mpuio_set(void *opaque, int line, int level)
{
- struct omap_mpuio_s *s =3D (struct omap_mpuio_s *) opaque;
+ struct omap_mpuio_s *s =3D opaque;
uint16_t prev =3D s->inputs;
=20
if (level)
@@ -1947,7 +1947,7 @@ static void omap_mpuio_kbd_update(struct omap_mpuio_s=
*s)
static uint64_t omap_mpuio_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpuio_s *s =3D (struct omap_mpuio_s *) opaque;
+ struct omap_mpuio_s *s =3D opaque;
int offset =3D addr & OMAP_MPUI_REG_MASK;
uint16_t ret;
=20
@@ -2007,7 +2007,7 @@ static uint64_t omap_mpuio_read(void *opaque, hwaddr =
addr,
static void omap_mpuio_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpuio_s *s =3D (struct omap_mpuio_s *) opaque;
+ struct omap_mpuio_s *s =3D opaque;
int offset =3D addr & OMAP_MPUI_REG_MASK;
uint16_t diff;
int ln;
@@ -2104,7 +2104,7 @@ static void omap_mpuio_reset(struct omap_mpuio_s *s)
=20
static void omap_mpuio_onoff(void *opaque, int line, int on)
{
- struct omap_mpuio_s *s =3D (struct omap_mpuio_s *) opaque;
+ struct omap_mpuio_s *s =3D opaque;
=20
s->clk =3D on;
if (on)
@@ -2198,10 +2198,9 @@ static void omap_uwire_transfer_start(struct omap_uw=
ire_s *s)
}
}
=20
-static uint64_t omap_uwire_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_uwire_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_uwire_s *s =3D (struct omap_uwire_s *) opaque;
+ struct omap_uwire_s *s =3D opaque;
int offset =3D addr & OMAP_MPUI_REG_MASK;
=20
if (size !=3D 2) {
@@ -2235,7 +2234,7 @@ static uint64_t omap_uwire_read(void *opaque, hwaddr =
addr,
static void omap_uwire_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_uwire_s *s =3D (struct omap_uwire_s *) opaque;
+ struct omap_uwire_s *s =3D opaque;
int offset =3D addr & OMAP_MPUI_REG_MASK;
=20
if (size !=3D 2) {
@@ -2351,10 +2350,9 @@ static void omap_pwl_update(struct omap_pwl_s *s)
}
}
=20
-static uint64_t omap_pwl_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_pwl_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_pwl_s *s =3D (struct omap_pwl_s *) opaque;
+ struct omap_pwl_s *s =3D opaque;
int offset =3D addr & OMAP_MPUI_REG_MASK;
=20
if (size !=3D 1) {
@@ -2374,7 +2372,7 @@ static uint64_t omap_pwl_read(void *opaque, hwaddr ad=
dr,
static void omap_pwl_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_pwl_s *s =3D (struct omap_pwl_s *) opaque;
+ struct omap_pwl_s *s =3D opaque;
int offset =3D addr & OMAP_MPUI_REG_MASK;
=20
if (size !=3D 1) {
@@ -2414,7 +2412,7 @@ static void omap_pwl_reset(struct omap_pwl_s *s)
=20
static void omap_pwl_clk_update(void *opaque, int line, int on)
{
- struct omap_pwl_s *s =3D (struct omap_pwl_s *) opaque;
+ struct omap_pwl_s *s =3D opaque;
=20
s->clk =3D on;
omap_pwl_update(s);
@@ -2445,10 +2443,9 @@ struct omap_pwt_s {
omap_clk clk;
};
=20
-static uint64_t omap_pwt_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_pwt_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_pwt_s *s =3D (struct omap_pwt_s *) opaque;
+ struct omap_pwt_s *s =3D opaque;
int offset =3D addr & OMAP_MPUI_REG_MASK;
=20
if (size !=3D 1) {
@@ -2470,7 +2467,7 @@ static uint64_t omap_pwt_read(void *opaque, hwaddr ad=
dr,
static void omap_pwt_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_pwt_s *s =3D (struct omap_pwt_s *) opaque;
+ struct omap_pwt_s *s =3D opaque;
int offset =3D addr & OMAP_MPUI_REG_MASK;
=20
if (size !=3D 1) {
@@ -2577,10 +2574,9 @@ static void omap_rtc_alarm_update(struct omap_rtc_s =
*s)
printf("%s: conversion failed\n", __func__);
}
=20
-static uint64_t omap_rtc_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_rtc_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_rtc_s *s =3D (struct omap_rtc_s *) opaque;
+ struct omap_rtc_s *s =3D opaque;
int offset =3D addr & OMAP_MPUI_REG_MASK;
uint8_t i;
=20
@@ -2662,7 +2658,7 @@ static uint64_t omap_rtc_read(void *opaque, hwaddr ad=
dr,
static void omap_rtc_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_rtc_s *s =3D (struct omap_rtc_s *) opaque;
+ struct omap_rtc_s *s =3D opaque;
int offset =3D addr & OMAP_MPUI_REG_MASK;
struct tm new_tm;
time_t ti[2];
@@ -3034,7 +3030,7 @@ static void omap_mcbsp_rx_newdata(struct omap_mcbsp_s=
*s)
=20
static void omap_mcbsp_source_tick(void *opaque)
{
- struct omap_mcbsp_s *s =3D (struct omap_mcbsp_s *) opaque;
+ struct omap_mcbsp_s *s =3D opaque;
static const int bps[8] =3D { 0, 1, 1, 2, 2, 2, -255, -255 };
=20
if (!s->rx_rate)
@@ -3080,7 +3076,7 @@ static void omap_mcbsp_tx_newdata(struct omap_mcbsp_s=
*s)
=20
static void omap_mcbsp_sink_tick(void *opaque)
{
- struct omap_mcbsp_s *s =3D (struct omap_mcbsp_s *) opaque;
+ struct omap_mcbsp_s *s =3D opaque;
static const int bps[8] =3D { 0, 1, 1, 2, 2, 2, -255, -255 };
=20
if (!s->tx_rate)
@@ -3173,7 +3169,7 @@ static void omap_mcbsp_req_update(struct omap_mcbsp_s=
*s)
static uint64_t omap_mcbsp_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mcbsp_s *s =3D (struct omap_mcbsp_s *) opaque;
+ struct omap_mcbsp_s *s =3D opaque;
int offset =3D addr & OMAP_MPUI_REG_MASK;
uint16_t ret;
=20
@@ -3271,7 +3267,7 @@ static uint64_t omap_mcbsp_read(void *opaque, hwaddr =
addr,
static void omap_mcbsp_writeh(void *opaque, hwaddr addr,
uint32_t value)
{
- struct omap_mcbsp_s *s =3D (struct omap_mcbsp_s *) opaque;
+ struct omap_mcbsp_s *s =3D opaque;
int offset =3D addr & OMAP_MPUI_REG_MASK;
=20
switch (offset) {
@@ -3407,7 +3403,7 @@ static void omap_mcbsp_writeh(void *opaque, hwaddr ad=
dr,
static void omap_mcbsp_writew(void *opaque, hwaddr addr,
uint32_t value)
{
- struct omap_mcbsp_s *s =3D (struct omap_mcbsp_s *) opaque;
+ struct omap_mcbsp_s *s =3D opaque;
int offset =3D addr & OMAP_MPUI_REG_MASK;
=20
if (offset =3D=3D 0x04) { /* DXR */
@@ -3498,7 +3494,7 @@ static struct omap_mcbsp_s *omap_mcbsp_init(MemoryReg=
ion *system_memory,
=20
static void omap_mcbsp_i2s_swallow(void *opaque, int line, int level)
{
- struct omap_mcbsp_s *s =3D (struct omap_mcbsp_s *) opaque;
+ struct omap_mcbsp_s *s =3D opaque;
=20
if (s->rx_rate) {
s->rx_req =3D s->codec->in.len;
@@ -3508,7 +3504,7 @@ static void omap_mcbsp_i2s_swallow(void *opaque, int =
line, int level)
=20
static void omap_mcbsp_i2s_start(void *opaque, int line, int level)
{
- struct omap_mcbsp_s *s =3D (struct omap_mcbsp_s *) opaque;
+ struct omap_mcbsp_s *s =3D opaque;
=20
if (s->tx_rate) {
s->tx_req =3D s->codec->out.size;
@@ -3590,10 +3586,9 @@ static void omap_lpg_reset(struct omap_lpg_s *s)
omap_lpg_update(s);
}
=20
-static uint64_t omap_lpg_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_lpg_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_lpg_s *s =3D (struct omap_lpg_s *) opaque;
+ struct omap_lpg_s *s =3D opaque;
int offset =3D addr & OMAP_MPUI_REG_MASK;
=20
if (size !=3D 1) {
@@ -3615,7 +3610,7 @@ static uint64_t omap_lpg_read(void *opaque, hwaddr ad=
dr,
static void omap_lpg_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_lpg_s *s =3D (struct omap_lpg_s *) opaque;
+ struct omap_lpg_s *s =3D opaque;
int offset =3D addr & OMAP_MPUI_REG_MASK;
=20
if (size !=3D 1) {
@@ -3650,7 +3645,7 @@ static const MemoryRegionOps omap_lpg_ops =3D {
=20
static void omap_lpg_clk_update(void *opaque, int line, int on)
{
- struct omap_lpg_s *s =3D (struct omap_lpg_s *) opaque;
+ struct omap_lpg_s *s =3D opaque;
=20
s->clk =3D on;
omap_lpg_update(s);
@@ -3713,7 +3708,7 @@ static void omap_setup_mpui_io(MemoryRegion *system_m=
emory,
/* General chip reset */
static void omap1_mpu_reset(void *opaque)
{
- struct omap_mpu_state_s *mpu =3D (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *mpu =3D opaque;
=20
omap_dma_reset(mpu->dma);
omap_mpu_timer_reset(mpu->timer[0]);
@@ -3793,7 +3788,7 @@ static void omap_setup_dsp_mapping(MemoryRegion *syst=
em_memory,
=20
void omap_mpu_wakeup(void *opaque, int irq, int req)
{
- struct omap_mpu_state_s *mpu =3D (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *mpu =3D opaque;
CPUState *cpu =3D CPU(mpu->cpu);
=20
if (cpu->halted) {
diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c
index 8571eedd736..366d6af1b66 100644
--- a/hw/arm/omap2.c
+++ b/hw/arm/omap2.c
@@ -167,7 +167,7 @@ static inline void omap_eac_out_empty(struct omap_eac_s=
*s)
=20
static void omap_eac_in_cb(void *opaque, int avail_b)
{
- struct omap_eac_s *s =3D (struct omap_eac_s *) opaque;
+ struct omap_eac_s *s =3D opaque;
=20
s->codec.rxavail =3D avail_b >> 2;
omap_eac_in_refill(s);
@@ -177,7 +177,7 @@ static void omap_eac_in_cb(void *opaque, int avail_b)
=20
static void omap_eac_out_cb(void *opaque, int free_b)
{
- struct omap_eac_s *s =3D (struct omap_eac_s *) opaque;
+ struct omap_eac_s *s =3D opaque;
=20
s->codec.txavail =3D free_b >> 2;
if (s->codec.txlen)
@@ -333,10 +333,9 @@ static void omap_eac_reset(struct omap_eac_s *s)
omap_eac_interrupt_update(s);
}
=20
-static uint64_t omap_eac_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_eac_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_eac_s *s =3D (struct omap_eac_s *) opaque;
+ struct omap_eac_s *s =3D opaque;
uint32_t ret;
=20
if (size !=3D 2) {
@@ -452,7 +451,7 @@ static uint64_t omap_eac_read(void *opaque, hwaddr addr,
static void omap_eac_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_eac_s *s =3D (struct omap_eac_s *) opaque;
+ struct omap_eac_s *s =3D opaque;
=20
if (size !=3D 2) {
omap_badwidth_write16(opaque, addr, value);
@@ -656,7 +655,7 @@ static void omap_sti_reset(struct omap_sti_s *s)
static uint64_t omap_sti_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_sti_s *s =3D (struct omap_sti_s *) opaque;
+ struct omap_sti_s *s =3D opaque;
=20
if (size !=3D 4) {
return omap_badwidth_read32(opaque, addr);
@@ -697,7 +696,7 @@ static uint64_t omap_sti_read(void *opaque, hwaddr addr,
static void omap_sti_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_sti_s *s =3D (struct omap_sti_s *) opaque;
+ struct omap_sti_s *s =3D opaque;
=20
if (size !=3D 4) {
omap_badwidth_write32(opaque, addr, value);
@@ -751,8 +750,7 @@ static const MemoryRegionOps omap_sti_ops =3D {
.endianness =3D DEVICE_NATIVE_ENDIAN,
};
=20
-static uint64_t omap_sti_fifo_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_sti_fifo_read(void *opaque, hwaddr addr, unsigned siz=
e)
{
OMAP_BAD_REG(addr);
return 0;
@@ -761,7 +759,7 @@ static uint64_t omap_sti_fifo_read(void *opaque, hwaddr=
addr,
static void omap_sti_fifo_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_sti_s *s =3D (struct omap_sti_s *) opaque;
+ struct omap_sti_s *s =3D opaque;
int ch =3D addr >> 6;
uint8_t byte =3D value;
=20
@@ -1057,7 +1055,7 @@ static void omap_prcm_int_update(struct omap_prcm_s *=
s, int dom)
static uint64_t omap_prcm_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_prcm_s *s =3D (struct omap_prcm_s *) opaque;
+ struct omap_prcm_s *s =3D opaque;
uint32_t ret;
=20
if (size !=3D 4) {
@@ -1369,7 +1367,7 @@ static void omap_prcm_dpll_update(struct omap_prcm_s =
*s)
static void omap_prcm_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_prcm_s *s =3D (struct omap_prcm_s *) opaque;
+ struct omap_prcm_s *s =3D opaque;
=20
if (size !=3D 4) {
omap_badwidth_write32(opaque, addr, value);
@@ -1849,7 +1847,7 @@ struct omap_sysctl_s {
static uint32_t omap_sysctl_read8(void *opaque, hwaddr addr)
{
=20
- struct omap_sysctl_s *s =3D (struct omap_sysctl_s *) opaque;
+ struct omap_sysctl_s *s =3D opaque;
int pad_offset, byte_offset;
int value;
=20
@@ -1873,7 +1871,7 @@ static uint32_t omap_sysctl_read8(void *opaque, hwadd=
r addr)
=20
static uint32_t omap_sysctl_read(void *opaque, hwaddr addr)
{
- struct omap_sysctl_s *s =3D (struct omap_sysctl_s *) opaque;
+ struct omap_sysctl_s *s =3D opaque;
=20
switch (addr) {
case 0x000: /* CONTROL_REVISION */
@@ -1971,10 +1969,9 @@ static uint32_t omap_sysctl_read(void *opaque, hwadd=
r addr)
return 0;
}
=20
-static void omap_sysctl_write8(void *opaque, hwaddr addr,
- uint32_t value)
+static void omap_sysctl_write8(void *opaque, hwaddr addr, uint32_t value)
{
- struct omap_sysctl_s *s =3D (struct omap_sysctl_s *) opaque;
+ struct omap_sysctl_s *s =3D opaque;
int pad_offset, byte_offset;
int prev_value;
=20
@@ -1995,10 +1992,9 @@ static void omap_sysctl_write8(void *opaque, hwaddr =
addr,
}
}
=20
-static void omap_sysctl_write(void *opaque, hwaddr addr,
- uint32_t value)
+static void omap_sysctl_write(void *opaque, hwaddr addr, uint32_t value)
{
- struct omap_sysctl_s *s =3D (struct omap_sysctl_s *) opaque;
+ struct omap_sysctl_s *s =3D opaque;
=20
switch (addr) {
case 0x000: /* CONTROL_REVISION */
@@ -2233,7 +2229,7 @@ static struct omap_sysctl_s *omap_sysctl_init(struct =
omap_target_agent_s *ta,
/* General chip reset */
static void omap2_mpu_reset(void *opaque)
{
- struct omap_mpu_state_s *mpu =3D (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *mpu =3D opaque;
=20
omap_dma_reset(mpu->dma);
omap_prcm_reset(mpu->prcm);
diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c
index 1d156bc3441..e7212920797 100644
--- a/hw/arm/omap_sx1.c
+++ b/hw/arm/omap_sx1.c
@@ -66,7 +66,7 @@
static uint64_t static_read(void *opaque, hwaddr offset,
unsigned size)
{
- uint32_t *val =3D (uint32_t *) opaque;
+ uint32_t *val =3D opaque;
uint32_t mask =3D (4 / size) - 1;
=20
return *val >> ((offset & mask) << 3);
diff --git a/hw/arm/palm.c b/hw/arm/palm.c
index 68e11dd1ecc..1457f10c83a 100644
--- a/hw/arm/palm.c
+++ b/hw/arm/palm.c
@@ -115,7 +115,7 @@ static struct {
=20
static void palmte_button_event(void *opaque, int keycode)
{
- struct omap_mpu_state_s *cpu =3D (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *cpu =3D opaque;
=20
if (palmte_keymap[keycode & 0x7f].row !=3D -1)
omap_mpuio_key(cpu->mpuio,
diff --git a/hw/char/omap_uart.c b/hw/char/omap_uart.c
index e8da9333782..1c890b92018 100644
--- a/hw/char/omap_uart.c
+++ b/hw/char/omap_uart.c
@@ -67,10 +67,9 @@ struct omap_uart_s *omap_uart_init(hwaddr base,
return s;
}
=20
-static uint64_t omap_uart_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_uart_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_uart_s *s =3D (struct omap_uart_s *) opaque;
+ struct omap_uart_s *s =3D opaque;
=20
if (size =3D=3D 4) {
return omap_badwidth_read8(opaque, addr);
@@ -108,7 +107,7 @@ static uint64_t omap_uart_read(void *opaque, hwaddr add=
r,
static void omap_uart_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_uart_s *s =3D (struct omap_uart_s *) opaque;
+ struct omap_uart_s *s =3D opaque;
=20
if (size =3D=3D 4) {
omap_badwidth_write8(opaque, addr, value);
diff --git a/hw/display/omap_dss.c b/hw/display/omap_dss.c
index 09e18407b46..f33fc7606d3 100644
--- a/hw/display/omap_dss.c
+++ b/hw/display/omap_dss.c
@@ -175,7 +175,7 @@ void omap_dss_reset(struct omap_dss_s *s)
static uint64_t omap_diss_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_dss_s *s =3D (struct omap_dss_s *) opaque;
+ struct omap_dss_s *s =3D opaque;
=20
if (size !=3D 4) {
return omap_badwidth_read32(opaque, addr);
@@ -213,7 +213,7 @@ static uint64_t omap_diss_read(void *opaque, hwaddr add=
r,
static void omap_diss_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_dss_s *s =3D (struct omap_dss_s *) opaque;
+ struct omap_dss_s *s =3D opaque;
=20
if (size !=3D 4) {
omap_badwidth_write32(opaque, addr, value);
@@ -254,7 +254,7 @@ static const MemoryRegionOps omap_diss_ops =3D {
static uint64_t omap_disc_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_dss_s *s =3D (struct omap_dss_s *) opaque;
+ struct omap_dss_s *s =3D opaque;
=20
if (size !=3D 4) {
return omap_badwidth_read32(opaque, addr);
@@ -379,7 +379,7 @@ static uint64_t omap_disc_read(void *opaque, hwaddr add=
r,
static void omap_disc_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_dss_s *s =3D (struct omap_dss_s *) opaque;
+ struct omap_dss_s *s =3D opaque;
=20
if (size !=3D 4) {
omap_badwidth_write32(opaque, addr, value);
@@ -669,10 +669,9 @@ static void omap_rfbi_transfer_start(struct omap_dss_s=
*s)
omap_dispc_interrupt_update(s);
}
=20
-static uint64_t omap_rfbi_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_rfbi_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_dss_s *s =3D (struct omap_dss_s *) opaque;
+ struct omap_dss_s *s =3D opaque;
=20
if (size !=3D 4) {
return omap_badwidth_read32(opaque, addr);
@@ -739,7 +738,7 @@ static uint64_t omap_rfbi_read(void *opaque, hwaddr add=
r,
static void omap_rfbi_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_dss_s *s =3D (struct omap_dss_s *) opaque;
+ struct omap_dss_s *s =3D opaque;
=20
if (size !=3D 4) {
omap_badwidth_write32(opaque, addr, value);
diff --git a/hw/display/omap_lcdc.c b/hw/display/omap_lcdc.c
index 0ba42ef637c..3532a801be2 100644
--- a/hw/display/omap_lcdc.c
+++ b/hw/display/omap_lcdc.c
@@ -198,7 +198,7 @@ static void draw_line16_32(void *opaque, uint8_t *d, co=
nst uint8_t *s,
=20
static void omap_update_display(void *opaque)
{
- struct omap_lcd_panel_s *omap_lcd =3D (struct omap_lcd_panel_s *) opaq=
ue;
+ struct omap_lcd_panel_s *omap_lcd =3D opaque;
DisplaySurface *surface;
drawfn draw_line;
int size, height, first, last;
@@ -376,10 +376,9 @@ static void omap_lcd_update(struct omap_lcd_panel_s *s=
) {
}
}
=20
-static uint64_t omap_lcdc_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_lcdc_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_lcd_panel_s *s =3D (struct omap_lcd_panel_s *) opaque;
+ struct omap_lcd_panel_s *s =3D opaque;
=20
switch (addr) {
case 0x00: /* LCD_CONTROL */
@@ -412,7 +411,7 @@ static uint64_t omap_lcdc_read(void *opaque, hwaddr add=
r,
static void omap_lcdc_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_lcd_panel_s *s =3D (struct omap_lcd_panel_s *) opaque;
+ struct omap_lcd_panel_s *s =3D opaque;
=20
switch (addr) {
case 0x00: /* LCD_CONTROL */
diff --git a/hw/dma/omap_dma.c b/hw/dma/omap_dma.c
index 6677237d42a..c6e35ba4b80 100644
--- a/hw/dma/omap_dma.c
+++ b/hw/dma/omap_dma.c
@@ -1454,10 +1454,9 @@ static int omap_dma_sys_read(struct omap_dma_s *s, i=
nt offset,
return 0;
}
=20
-static uint64_t omap_dma_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_dma_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_dma_s *s =3D (struct omap_dma_s *) opaque;
+ struct omap_dma_s *s =3D opaque;
int reg, ch;
uint16_t ret;
=20
@@ -1505,7 +1504,7 @@ static uint64_t omap_dma_read(void *opaque, hwaddr ad=
dr,
static void omap_dma_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_dma_s *s =3D (struct omap_dma_s *) opaque;
+ struct omap_dma_s *s =3D opaque;
int reg, ch;
=20
if (size !=3D 2) {
@@ -1557,7 +1556,7 @@ static const MemoryRegionOps omap_dma_ops =3D {
=20
static void omap_dma_request(void *opaque, int drq, int req)
{
- struct omap_dma_s *s =3D (struct omap_dma_s *) opaque;
+ struct omap_dma_s *s =3D opaque;
/* The request pins are level triggered in QEMU. */
if (req) {
if (~s->dma->drqbmp & (1ULL << drq)) {
@@ -1571,7 +1570,7 @@ static void omap_dma_request(void *opaque, int drq, i=
nt req)
/* XXX: this won't be needed once soc_dma knows about clocks. */
static void omap_dma_clk_update(void *opaque, int line, int on)
{
- struct omap_dma_s *s =3D (struct omap_dma_s *) opaque;
+ struct omap_dma_s *s =3D opaque;
int i;
=20
s->dma->freq =3D omap_clk_getrate(s->clk);
@@ -1703,7 +1702,7 @@ static void omap_dma_interrupts_4_update(struct omap_=
dma_s *s)
static uint64_t omap_dma4_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_dma_s *s =3D (struct omap_dma_s *) opaque;
+ struct omap_dma_s *s =3D opaque;
int irqn =3D 0, chnum;
struct omap_dma_channel_s *ch;
=20
@@ -1859,7 +1858,7 @@ static uint64_t omap_dma4_read(void *opaque, hwaddr a=
ddr,
static void omap_dma4_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_dma_s *s =3D (struct omap_dma_s *) opaque;
+ struct omap_dma_s *s =3D opaque;
int chnum, irqn =3D 0;
struct omap_dma_channel_s *ch;
=20
diff --git a/hw/gpio/omap_gpio.c b/hw/gpio/omap_gpio.c
index 12ec16d1b03..b3cb3499bd1 100644
--- a/hw/gpio/omap_gpio.c
+++ b/hw/gpio/omap_gpio.c
@@ -72,7 +72,7 @@ static void omap_gpio_set(void *opaque, int line, int lev=
el)
static uint64_t omap_gpio_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_gpio_s *s =3D (struct omap_gpio_s *) opaque;
+ struct omap_gpio_s *s =3D opaque;
int offset =3D addr & OMAP_MPUI_REG_MASK;
=20
if (size !=3D 2) {
@@ -110,7 +110,7 @@ static uint64_t omap_gpio_read(void *opaque, hwaddr add=
r,
static void omap_gpio_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_gpio_s *s =3D (struct omap_gpio_s *) opaque;
+ struct omap_gpio_s *s =3D opaque;
int offset =3D addr & OMAP_MPUI_REG_MASK;
uint16_t diff;
int ln;
@@ -309,7 +309,7 @@ static void omap2_gpio_module_reset(struct omap2_gpio_s=
*s)
=20
static uint32_t omap2_gpio_module_read(void *opaque, hwaddr addr)
{
- struct omap2_gpio_s *s =3D (struct omap2_gpio_s *) opaque;
+ struct omap2_gpio_s *s =3D opaque;
=20
switch (addr) {
case 0x00: /* GPIO_REVISION */
@@ -382,7 +382,7 @@ static uint32_t omap2_gpio_module_read(void *opaque, hw=
addr addr)
static void omap2_gpio_module_write(void *opaque, hwaddr addr,
uint32_t value)
{
- struct omap2_gpio_s *s =3D (struct omap2_gpio_s *) opaque;
+ struct omap2_gpio_s *s =3D opaque;
uint32_t diff;
int ln;
=20
@@ -611,10 +611,9 @@ static void omap2_gpif_reset(DeviceState *dev)
s->gpo =3D 0;
}
=20
-static uint64_t omap2_gpif_top_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap2_gpif_top_read(void *opaque, hwaddr addr, unsigned si=
ze)
{
- struct omap2_gpif_s *s =3D (struct omap2_gpif_s *) opaque;
+ struct omap2_gpif_s *s =3D opaque;
=20
switch (addr) {
case 0x00: /* IPGENERICOCPSPL_REVISION */
@@ -643,7 +642,7 @@ static uint64_t omap2_gpif_top_read(void *opaque, hwadd=
r addr,
static void omap2_gpif_top_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap2_gpif_s *s =3D (struct omap2_gpif_s *) opaque;
+ struct omap2_gpif_s *s =3D opaque;
=20
switch (addr) {
case 0x00: /* IPGENERICOCPSPL_REVISION */
diff --git a/hw/intc/omap_intc.c b/hw/intc/omap_intc.c
index d7183d035e9..9f6a71ce305 100644
--- a/hw/intc/omap_intc.c
+++ b/hw/intc/omap_intc.c
@@ -109,7 +109,7 @@ static inline void omap_inth_update(struct omap_intr_ha=
ndler_s *s, int is_fiq)
=20
static void omap_set_intr(void *opaque, int irq, int req)
{
- struct omap_intr_handler_s *ih =3D (struct omap_intr_handler_s *) opaq=
ue;
+ struct omap_intr_handler_s *ih =3D opaque;
uint32_t rise;
=20
struct omap_intr_handler_bank_s *bank =3D &ih->bank[irq >> 5];
@@ -136,7 +136,7 @@ static void omap_set_intr(void *opaque, int irq, int re=
q)
/* Simplified version with no edge detection */
static void omap_set_intr_noedge(void *opaque, int irq, int req)
{
- struct omap_intr_handler_s *ih =3D (struct omap_intr_handler_s *) opaq=
ue;
+ struct omap_intr_handler_s *ih =3D opaque;
uint32_t rise;
=20
struct omap_intr_handler_bank_s *bank =3D &ih->bank[irq >> 5];
@@ -156,7 +156,7 @@ static void omap_set_intr_noedge(void *opaque, int irq,=
int req)
static uint64_t omap_inth_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_intr_handler_s *s =3D (struct omap_intr_handler_s *) opaqu=
e;
+ struct omap_intr_handler_s *s =3D opaque;
int i, offset =3D addr;
int bank_no =3D offset >> 8;
int line_no;
@@ -234,7 +234,7 @@ static uint64_t omap_inth_read(void *opaque, hwaddr add=
r,
static void omap_inth_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_intr_handler_s *s =3D (struct omap_intr_handler_s *) opaqu=
e;
+ struct omap_intr_handler_s *s =3D opaque;
int i, offset =3D addr;
int bank_no =3D offset >> 8;
struct omap_intr_handler_bank_s *bank =3D &s->bank[bank_no];
@@ -423,7 +423,7 @@ static const TypeInfo omap_intc_info =3D {
static uint64_t omap2_inth_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_intr_handler_s *s =3D (struct omap_intr_handler_s *) opaqu=
e;
+ struct omap_intr_handler_s *s =3D opaque;
int offset =3D addr;
int bank_no, line_no;
struct omap_intr_handler_bank_s *bank =3D NULL;
@@ -504,7 +504,7 @@ static uint64_t omap2_inth_read(void *opaque, hwaddr ad=
dr,
static void omap2_inth_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_intr_handler_s *s =3D (struct omap_intr_handler_s *) opaqu=
e;
+ struct omap_intr_handler_s *s =3D opaque;
int offset =3D addr;
int bank_no, line_no;
struct omap_intr_handler_bank_s *bank =3D NULL;
diff --git a/hw/misc/omap_gpmc.c b/hw/misc/omap_gpmc.c
index 10de7a55236..67158eb1649 100644
--- a/hw/misc/omap_gpmc.c
+++ b/hw/misc/omap_gpmc.c
@@ -126,7 +126,7 @@ static void omap_gpmc_dma_update(struct omap_gpmc_s *s,=
int value)
static uint64_t omap_nand_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_gpmc_cs_file_s *f =3D (struct omap_gpmc_cs_file_s *)opaque;
+ struct omap_gpmc_cs_file_s *f =3D opaque;
uint64_t v;
nand_setpins(f->dev, 0, 0, 0, 1, 0);
switch (omap_gpmc_devsize(f)) {
@@ -205,7 +205,7 @@ static void omap_nand_setio(DeviceState *dev, uint64_t =
value,
static void omap_nand_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_gpmc_cs_file_s *f =3D (struct omap_gpmc_cs_file_s *)opaque;
+ struct omap_gpmc_cs_file_s *f =3D opaque;
nand_setpins(f->dev, 0, 0, 0, 1, 0);
omap_nand_setio(f->dev, value, omap_gpmc_devsize(f), size);
}
@@ -290,7 +290,7 @@ static void fill_prefetch_fifo(struct omap_gpmc_s *s)
static uint64_t omap_gpmc_prefetch_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_gpmc_s *s =3D (struct omap_gpmc_s *) opaque;
+ struct omap_gpmc_s *s =3D opaque;
uint32_t data;
if (s->prefetch.config1 & 1) {
/* The TRM doesn't define the behaviour if you read from the
@@ -320,7 +320,7 @@ static uint64_t omap_gpmc_prefetch_read(void *opaque, h=
waddr addr,
static void omap_gpmc_prefetch_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_gpmc_s *s =3D (struct omap_gpmc_s *) opaque;
+ struct omap_gpmc_s *s =3D opaque;
int cs =3D prefetch_cs(s->prefetch.config1);
if ((s->prefetch.config1 & 1) =3D=3D 0) {
/* The TRM doesn't define the behaviour of writing to the
@@ -509,7 +509,7 @@ static int gpmc_wordaccess_only(hwaddr addr)
static uint64_t omap_gpmc_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_gpmc_s *s =3D (struct omap_gpmc_s *) opaque;
+ struct omap_gpmc_s *s =3D opaque;
int cs;
struct omap_gpmc_cs_file_s *f;
=20
@@ -621,7 +621,7 @@ static uint64_t omap_gpmc_read(void *opaque, hwaddr add=
r,
static void omap_gpmc_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_gpmc_s *s =3D (struct omap_gpmc_s *) opaque;
+ struct omap_gpmc_s *s =3D opaque;
int cs;
struct omap_gpmc_cs_file_s *f;
=20
diff --git a/hw/misc/omap_l4.c b/hw/misc/omap_l4.c
index 54aeaecd696..b7875489da3 100644
--- a/hw/misc/omap_l4.c
+++ b/hw/misc/omap_l4.c
@@ -52,10 +52,9 @@ hwaddr omap_l4_region_size(struct omap_target_agent_s *t=
a,
return ta->start[region].size;
}
=20
-static uint64_t omap_l4ta_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_l4ta_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_target_agent_s *s =3D (struct omap_target_agent_s *) opaqu=
e;
+ struct omap_target_agent_s *s =3D opaque;
=20
if (size !=3D 2) {
return omap_badwidth_read16(opaque, addr);
@@ -79,7 +78,7 @@ static uint64_t omap_l4ta_read(void *opaque, hwaddr addr,
static void omap_l4ta_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_target_agent_s *s =3D (struct omap_target_agent_s *) opaqu=
e;
+ struct omap_target_agent_s *s =3D opaque;
=20
if (size !=3D 4) {
omap_badwidth_write32(opaque, addr, value);
diff --git a/hw/misc/omap_sdrc.c b/hw/misc/omap_sdrc.c
index f2f72f6810b..6aa1b3ef7fb 100644
--- a/hw/misc/omap_sdrc.c
+++ b/hw/misc/omap_sdrc.c
@@ -31,10 +31,9 @@ void omap_sdrc_reset(struct omap_sdrc_s *s)
s->config =3D 0x10;
}
=20
-static uint64_t omap_sdrc_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_sdrc_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_sdrc_s *s =3D (struct omap_sdrc_s *) opaque;
+ struct omap_sdrc_s *s =3D opaque;
=20
if (size !=3D 4) {
return omap_badwidth_read32(opaque, addr);
@@ -89,7 +88,7 @@ static uint64_t omap_sdrc_read(void *opaque, hwaddr addr,
static void omap_sdrc_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_sdrc_s *s =3D (struct omap_sdrc_s *) opaque;
+ struct omap_sdrc_s *s =3D opaque;
=20
if (size !=3D 4) {
omap_badwidth_write32(opaque, addr, value);
diff --git a/hw/misc/omap_tap.c b/hw/misc/omap_tap.c
index 3f595e8df7e..4d7fb7d85f1 100644
--- a/hw/misc/omap_tap.c
+++ b/hw/misc/omap_tap.c
@@ -23,10 +23,9 @@
#include "hw/arm/omap.h"
=20
/* TEST-Chip-level TAP */
-static uint64_t omap_tap_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_tap_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_mpu_state_s *s =3D (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s =3D opaque;
=20
if (size !=3D 4) {
return omap_badwidth_read32(opaque, addr);
diff --git a/hw/sd/omap_mmc.c b/hw/sd/omap_mmc.c
index b67def63813..edd3cf2a1eb 100644
--- a/hw/sd/omap_mmc.c
+++ b/hw/sd/omap_mmc.c
@@ -321,11 +321,10 @@ void omap_mmc_reset(struct omap_mmc_s *host)
device_cold_reset(DEVICE(host->card));
}
=20
-static uint64_t omap_mmc_read(void *opaque, hwaddr offset,
- unsigned size)
+static uint64_t omap_mmc_read(void *opaque, hwaddr offset, unsigned size)
{
uint16_t i;
- struct omap_mmc_s *s =3D (struct omap_mmc_s *) opaque;
+ struct omap_mmc_s *s =3D opaque;
=20
if (size !=3D 2) {
return omap_badwidth_read16(opaque, offset);
@@ -418,7 +417,7 @@ static void omap_mmc_write(void *opaque, hwaddr offset,
uint64_t value, unsigned size)
{
int i;
- struct omap_mmc_s *s =3D (struct omap_mmc_s *) opaque;
+ struct omap_mmc_s *s =3D opaque;
=20
if (size !=3D 2) {
omap_badwidth_write16(opaque, offset, value);
@@ -576,7 +575,7 @@ static const MemoryRegionOps omap_mmc_ops =3D {
=20
static void omap_mmc_cover_cb(void *opaque, int line, int level)
{
- struct omap_mmc_s *host =3D (struct omap_mmc_s *) opaque;
+ struct omap_mmc_s *host =3D opaque;
=20
if (!host->cdet_state && level) {
host->status |=3D 0x0002;
diff --git a/hw/ssi/omap_spi.c b/hw/ssi/omap_spi.c
index 7c7e689707a..8f85c3e3918 100644
--- a/hw/ssi/omap_spi.c
+++ b/hw/ssi/omap_spi.c
@@ -134,10 +134,9 @@ void omap_mcspi_reset(struct omap_mcspi_s *s)
omap_mcspi_interrupt_update(s);
}
=20
-static uint64_t omap_mcspi_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_mcspi_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_mcspi_s *s =3D (struct omap_mcspi_s *) opaque;
+ struct omap_mcspi_s *s =3D opaque;
int ch =3D 0;
uint32_t ret;
=20
@@ -226,7 +225,7 @@ static uint64_t omap_mcspi_read(void *opaque, hwaddr ad=
dr,
static void omap_mcspi_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mcspi_s *s =3D (struct omap_mcspi_s *) opaque;
+ struct omap_mcspi_s *s =3D opaque;
int ch =3D 0;
=20
if (size !=3D 4) {
diff --git a/hw/timer/omap_gptimer.c b/hw/timer/omap_gptimer.c
index c407190138c..34e6af7aff5 100644
--- a/hw/timer/omap_gptimer.c
+++ b/hw/timer/omap_gptimer.c
@@ -159,7 +159,7 @@ static inline void omap_gp_timer_trigger(struct omap_gp=
_timer_s *timer)
=20
static void omap_gp_timer_tick(void *opaque)
{
- struct omap_gp_timer_s *timer =3D (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *timer =3D opaque;
=20
if (!timer->ar) {
timer->st =3D 0;
@@ -179,7 +179,7 @@ static void omap_gp_timer_tick(void *opaque)
=20
static void omap_gp_timer_match(void *opaque)
{
- struct omap_gp_timer_s *timer =3D (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *timer =3D opaque;
=20
if (timer->trigger =3D=3D gpt_trigger_both)
omap_gp_timer_trigger(timer);
@@ -189,7 +189,7 @@ static void omap_gp_timer_match(void *opaque)
=20
static void omap_gp_timer_input(void *opaque, int line, int on)
{
- struct omap_gp_timer_s *s =3D (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *s =3D opaque;
int trigger;
=20
switch (s->capture) {
@@ -219,7 +219,7 @@ static void omap_gp_timer_input(void *opaque, int line,=
int on)
=20
static void omap_gp_timer_clk_update(void *opaque, int line, int on)
{
- struct omap_gp_timer_s *timer =3D (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *timer =3D opaque;
=20
omap_gp_timer_sync(timer);
timer->rate =3D on ? omap_clk_getrate(timer->clk) : 0;
@@ -262,7 +262,7 @@ void omap_gp_timer_reset(struct omap_gp_timer_s *s)
=20
static uint32_t omap_gp_timer_readw(void *opaque, hwaddr addr)
{
- struct omap_gp_timer_s *s =3D (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *s =3D opaque;
=20
switch (addr) {
case 0x00: /* TIDR */
@@ -328,7 +328,7 @@ static uint32_t omap_gp_timer_readw(void *opaque, hwadd=
r addr)
=20
static uint32_t omap_gp_timer_readh(void *opaque, hwaddr addr)
{
- struct omap_gp_timer_s *s =3D (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *s =3D opaque;
uint32_t ret;
=20
if (addr & 2)
@@ -340,10 +340,9 @@ static uint32_t omap_gp_timer_readh(void *opaque, hwad=
dr addr)
}
}
=20
-static void omap_gp_timer_write(void *opaque, hwaddr addr,
- uint32_t value)
+static void omap_gp_timer_write(void *opaque, hwaddr addr, uint32_t value)
{
- struct omap_gp_timer_s *s =3D (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *s =3D opaque;
=20
switch (addr) {
case 0x00: /* TIDR */
@@ -440,10 +439,9 @@ static void omap_gp_timer_write(void *opaque, hwaddr a=
ddr,
}
}
=20
-static void omap_gp_timer_writeh(void *opaque, hwaddr addr,
- uint32_t value)
+static void omap_gp_timer_writeh(void *opaque, hwaddr addr, uint32_t value)
{
- struct omap_gp_timer_s *s =3D (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *s =3D opaque;
=20
if (addr & 2)
omap_gp_timer_write(opaque, addr, (value << 16) | s->writeh);
diff --git a/hw/timer/omap_synctimer.c b/hw/timer/omap_synctimer.c
index 72b997939bd..d93a9344ede 100644
--- a/hw/timer/omap_synctimer.c
+++ b/hw/timer/omap_synctimer.c
@@ -39,7 +39,7 @@ void omap_synctimer_reset(struct omap_synctimer_s *s)
=20
static uint32_t omap_synctimer_readw(void *opaque, hwaddr addr)
{
- struct omap_synctimer_s *s =3D (struct omap_synctimer_s *) opaque;
+ struct omap_synctimer_s *s =3D opaque;
=20
switch (addr) {
case 0x00: /* 32KSYNCNT_REV */
@@ -55,7 +55,7 @@ static uint32_t omap_synctimer_readw(void *opaque, hwaddr=
addr)
=20
static uint32_t omap_synctimer_readh(void *opaque, hwaddr addr)
{
- struct omap_synctimer_s *s =3D (struct omap_synctimer_s *) opaque;
+ struct omap_synctimer_s *s =3D opaque;
uint32_t ret;
=20
if (addr & 2)
--=20
2.34.1