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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 33/34] i.MX7D: Connect IRQs to GPIO devices.
Date: Thu, 5 Jan 2023 16:44:16 +0000
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From: Jean-Christophe Dubois <jcd@tribudubois.net>
IRQs were not associated to the various GPIO devices inside i.MX7D.
This patch brings the i.MX7D on par with i.MX6.
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Message-id: 20221226101418.415170-1-jcd@tribudubois.net
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/arm/fsl-imx7.h | 15 +++++++++++++++
hw/arm/fsl-imx7.c | 31 ++++++++++++++++++++++++++++++-
2 files changed, 45 insertions(+), 1 deletion(-)
diff --git a/include/hw/arm/fsl-imx7.h b/include/hw/arm/fsl-imx7.h
index 50f19d8db04..4e5e0718648 100644
--- a/include/hw/arm/fsl-imx7.h
+++ b/include/hw/arm/fsl-imx7.h
@@ -240,6 +240,21 @@ enum FslIMX7IRQs {
FSL_IMX7_GPT3_IRQ =3D 53,
FSL_IMX7_GPT4_IRQ =3D 52,
=20
+ FSL_IMX7_GPIO1_LOW_IRQ =3D 64,
+ FSL_IMX7_GPIO1_HIGH_IRQ =3D 65,
+ FSL_IMX7_GPIO2_LOW_IRQ =3D 66,
+ FSL_IMX7_GPIO2_HIGH_IRQ =3D 67,
+ FSL_IMX7_GPIO3_LOW_IRQ =3D 68,
+ FSL_IMX7_GPIO3_HIGH_IRQ =3D 69,
+ FSL_IMX7_GPIO4_LOW_IRQ =3D 70,
+ FSL_IMX7_GPIO4_HIGH_IRQ =3D 71,
+ FSL_IMX7_GPIO5_LOW_IRQ =3D 72,
+ FSL_IMX7_GPIO5_HIGH_IRQ =3D 73,
+ FSL_IMX7_GPIO6_LOW_IRQ =3D 74,
+ FSL_IMX7_GPIO6_HIGH_IRQ =3D 75,
+ FSL_IMX7_GPIO7_LOW_IRQ =3D 76,
+ FSL_IMX7_GPIO7_HIGH_IRQ =3D 77,
+
FSL_IMX7_WDOG1_IRQ =3D 78,
FSL_IMX7_WDOG2_IRQ =3D 79,
FSL_IMX7_WDOG3_IRQ =3D 10,
diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c
index 146bb559bbc..afc74807990 100644
--- a/hw/arm/fsl-imx7.c
+++ b/hw/arm/fsl-imx7.c
@@ -245,8 +245,37 @@ static void fsl_imx7_realize(DeviceState *dev, Error *=
*errp)
FSL_IMX7_GPIO7_ADDR,
};
=20
+ static const int FSL_IMX7_GPIOn_LOW_IRQ[FSL_IMX7_NUM_GPIOS] =3D {
+ FSL_IMX7_GPIO1_LOW_IRQ,
+ FSL_IMX7_GPIO2_LOW_IRQ,
+ FSL_IMX7_GPIO3_LOW_IRQ,
+ FSL_IMX7_GPIO4_LOW_IRQ,
+ FSL_IMX7_GPIO5_LOW_IRQ,
+ FSL_IMX7_GPIO6_LOW_IRQ,
+ FSL_IMX7_GPIO7_LOW_IRQ,
+ };
+
+ static const int FSL_IMX7_GPIOn_HIGH_IRQ[FSL_IMX7_NUM_GPIOS] =3D {
+ FSL_IMX7_GPIO1_HIGH_IRQ,
+ FSL_IMX7_GPIO2_HIGH_IRQ,
+ FSL_IMX7_GPIO3_HIGH_IRQ,
+ FSL_IMX7_GPIO4_HIGH_IRQ,
+ FSL_IMX7_GPIO5_HIGH_IRQ,
+ FSL_IMX7_GPIO6_HIGH_IRQ,
+ FSL_IMX7_GPIO7_HIGH_IRQ,
+ };
+
sysbus_realize(SYS_BUS_DEVICE(&s->gpio[i]), &error_abort);
- sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, FSL_IMX7_GPIOn_ADD=
R[i]);
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0,
+ FSL_IMX7_GPIOn_ADDR[i]);
+
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0,
+ qdev_get_gpio_in(DEVICE(&s->a7mpcore),
+ FSL_IMX7_GPIOn_LOW_IRQ[i]));
+
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 1,
+ qdev_get_gpio_in(DEVICE(&s->a7mpcore),
+ FSL_IMX7_GPIOn_HIGH_IRQ[i]));
}
=20
/*
--=20
2.25.1