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a=ed25519-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_ed25519; t=1672869651; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=CaguIzdmOv8g/9+LmJhW8PFOJmmxe+L0J3jYpCEO7AU=; b=6D+AicIqpQUqsP9qnJ/9NOdolGmudlgZ8JOIQTJgt4kIMRH+lWLk3cBDoTc1YTZY/AzVPO 5Z5sgh6cqaueB+Ag== From: Fabiano Rosas To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Peter Maydell , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Paolo Bonzini , Claudio Fontana , Eduardo Habkost , Alexander Graf , Cornelia Huck Subject: [RFC PATCH 03/27] target/arm: Fix checkpatch brace errors in helper.c Date: Wed, 4 Jan 2023 18:58:11 -0300 Message-Id: <20230104215835.24692-4-farosas@suse.de> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20230104215835.24692-1-farosas@suse.de> References: <20230104215835.24692-1-farosas@suse.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:67c:2178:6::1c; envelope-from=farosas@suse.de; helo=smtp-out1.suse.de X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @suse.de) X-ZM-MESSAGEID: 1672871190857100003 Content-Type: text/plain; charset="utf-8" Fix this: ERROR: braces {} are necessary for all arms of this statement Reviewed-by: Claudio Fontana Reviewed-by: Cornelia Huck Signed-off-by: Fabiano Rosas --- target/arm/helper.c | 67 ++++++++++++++++++++++++++++----------------- 1 file changed, 42 insertions(+), 25 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 18e4680912..ed3da5ada3 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -9147,10 +9147,12 @@ void cpsr_write(CPUARMState *env, uint32_t val, uin= t32_t mask, env->CF =3D (val >> 29) & 1; env->VF =3D (val << 3) & 0x80000000; } - if (mask & CPSR_Q) + if (mask & CPSR_Q) { env->QF =3D ((val & CPSR_Q) !=3D 0); - if (mask & CPSR_T) + } + if (mask & CPSR_T) { env->thumb =3D ((val & CPSR_T) !=3D 0); + } if (mask & CPSR_IT_0_1) { env->condexec_bits &=3D ~3; env->condexec_bits |=3D (val >> 25) & 3; @@ -9355,8 +9357,9 @@ static void switch_mode(CPUARMState *env, int mode) int i; =20 old_mode =3D env->uncached_cpsr & CPSR_M; - if (mode =3D=3D old_mode) + if (mode =3D=3D old_mode) { return; + } =20 if (old_mode =3D=3D ARM_CPU_MODE_FIQ) { memcpy(env->fiq_regs, env->regs + 8, 5 * sizeof(uint32_t)); @@ -9962,10 +9965,11 @@ static void arm_cpu_do_interrupt_aarch32(CPUState *= cs) new_mode =3D ARM_CPU_MODE_UND; addr =3D 0x04; mask =3D CPSR_I; - if (env->thumb) + if (env->thumb) { offset =3D 2; - else + } else { offset =3D 4; + } break; case EXCP_SWI: new_mode =3D ARM_CPU_MODE_SVC; @@ -10756,10 +10760,11 @@ static inline uint16_t add16_sat(uint16_t a, uint= 16_t b) =20 res =3D a + b; if (((res ^ a) & 0x8000) && !((a ^ b) & 0x8000)) { - if (a & 0x8000) + if (a & 0x8000) { res =3D 0x8000; - else + } else { res =3D 0x7fff; + } } return res; } @@ -10771,10 +10776,11 @@ static inline uint8_t add8_sat(uint8_t a, uint8_t= b) =20 res =3D a + b; if (((res ^ a) & 0x80) && !((a ^ b) & 0x80)) { - if (a & 0x80) + if (a & 0x80) { res =3D 0x80; - else + } else { res =3D 0x7f; + } } return res; } @@ -10786,10 +10792,11 @@ static inline uint16_t sub16_sat(uint16_t a, uint= 16_t b) =20 res =3D a - b; if (((res ^ a) & 0x8000) && ((a ^ b) & 0x8000)) { - if (a & 0x8000) + if (a & 0x8000) { res =3D 0x8000; - else + } else { res =3D 0x7fff; + } } return res; } @@ -10801,10 +10808,11 @@ static inline uint8_t sub8_sat(uint8_t a, uint8_t= b) =20 res =3D a - b; if (((res ^ a) & 0x80) && ((a ^ b) & 0x80)) { - if (a & 0x80) + if (a & 0x80) { res =3D 0x80; - else + } else { res =3D 0x7f; + } } return res; } @@ -10822,34 +10830,38 @@ static inline uint16_t add16_usat(uint16_t a, uin= t16_t b) { uint16_t res; res =3D a + b; - if (res < a) + if (res < a) { res =3D 0xffff; + } return res; } =20 static inline uint16_t sub16_usat(uint16_t a, uint16_t b) { - if (a > b) + if (a > b) { return a - b; - else + } else { return 0; + } } =20 static inline uint8_t add8_usat(uint8_t a, uint8_t b) { uint8_t res; res =3D a + b; - if (res < a) + if (res < a) { res =3D 0xff; + } return res; } =20 static inline uint8_t sub8_usat(uint8_t a, uint8_t b) { - if (a > b) + if (a > b) { return a - b; - else + } else { return 0; + } } =20 #define ADD16(a, b, n) RESULT(add16_usat(a, b), n, 16); @@ -10953,10 +10965,11 @@ static inline uint8_t sub8_usat(uint8_t a, uint8_= t b) =20 static inline uint8_t do_usad(uint8_t a, uint8_t b) { - if (a > b) + if (a > b) { return a - b; - else + } else { return b - a; + } } =20 /* Unsigned sum of absolute byte differences. */ @@ -10976,14 +10989,18 @@ uint32_t HELPER(sel_flags)(uint32_t flags, uint32= _t a, uint32_t b) uint32_t mask; =20 mask =3D 0; - if (flags & 1) + if (flags & 1) { mask |=3D 0xff; - if (flags & 2) + } + if (flags & 2) { mask |=3D 0xff00; - if (flags & 4) + } + if (flags & 4) { mask |=3D 0xff0000; - if (flags & 8) + } + if (flags & 8) { mask |=3D 0xff000000; + } return (a & mask) | (b & ~mask); } =20 --=20 2.35.3