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a=ed25519-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_ed25519; t=1672869686; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=1PaijFlUItYdll2HVL0Jw+dMXhIBDHIBnIalmZ6vk7E=; b=qPxdsfH6np1EVg+jhjG0cCqMgvUwv50Z3ySHmRhmPMsdkNpvHnHlrEtBdakvqXqz+TKnlh LRmo2HtZ4WsSvBAA== From: Fabiano Rosas To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Peter Maydell , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Paolo Bonzini , Claudio Fontana , Eduardo Habkost , Alexander Graf Subject: [RFC PATCH 14/27] target/arm: Move regime_using_lpae_format into internal.h Date: Wed, 4 Jan 2023 18:58:22 -0300 Message-Id: <20230104215835.24692-15-farosas@suse.de> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20230104215835.24692-1-farosas@suse.de> References: <20230104215835.24692-1-farosas@suse.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:67c:2178:6::1c; envelope-from=farosas@suse.de; helo=smtp-out1.suse.de X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @suse.de) X-ZM-MESSAGEID: 1672870848916100003 Content-Type: text/plain; charset="utf-8" This function is needed by common code (ptw.c), so move it along with the other regime_* functions in internal.h. When we enable the build without TCG, the tlb_helper.c file will not be present. Signed-off-by: Fabiano Rosas --- target/arm/internals.h | 17 ++++++++++++++--- target/arm/tlb_helper.c | 14 -------------- 2 files changed, 14 insertions(+), 17 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 161e42d50f..3493b5cc88 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -610,9 +610,6 @@ ARMMMUIdx arm_v7m_mmu_idx_for_secstate_and_priv(CPUARMS= tate *env, /* Return the MMU index for a v7M CPU in the specified security state */ ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, bool secstate); =20 -/* Return true if the translation regime is using LPAE format page tables = */ -bool regime_using_lpae_format(CPUARMState *env, ARMMMUIdx mmu_idx); - /* * Return true if the stage 1 translation regime is using LPAE * format page tables @@ -777,6 +774,20 @@ static inline uint64_t regime_tcr(CPUARMState *env, AR= MMMUIdx mmu_idx) return env->cp15.tcr_el[regime_el(env, mmu_idx)]; } =20 +/* Return true if the translation regime is using LPAE format page tables = */ +static inline bool regime_using_lpae_format(CPUARMState *env, ARMMMUIdx mm= u_idx) +{ + int el =3D regime_el(env, mmu_idx); + if (el =3D=3D 2 || arm_el_is_aa64(env, el)) { + return true; + } + if (arm_feature(env, ARM_FEATURE_LPAE) + && (regime_tcr(env, mmu_idx) & TTBCR_EAE)) { + return true; + } + return false; +} + /** * arm_num_brps: Return number of implemented breakpoints. * Note that the ID register BRPS field is "number of bps - 1", diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c index 0f4f4fc809..31eb77f7df 100644 --- a/target/arm/tlb_helper.c +++ b/target/arm/tlb_helper.c @@ -12,20 +12,6 @@ #include "exec/helper-proto.h" =20 =20 -/* Return true if the translation regime is using LPAE format page tables = */ -bool regime_using_lpae_format(CPUARMState *env, ARMMMUIdx mmu_idx) -{ - int el =3D regime_el(env, mmu_idx); - if (el =3D=3D 2 || arm_el_is_aa64(env, el)) { - return true; - } - if (arm_feature(env, ARM_FEATURE_LPAE) - && (regime_tcr(env, mmu_idx) & TTBCR_EAE)) { - return true; - } - return false; -} - /* * Returns true if the stage 1 translation regime is using LPAE format page * tables. Used when raising alignment exceptions, whose FSR changes depen= ding --=20 2.35.3