From nobody Tue Feb 10 20:14:13 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672770456; cv=none; d=zohomail.com; s=zohoarc; b=GTDEjk+KeqClRmya2uTJFsCJpTcadFsjZQSoG842DGe69vX9HVtr4F6xVeXopFViFnJv/JXRticOoxgP6jhZ/Lgg4JmzxqIw6pT2S2Gp284Qnu6DFSapA1QOrH8nJghgngZ/zXXzp47ADdmeRTaghEhNV0tJsTCithtJMnsqh0s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672770456; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=0cpI31q8puiq+k9BfPqvIkCRkk/xl8XaSMre9iCPsr0=; b=Jjyk7gdsXnwQ6vdJsfxzWDrQMXM+dQaSkGe5UdiOeJ4vo6EMeUof7eFCLg/hSCuIWxLbs6ZYZ41n0uEbH0GkJW/DA0eDNo1808lN1GGwxqCu9gwK8RopEMHptPnOm1WdlU3Ii4auIHommXnRCA42V40XhbdTqGsMFoSLXY63coY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672770456089686.6840750468112; Tue, 3 Jan 2023 10:27:36 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pClri-0000T7-HH; Tue, 03 Jan 2023 13:18:22 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pClrT-0008P3-3w for qemu-devel@nongnu.org; Tue, 03 Jan 2023 13:18:10 -0500 Received: from mail-vs1-xe36.google.com ([2607:f8b0:4864:20::e36]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pClrR-0005Ii-KZ for qemu-devel@nongnu.org; Tue, 03 Jan 2023 13:18:06 -0500 Received: by mail-vs1-xe36.google.com with SMTP id 3so32567815vsq.7 for ; Tue, 03 Jan 2023 10:18:05 -0800 (PST) Received: from stoup.. ([2607:fb90:8060:51a2:184b:6e49:c396:be2]) by smtp.gmail.com with ESMTPSA id v2-20020a05620a440200b006fed2788751sm23042354qkp.76.2023.01.03.10.18.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Jan 2023 10:18:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0cpI31q8puiq+k9BfPqvIkCRkk/xl8XaSMre9iCPsr0=; b=sBGvtHN5Tao+Pzl4QK/QG95guKdeOvzOOlORTYmjvxJrWMarhCUIEjrH204YTgqCzk 1o33v5RMGFHLe29WvbC8ZOnO7X3f9xgp9SMMpDXsulKb+JMEKzUD80VVJRwnYhPCTjQR +M6Zqqh0QjzLYGWksF41xrHaeXGinBZsdukl88Ymy86MuuC+6d1m11kxygiaqInLGU+u d8z7VBtzM1G34T9xj6zrC729a+l/YfaGDw2wFaCcHv/9ZVs4uCyjBUvjsu2vQ2xYWvHE K50mju71bGd8+qqwO6/xE8G6cgHZyUIDiMmDswx14FaAWkWlpU3eGAS4o1bc2xDjjil6 XKng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0cpI31q8puiq+k9BfPqvIkCRkk/xl8XaSMre9iCPsr0=; b=HPW3OvQ9xnksZ8CJtT/8s1REtVCgw8datZ84DzdGtal/keZFki3+gsneWRB8H7caN5 2UqshzM6nAlxVsqQzE+VUD0dbabp02GJdff55pQa9ak2WjWknWWuoDVFXBJk8Ebgy6ix PikDF/vc29zch8FeI43DNvnmsb5wXz8F8l1rnmXGvCcGy0iRPOejJ5sn0yNhJL1lXk2a j/w9oGzzJSgBkDdN112vmp8Y9mLltsQ978zFHWUynLPnW3exAlv6RI07SQZLps08VIGp x+SgAISqSGu0Pe2qvUKciv1ll0ES84zktNIC7kOJZgyTqLqT+Fw3VWIuG4teFBtzQ9AE hJqw== X-Gm-Message-State: AFqh2kqzR9rS/iaaWl9D4YdWvPzWAEjyNd06EXHrjSgRxsdCnG/XSilp GcRy78iUqNsZ3pfqRn8CH3zLKNN/ihh8k8XjTu8= X-Google-Smtp-Source: AMrXdXsA1G+BBk6tqktY/lrnFb/qn3IrJ7VYT4NKcw4u80Gk8UHP0VaF+A/TT5kjVDH3g0nEmbTqgQ== X-Received: by 2002:a67:e417:0:b0:3cc:e60c:64bc with SMTP id d23-20020a67e417000000b003cce60c64bcmr7693970vsf.34.1672769884529; Tue, 03 Jan 2023 10:18:04 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com, berrange@redhat.com, eduardo@habkost.net, armbru@redhat.com, ajones@ventanamicro.com, alex.bennee@linaro.org Subject: [RFC PATCH 25/40] target/arm/hvf: Use offsetof in hvf_arm_get_host_cpu_features Date: Tue, 3 Jan 2023 10:16:31 -0800 Message-Id: <20230103181646.55711-26-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230103181646.55711-1-richard.henderson@linaro.org> References: <20230103181646.55711-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::e36; envelope-from=richard.henderson@linaro.org; helo=mail-vs1-xe36.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672770457813100003 Content-Type: text/plain; charset="utf-8" Use an offsetof vs ARMCPUClass, which means that the regs[] array may be static const, and we can include midr in the list. Signed-off-by: Richard Henderson --- target/arm/hvf/hvf.c | 38 ++++++++++++++++++++++++-------------- 1 file changed, 24 insertions(+), 14 deletions(-) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index d47159b9bf..362dd4ac2e 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -459,19 +459,29 @@ static uint64_t hvf_get_reg(CPUState *cpu, int rt) =20 bool hvf_arm_get_host_cpu_features(ARMCPUClass *acc, Error **errp) { - const struct isar_regs { - int reg; - uint64_t *val; + static const struct isar_regs { + int reg, offset; } regs[] =3D { - { HV_SYS_REG_ID_AA64PFR0_EL1, &acc->isar.id_aa64pfr0 }, - { HV_SYS_REG_ID_AA64PFR1_EL1, &acc->isar.id_aa64pfr1 }, - { HV_SYS_REG_ID_AA64DFR0_EL1, &acc->isar.id_aa64dfr0 }, - { HV_SYS_REG_ID_AA64DFR1_EL1, &acc->isar.id_aa64dfr1 }, - { HV_SYS_REG_ID_AA64ISAR0_EL1, &acc->isar.id_aa64isar0 }, - { HV_SYS_REG_ID_AA64ISAR1_EL1, &acc->isar.id_aa64isar1 }, - { HV_SYS_REG_ID_AA64MMFR0_EL1, &acc->isar.id_aa64mmfr0 }, - { HV_SYS_REG_ID_AA64MMFR1_EL1, &acc->isar.id_aa64mmfr1 }, - { HV_SYS_REG_ID_AA64MMFR2_EL1, &acc->isar.id_aa64mmfr2 }, + { HV_SYS_REG_ID_AA64PFR0_EL1, + offsetof(ARMCPUClass, isar.id_aa64pfr0) }, + { HV_SYS_REG_ID_AA64PFR1_EL1, + offsetof(ARMCPUClass, isar.id_aa64pfr1) }, + { HV_SYS_REG_ID_AA64DFR0_EL1, + offsetof(ARMCPUClass, isar.id_aa64dfr0) }, + { HV_SYS_REG_ID_AA64DFR1_EL1, + offsetof(ARMCPUClass, isar.id_aa64dfr1) }, + { HV_SYS_REG_ID_AA64ISAR0_EL1, + offsetof(ARMCPUClass, isar.id_aa64isar0) }, + { HV_SYS_REG_ID_AA64ISAR1_EL1, + offsetof(ARMCPUClass, isar.id_aa64isar1) }, + { HV_SYS_REG_ID_AA64MMFR0_EL1, + offsetof(ARMCPUClass, isar.id_aa64mmfr0) }, + { HV_SYS_REG_ID_AA64MMFR1_EL1, + offsetof(ARMCPUClass, isar.id_aa64mmfr1) }, + { HV_SYS_REG_ID_AA64MMFR2_EL1, + offsetof(ARMCPUClass, isar.id_aa64mmfr2) }, + { HV_SYS_REG_MIDR_EL1, + offsetof(ARMCPUClass, midr) }, }; hv_vcpu_t fd; hv_return_t r =3D HV_SUCCESS; @@ -485,9 +495,9 @@ bool hvf_arm_get_host_cpu_features(ARMCPUClass *acc, Er= ror **errp) } =20 for (i =3D 0; i < ARRAY_SIZE(regs); i++) { - r |=3D hv_vcpu_get_sys_reg(fd, regs[i].reg, regs[i].val); + uint64_t *p =3D (void *)acc + regs[i].offset; + r |=3D hv_vcpu_get_sys_reg(fd, regs[i].reg, p); } - r |=3D hv_vcpu_get_sys_reg(fd, HV_SYS_REG_MIDR_EL1, &acc->midr); r |=3D hv_vcpu_destroy(fd); =20 /* --=20 2.34.1