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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id h15-20020a170902680f00b00179e1f08634sm7908521plk.222.2022.12.30.08.24.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Dec 2022 08:24:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=FCTZpRyPbBo9WmB6fAZaWQQBPoQpNkMwPxIK0D5EQOY=; b=ynjNAc+9bfxmaHb42t88LRE154CXSVXcgRdLHVDmFU4qc9Dj+bQFPsHU7vlpGcAWbs WPZffvY5JePTBo34/Ij1f6bweQ8tH1cFUmq+ZsMNTPnJcBFJ0iLe6eyF7jtlYLHmLltM vs55Y9bZ0Q4ESUNcjRzOFwih3JrCKWbKYq/gimB6KCHflXxaPAorhwmrVhBZvGnf5ltW dNK3s+KNpDD65puS0lJt0/mEYbCb0vuFKI3CeMPQj9dbNrcM6Sn12SO+ZcTu6m9JY+9L PBWHbZ/pcSc0gUdPn7eznkW0kvN6diFfBwd7Fj1Yp2PoalCk/j76VEzkVgGWpsAshwqT uEgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=FCTZpRyPbBo9WmB6fAZaWQQBPoQpNkMwPxIK0D5EQOY=; b=DLs+B5R5RUbYYHggwaG5+r5xcUd0nPCOG84tAgtW81KOgBHi3R5Q4FdlpAqxVSnaVy GQ8xgnTz498TKPRL84XeKsHd1zulIaEne1F9cjr3ivdyTYrrVunay2DzobMhVSu305Q1 gLkvyGXM0XRxYXzvAPkkw6nDO4RFfpuY16L/JwcfLe6lYP6/I4bmRzt0J1mML058ReyH lHxw3nwMDu2YxMR/l6oxACt0CQ5axdeZAOtDsKnpx8Ap6+FawpLgBPiJksqLbuPZYqCe bwu10Kj2UN6o12kI53rTTWC7RSaMlMDn7FFALeiNdjk5azUTZpbs9BxtkC/dMChAzNQY 0vTw== X-Gm-Message-State: AFqh2kq+0rHSZTL7CvjgCjwQzCYYeJUfAX6ap41y11slPSMNOpHJpZCd pZR1D8X2IXf25YfrSI75h+rJpFi0jXBEobFS X-Google-Smtp-Source: AMrXdXspKz0jEqvq+jwUIDjKbN/uuTPhqfLteo9pI/qW/pSrAQWoB4L0t5fKwlnkrmtX/YO4jP/OFw== X-Received: by 2002:a17:902:9b90:b0:192:8cd1:5e79 with SMTP id y16-20020a1709029b9000b001928cd15e79mr13586421plp.41.1672417460341; Fri, 30 Dec 2022 08:24:20 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , "Edgar E . Iglesias" Subject: [PATCH] target/microblaze: Add gdbstub xml Date: Fri, 30 Dec 2022 08:24:19 -0800 Message-Id: <20221230162419.3106998-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672417485470000001 Mirroring the upstream gdb xml files, the two stack boundary registers are separated out. Signed-off-by: Richard Henderson Reviewed-by: Edgar E. Iglesias --- I did this thinking I would be fixing: TEST basic gdbstub support on microblaze Truncated register 35 in remote 'g' packet Traceback (most recent call last): File "/home/rth/qemu/src/tests/tcg/multiarch/gdbstub/sha1.py", line 71, in if gdb.parse_and_eval('$pc') =3D=3D 0: gdb.error: No registers. but in the end it turned out that the gdb-multiarch supplied by ubuntu 22.04 simply doesn't support MicroBlaze, as can be seen with the "set architecture" command within gdb. (I built gdb from source, to try and debug why this still wasn't working, only to find that it did. :-P) Alex, any way to modify our gdb test to fail gracefully here? Regardless, having proper xml for all of our targets seems like the correct way forward. r~ Cc: Alex Benn=C3=A9e Cc: Edgar E. Iglesias --- configs/targets/microblaze-linux-user.mak | 1 + configs/targets/microblaze-softmmu.mak | 1 + configs/targets/microblazeel-linux-user.mak | 1 + configs/targets/microblazeel-softmmu.mak | 1 + target/microblaze/cpu.h | 2 + target/microblaze/cpu.c | 7 ++- target/microblaze/gdbstub.c | 51 +++++++++++----- gdb-xml/microblaze-core.xml | 67 +++++++++++++++++++++ gdb-xml/microblaze-stack-protect.xml | 12 ++++ 9 files changed, 128 insertions(+), 15 deletions(-) create mode 100644 gdb-xml/microblaze-core.xml create mode 100644 gdb-xml/microblaze-stack-protect.xml diff --git a/configs/targets/microblaze-linux-user.mak b/configs/targets/mi= croblaze-linux-user.mak index 4249a37f65..0a2322c249 100644 --- a/configs/targets/microblaze-linux-user.mak +++ b/configs/targets/microblaze-linux-user.mak @@ -3,3 +3,4 @@ TARGET_SYSTBL_ABI=3Dcommon TARGET_SYSTBL=3Dsyscall.tbl TARGET_BIG_ENDIAN=3Dy TARGET_HAS_BFLT=3Dy +TARGET_XML_FILES=3Dgdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-pr= otect.xml diff --git a/configs/targets/microblaze-softmmu.mak b/configs/targets/micro= blaze-softmmu.mak index 8385e2d333..e84c0cc728 100644 --- a/configs/targets/microblaze-softmmu.mak +++ b/configs/targets/microblaze-softmmu.mak @@ -2,3 +2,4 @@ TARGET_ARCH=3Dmicroblaze TARGET_BIG_ENDIAN=3Dy TARGET_SUPPORTS_MTTCG=3Dy TARGET_NEED_FDT=3Dy +TARGET_XML_FILES=3Dgdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-pr= otect.xml diff --git a/configs/targets/microblazeel-linux-user.mak b/configs/targets/= microblazeel-linux-user.mak index d0e775d840..270743156a 100644 --- a/configs/targets/microblazeel-linux-user.mak +++ b/configs/targets/microblazeel-linux-user.mak @@ -2,3 +2,4 @@ TARGET_ARCH=3Dmicroblaze TARGET_SYSTBL_ABI=3Dcommon TARGET_SYSTBL=3Dsyscall.tbl TARGET_HAS_BFLT=3Dy +TARGET_XML_FILES=3Dgdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-pr= otect.xml diff --git a/configs/targets/microblazeel-softmmu.mak b/configs/targets/mic= roblazeel-softmmu.mak index af40391f2f..9b688036bd 100644 --- a/configs/targets/microblazeel-softmmu.mak +++ b/configs/targets/microblazeel-softmmu.mak @@ -1,3 +1,4 @@ TARGET_ARCH=3Dmicroblaze TARGET_SUPPORTS_MTTCG=3Dy TARGET_NEED_FDT=3Dy +TARGET_XML_FILES=3Dgdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-pr= otect.xml diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 1e84dd8f47..e541fbb0b3 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -367,6 +367,8 @@ hwaddr mb_cpu_get_phys_page_attrs_debug(CPUState *cpu, = vaddr addr, MemTxAttrs *attrs); int mb_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); +int mb_cpu_gdb_read_stack_protect(CPUArchState *cpu, GByteArray *buf, int = reg); +int mb_cpu_gdb_write_stack_protect(CPUArchState *cpu, uint8_t *buf, int re= g); =20 static inline uint32_t mb_cpu_read_msr(const CPUMBState *env) { diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 817681f9b2..a2d2f5c340 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -28,6 +28,7 @@ #include "qemu/module.h" #include "hw/qdev-properties.h" #include "exec/exec-all.h" +#include "exec/gdbstub.h" #include "fpu/softfloat-helpers.h" =20 static const struct { @@ -294,6 +295,9 @@ static void mb_cpu_initfn(Object *obj) CPUMBState *env =3D &cpu->env; =20 cpu_set_cpustate_pointers(cpu); + gdb_register_coprocessor(CPU(cpu), mb_cpu_gdb_read_stack_protect, + mb_cpu_gdb_write_stack_protect, 2, + "microblaze-stack-protect.xml", 0); =20 set_float_rounding_mode(float_round_nearest_even, &env->fp_status); =20 @@ -422,7 +426,8 @@ static void mb_cpu_class_init(ObjectClass *oc, void *da= ta) cc->sysemu_ops =3D &mb_sysemu_ops; #endif device_class_set_props(dc, mb_properties); - cc->gdb_num_core_regs =3D 32 + 27; + cc->gdb_num_core_regs =3D 32 + 25; + cc->gdb_core_xml_file =3D "microblaze-core.xml"; =20 cc->disas_set_info =3D mb_disas_set_info; cc->tcg_ops =3D &mb_tcg_ops; diff --git a/target/microblaze/gdbstub.c b/target/microblaze/gdbstub.c index 2e6e070051..8143fcae88 100644 --- a/target/microblaze/gdbstub.c +++ b/target/microblaze/gdbstub.c @@ -39,8 +39,11 @@ enum { GDB_PVR0 =3D 32 + 6, GDB_PVR11 =3D 32 + 17, GDB_EDR =3D 32 + 18, - GDB_SLR =3D 32 + 25, - GDB_SHR =3D 32 + 26, +}; + +enum { + GDB_SP_SHL, + GDB_SP_SHR, }; =20 int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) @@ -83,12 +86,6 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *m= em_buf, int n) case GDB_EDR: val =3D env->edr; break; - case GDB_SLR: - val =3D env->slr; - break; - case GDB_SHR: - val =3D env->shr; - break; default: /* Other SRegs aren't modeled, so report a value of 0 */ val =3D 0; @@ -97,6 +94,23 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *m= em_buf, int n) return gdb_get_reg32(mem_buf, val); } =20 +int mb_cpu_gdb_read_stack_protect(CPUMBState *env, GByteArray *mem_buf, in= t n) +{ + uint32_t val; + + switch (n) { + case GDB_SP_SHL: + val =3D env->slr; + break; + case GDB_SP_SHR: + val =3D env->shr; + break; + default: + return 0; + } + return gdb_get_reg32(mem_buf, val); +} + int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { MicroBlazeCPU *cpu =3D MICROBLAZE_CPU(cs); @@ -135,12 +149,21 @@ int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *= mem_buf, int n) case GDB_EDR: env->edr =3D tmp; break; - case GDB_SLR: - env->slr =3D tmp; - break; - case GDB_SHR: - env->shr =3D tmp; - break; + } + return 4; +} + +int mb_cpu_gdb_write_stack_protect(CPUMBState *env, uint8_t *mem_buf, int = n) +{ + switch (n) { + case GDB_SP_SHL: + env->slr =3D ldl_p(mem_buf); + break; + case GDB_SP_SHR: + env->shr =3D ldl_p(mem_buf); + break; + default: + return 0; } return 4; } diff --git a/gdb-xml/microblaze-core.xml b/gdb-xml/microblaze-core.xml new file mode 100644 index 0000000000..becf77c89c --- /dev/null +++ b/gdb-xml/microblaze-core.xml @@ -0,0 +1,67 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/gdb-xml/microblaze-stack-protect.xml b/gdb-xml/microblaze-stac= k-protect.xml new file mode 100644 index 0000000000..997301e8a2 --- /dev/null +++ b/gdb-xml/microblaze-stack-protect.xml @@ -0,0 +1,12 @@ + + + + + + + + --=20 2.34.1