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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1y/tXWdTWI0vCwq66Bd7dAixKbHX6fB2Vsdpuh+SVC4=; b=HxksPY9G2ZbnBY77BTiepwj81VIl2hBLXqFuzerP3bHMeHX1U4C0JQ5MXelVhol/3L 755Re1XSpyUSQ3XqaAKkYoBz5zG5fCJAiqg2mBN7ZV7ODrTsYCG6evS0CcZbt6jCVzuX 07Ol1H+7VJuikty2a+oaIP7sZSTpuCgvyarjwVBQ7KZRCkqIWZaMmi9R8SBJ2zdawBsi wjs/UwINaS0+HFoBexxQvjiJRAeny3uZlUVIRDO1ST7xKMT5E+aejn5PfOHb1marNlSj BX4h0bwWRsojt/XBvYNfkm4LQOmjgiKXQ0/YLdH6REFQgNw9rU90xU68zmv4/ywTSTFK Kkmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1y/tXWdTWI0vCwq66Bd7dAixKbHX6fB2Vsdpuh+SVC4=; b=nsIeD+pdXkP13us5TV25qJT9qsej7dVL7/Yg6k0zbT7dM++x94WGrYX7TLtaRRiFLg XC29mgV2/Dc5FT0i2XLR6tibTBnMsXJv7G4LM8kJ4TgP484UKVD3aOeSJdNCcbDREg8C SWsOyzXw6uchxcJP9GRjig8s6k7ka5GkLdL5h+pehsMJrBfHsnnvHwBAR8hGdnF0S1P4 8W+Oi8kicNBd3GIlHTuEaXXXTH+E8j/6AFDJwRLJIHtC7sFJjJ2D67y0wy5bXwvvYTzY 6yBZ8Gb5xAH4PuuXgGY6SBkVRTfLKB8WO3Twujyt0kJtHEnOXxg5sxCMxXdbaZpKZNDn Kqrg== X-Gm-Message-State: AFqh2krVkGiNTwW7DR5s2aoZT+cRs93FVdtuW39E1qIwhQRcR1xnuM9U AMlKA482UPKvodgPDBXASHAJAfKVqCoe4cUj X-Google-Smtp-Source: AMrXdXvmnj4r4ZC4aJlQPeTnD1NsW3Ry5LamEAAQk/xve8tcUZhpOk6+RsSkySEfNgLw16GQEVbZAQ== X-Received: by 2002:a17:902:d2cd:b0:192:9c7a:e60c with SMTP id n13-20020a170902d2cd00b001929c7ae60cmr6953086plc.48.1672358551406; Thu, 29 Dec 2022 16:02:31 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis Subject: [PULL 09/47] target/riscv: Use QEMU_IOTHREAD_LOCK_GUARD in riscv_cpu_update_mip Date: Thu, 29 Dec 2022 16:01:43 -0800 Message-Id: <20221230000221.2764875-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359361623000001 Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson --- target/riscv/cpu_helper.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 278d163803..241d06bab8 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -610,7 +610,6 @@ uint64_t riscv_cpu_update_mip(RISCVCPU *cpu, uint64_t m= ask, uint64_t value) CPURISCVState *env =3D &cpu->env; CPUState *cs =3D CPU(cpu); uint64_t gein, vsgein =3D 0, vstip =3D 0, old =3D env->mip; - bool locked =3D false; =20 if (riscv_cpu_virt_enabled(env)) { gein =3D get_field(env->hstatus, HSTATUS_VGEIN); @@ -621,10 +620,7 @@ uint64_t riscv_cpu_update_mip(RISCVCPU *cpu, uint64_t = mask, uint64_t value) mask =3D ((mask =3D=3D MIP_VSTIP) && env->vstime_irq) ? 0 : mask; vstip =3D env->vstime_irq ? MIP_VSTIP : 0; =20 - if (!qemu_mutex_iothread_locked()) { - locked =3D true; - qemu_mutex_lock_iothread(); - } + QEMU_IOTHREAD_LOCK_GUARD(); =20 env->mip =3D (env->mip & ~mask) | (value & mask); =20 @@ -634,10 +630,6 @@ uint64_t riscv_cpu_update_mip(RISCVCPU *cpu, uint64_t = mask, uint64_t value) cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); } =20 - if (locked) { - qemu_mutex_unlock_iothread(); - } - return old; } =20 --=20 2.34.1