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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=66qqJnLKSHXJyhZyhU1uJ6YcOFA+1qEwuEvMIZnPNic=; b=tgKbNwyXSUmkJRb3BkugJQoJwjammc4dkuZxiUBcB7VgmfgKyjMsoLHVCb3D10Kp7m pZZbT0zkph2o7owonZAOXKZcZ3Kyds58AQM2wTcrHn6ng55cIP6eDvLuebuvu0lfY4b5 +0MQPMFjLoDKO/Lu30IGou/P5TECWuo+sUgydjpSs7V78+VxvdALhVJIa86rzm8RhCoU IspMOHMYiVUv4dUaPEeDiFNLV0IkveHIKP3URgE3UXENQee3EN4nOM+fBT5Ev07AFH0g PIpTCBxkmZdxDS3HNJhJfZ7MDPvql1V4vnimdcfuRaV56+8M0bIy6X+fueNvt5kuFXPY J1Sw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=66qqJnLKSHXJyhZyhU1uJ6YcOFA+1qEwuEvMIZnPNic=; b=gsMAIOWOtQg+5zk5xaNHXbUxy3Soqiwkn5LdXgsPtbEDNm25k6AoQyQH/15cdfFVp8 RAIcTQIcVDE0GU0SG7/civKmQTaJLCNPOtpDo7n+m1/SrANbDLy/FzVMX5KQPzDQRRrP XLLKZYnawkrqdEHCfaGHt/YTWNSzXwpQLJFscPshO/1jLAlvQdmyL7mDPST6WwyFwsZl OreD2h2i2CpaWUsqwDnkyTRoGHhKmJRcdXQTBUmX7u65Msm4dSBRrH8jg8gnDNAH0AjP LNMdU3s8uMqw1whGSf+7UZH0NNyaxxMhxmvYPAidIwd/IXdje0atJ4lGFJKP1s3uzoug ac/g== X-Gm-Message-State: AFqh2kpOQeX0RF2g9lBPBgkgAUK39jFuG+NRMFBp7FjaoKksFK0wnAjx cwOcylFxfWTuS3GEI91Qy7Kdfil3oE2zXDva X-Google-Smtp-Source: AMrXdXtv65GWk/1C/zFhX0iIKkhfkriRqdGIsLX29EPXXqldUNg17KildP7mk3p96xkHCTdE1AndlA== X-Received: by 2002:a17:902:e84d:b0:192:8824:e516 with SMTP id t13-20020a170902e84d00b001928824e516mr16561788plg.51.1672358543977; Thu, 29 Dec 2022 16:02:23 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Mark Cave-Ayland , Fabiano Rosas Subject: [PULL 01/47] tcg: convert tcg/README to rst Date: Thu, 29 Dec 2022 16:01:35 -0800 Message-Id: <20221230000221.2764875-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359299393000006 Content-Type: text/plain; charset="utf-8" From: Mark Cave-Ayland Convert tcg/README to rst and move it to docs/devel as a new "TCG Intermedi= ate Representation" page. There are a few minor changes to improve the aesthetic of the final output which are as follows: - Rename the title from "Tiny Code Generator - Fabrice Bellard" to "TCG Intermediate Representation" - Remove the section numbering - Add the missing parameters to the ssadd_vec operations in the "Host vector operations" section - Change the path to the Atomic Operations document to use a proper reference - Replace tcg/README in tcg.rst with a proper reference to the new docume= nt Signed-off-by: Mark Cave-Ayland Reviewed-by: Fabiano Rosas Message-Id: <20221130100434.64207-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Richard Henderson --- docs/devel/atomics.rst | 2 + docs/devel/index-tcg.rst | 1 + docs/devel/tcg-ops.rst | 941 +++++++++++++++++++++++++++++++++++++++ docs/devel/tcg.rst | 2 +- tcg/README | 784 -------------------------------- 5 files changed, 945 insertions(+), 785 deletions(-) create mode 100644 docs/devel/tcg-ops.rst delete mode 100644 tcg/README diff --git a/docs/devel/atomics.rst b/docs/devel/atomics.rst index 52baa0736d..7957310071 100644 --- a/docs/devel/atomics.rst +++ b/docs/devel/atomics.rst @@ -1,3 +1,5 @@ +.. _atomics-ref: + =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D Atomic operations in QEMU =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D diff --git a/docs/devel/index-tcg.rst b/docs/devel/index-tcg.rst index 7b9760b26f..b44ff8b5a4 100644 --- a/docs/devel/index-tcg.rst +++ b/docs/devel/index-tcg.rst @@ -9,6 +9,7 @@ are only implementing things for HW accelerated hypervisors. :maxdepth: 2 =20 tcg + tcg-ops decodetree multi-thread-tcg tcg-icount diff --git a/docs/devel/tcg-ops.rst b/docs/devel/tcg-ops.rst new file mode 100644 index 0000000000..9adc0c9b6c --- /dev/null +++ b/docs/devel/tcg-ops.rst @@ -0,0 +1,941 @@ +.. _tcg-ops-ref: + +******************************* +TCG Intermediate Representation +******************************* + +Introduction +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +TCG (Tiny Code Generator) began as a generic backend for a C +compiler. It was simplified to be used in QEMU. It also has its roots +in the QOP code generator written by Paul Brook. + +Definitions +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +TCG receives RISC-like *TCG ops* and performs some optimizations on them, +including liveness analysis and trivial constant expression +evaluation. TCG ops are then implemented in the host CPU back end, +also known as the TCG target. + +The TCG *target* is the architecture for which we generate the +code. It is of course not the same as the "target" of QEMU which is +the emulated architecture. As TCG started as a generic C backend used +for cross compiling, it is assumed that the TCG target is different +from the host, although it is never the case for QEMU. + +In this document, we use *guest* to specify what architecture we are +emulating; *target* always means the TCG target, the machine on which +we are running QEMU. + +A TCG *function* corresponds to a QEMU Translated Block (TB). + +A TCG *temporary* is a variable only live in a basic block. Temporaries ar= e allocated explicitly in each function. + +A TCG *local temporary* is a variable only live in a function. Local tempo= raries are allocated explicitly in each function. + +A TCG *global* is a variable which is live in all the functions +(equivalent of a C global variable). They are defined before the +functions defined. A TCG global can be a memory location (e.g. a QEMU +CPU register), a fixed host register (e.g. the QEMU CPU state pointer) +or a memory location which is stored in a register outside QEMU TBs +(not implemented yet). + +A TCG *basic block* corresponds to a list of instructions terminated +by a branch instruction. + +An operation with *undefined behavior* may result in a crash. + +An operation with *unspecified behavior* shall not crash. However, +the result may be one of several possibilities so may be considered +an *undefined result*. + +Intermediate representation +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D + +Introduction +------------ + +TCG instructions operate on variables which are temporaries, local +temporaries or globals. TCG instructions and variables are strongly +typed. Two types are supported: 32 bit integers and 64 bit +integers. Pointers are defined as an alias to 32 bit or 64 bit +integers depending on the TCG target word size. + +Each instruction has a fixed number of output variable operands, input +variable operands and always constant operands. + +The notable exception is the call instruction which has a variable +number of outputs and inputs. + +In the textual form, output operands usually come first, followed by +input operands, followed by constant operands. The output type is +included in the instruction name. Constants are prefixed with a '$'. + +.. code-block:: none + + add_i32 t0, t1, t2 /* (t0 <- t1 + t2) */ + + +Assumptions +----------- + +Basic blocks +^^^^^^^^^^^^ + +* Basic blocks end after branches (e.g. brcond_i32 instruction), + goto_tb and exit_tb instructions. + +* Basic blocks start after the end of a previous basic block, or at a + set_label instruction. + +After the end of a basic block, the content of temporaries is +destroyed, but local temporaries and globals are preserved. + +Floating point types +^^^^^^^^^^^^^^^^^^^^ + +* Floating point types are not supported yet + +Pointers +^^^^^^^^ + +* Depending on the TCG target, pointer size is 32 bit or 64 + bit. The type ``TCG_TYPE_PTR`` is an alias to ``TCG_TYPE_I32`` or + ``TCG_TYPE_I64``. + +Helpers +^^^^^^^ + +* Using the tcg_gen_helper_x_y it is possible to call any function + taking i32, i64 or pointer types. By default, before calling a helper, + all globals are stored at their canonical location and it is assumed + that the function can modify them. By default, the helper is allowed to + modify the CPU state or raise an exception. + + This can be overridden using the following function modifiers: + + - ``TCG_CALL_NO_READ_GLOBALS`` means that the helper does not read globa= ls, + either directly or via an exception. They will not be saved to their + canonical locations before calling the helper. + + - ``TCG_CALL_NO_WRITE_GLOBALS`` means that the helper does not modify an= y globals. + They will only be saved to their canonical location before calling hel= pers, + but they won't be reloaded afterwards. + + - ``TCG_CALL_NO_SIDE_EFFECTS`` means that the call to the function is re= moved if + the return value is not used. + + Note that ``TCG_CALL_NO_READ_GLOBALS`` implies ``TCG_CALL_NO_WRITE_GLOBA= LS``. + + On some TCG targets (e.g. x86), several calling conventions are + supported. + +Branches +^^^^^^^^ + +* Use the instruction 'br' to jump to a label. + +Code Optimizations +------------------ + +When generating instructions, you can count on at least the following +optimizations: + +- Single instructions are simplified, e.g. + + .. code-block:: none + + and_i32 t0, t0, $0xffffffff + + is suppressed. + +- A liveness analysis is done at the basic block level. The + information is used to suppress moves from a dead variable to + another one. It is also used to remove instructions which compute + dead results. The later is especially useful for condition code + optimization in QEMU. + + In the following example: + + .. code-block:: none + + add_i32 t0, t1, t2 + add_i32 t0, t0, $1 + mov_i32 t0, $1 + + only the last instruction is kept. + + +Instruction Reference +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +Function call +------------- + +.. list-table:: + + * - call ** ** ptr + + - | call function 'ptr' (pointer type) + | + | ** optional 32 bit or 64 bit return value + | ** optional 32 bit or 64 bit parameters + +Jumps/Labels +------------ + +.. list-table:: + + * - set_label $label + + - | Define label 'label' at the current program point. + + * - br $label + + - | Jump to label. + + * - brcond_i32/i64 *t0*, *t1*, *cond*, *label* + + - | Conditional jump if *t0* *cond* *t1* is true. *cond* can be: + | + | ``TCG_COND_EQ`` + | ``TCG_COND_NE`` + | ``TCG_COND_LT /* signed */`` + | ``TCG_COND_GE /* signed */`` + | ``TCG_COND_LE /* signed */`` + | ``TCG_COND_GT /* signed */`` + | ``TCG_COND_LTU /* unsigned */`` + | ``TCG_COND_GEU /* unsigned */`` + | ``TCG_COND_LEU /* unsigned */`` + | ``TCG_COND_GTU /* unsigned */`` + +Arithmetic +---------- + +.. list-table:: + + * - add_i32/i64 *t0*, *t1*, *t2* + + - | *t0* =3D *t1* + *t2* + + * - sub_i32/i64 *t0*, *t1*, *t2* + + - | *t0* =3D *t1* - *t2* + + * - neg_i32/i64 *t0*, *t1* + + - | *t0* =3D -*t1* (two's complement) + + * - mul_i32/i64 *t0*, *t1*, *t2* + + - | *t0* =3D *t1* * *t2* + + * - div_i32/i64 *t0*, *t1*, *t2* + + - | *t0* =3D *t1* / *t2* (signed) + | Undefined behavior if division by zero or overflow. + + * - divu_i32/i64 *t0*, *t1*, *t2* + + - | *t0* =3D *t1* / *t2* (unsigned) + | Undefined behavior if division by zero. + + * - rem_i32/i64 *t0*, *t1*, *t2* + + - | *t0* =3D *t1* % *t2* (signed) + | Undefined behavior if division by zero or overflow. + + * - remu_i32/i64 *t0*, *t1*, *t2* + + - | *t0* =3D *t1* % *t2* (unsigned) + | Undefined behavior if division by zero. + + +Logical +------- + +.. list-table:: + + * - and_i32/i64 *t0*, *t1*, *t2* + + - | *t0* =3D *t1* & *t2* + + * - or_i32/i64 *t0*, *t1*, *t2* + + - | *t0* =3D *t1* | *t2* + + * - xor_i32/i64 *t0*, *t1*, *t2* + + - | *t0* =3D *t1* ^ *t2* + + * - not_i32/i64 *t0*, *t1* + + - | *t0* =3D ~\ *t1* + + * - andc_i32/i64 *t0*, *t1*, *t2* + + - | *t0* =3D *t1* & ~\ *t2* + + * - eqv_i32/i64 *t0*, *t1*, *t2* + + - | *t0* =3D ~(*t1* ^ *t2*), or equivalently, *t0* =3D *t1* ^ ~\ *t2* + + * - nand_i32/i64 *t0*, *t1*, *t2* + + - | *t0* =3D ~(*t1* & *t2*) + + * - nor_i32/i64 *t0*, *t1*, *t2* + + - | *t0* =3D ~(*t1* | *t2*) + + * - orc_i32/i64 *t0*, *t1*, *t2* + + - | *t0* =3D *t1* | ~\ *t2* + + * - clz_i32/i64 *t0*, *t1*, *t2* + + - | *t0* =3D *t1* ? clz(*t1*) : *t2* + + * - ctz_i32/i64 *t0*, *t1*, *t2* + + - | *t0* =3D *t1* ? ctz(*t1*) : *t2* + + * - ctpop_i32/i64 *t0*, *t1* + + - | *t0* =3D number of bits set in *t1* + | + | With *ctpop* short for "count population", matching + | the function name used in ``include/qemu/host-utils.h``. + + +Shifts/Rotates +-------------- + +.. list-table:: + + * - shl_i32/i64 *t0*, *t1*, *t2* + + - | *t0* =3D *t1* << *t2* + | Unspecified behavior if *t2* < 0 or *t2* >=3D 32 (resp 64) + + * - shr_i32/i64 *t0*, *t1*, *t2* + + - | *t0* =3D *t1* >> *t2* (unsigned) + | Unspecified behavior if *t2* < 0 or *t2* >=3D 32 (resp 64) + + * - sar_i32/i64 *t0*, *t1*, *t2* + + - | *t0* =3D *t1* >> *t2* (signed) + | Unspecified behavior if *t2* < 0 or *t2* >=3D 32 (resp 64) + + * - rotl_i32/i64 *t0*, *t1*, *t2* + + - | Rotation of *t2* bits to the left + | Unspecified behavior if *t2* < 0 or *t2* >=3D 32 (resp 64) + + * - rotr_i32/i64 *t0*, *t1*, *t2* + + - | Rotation of *t2* bits to the right. + | Unspecified behavior if *t2* < 0 or *t2* >=3D 32 (resp 64) + + +Misc +---- + +.. list-table:: + + * - mov_i32/i64 *t0*, *t1* + + - | *t0* =3D *t1* + | Move *t1* to *t0* (both operands must have the same type). + + * - ext8s_i32/i64 *t0*, *t1* + + ext8u_i32/i64 *t0*, *t1* + + ext16s_i32/i64 *t0*, *t1* + + ext16u_i32/i64 *t0*, *t1* + + ext32s_i64 *t0*, *t1* + + ext32u_i64 *t0*, *t1* + + - | 8, 16 or 32 bit sign/zero extension (both operands must have the = same type) + + * - bswap16_i32/i64 *t0*, *t1*, *flags* + + - | 16 bit byte swap on the low bits of a 32/64 bit input. + | + | If *flags* & ``TCG_BSWAP_IZ``, then *t1* is known to be zero-exte= nded from bit 15. + | If *flags* & ``TCG_BSWAP_OZ``, then *t0* will be zero-extended fr= om bit 15. + | If *flags* & ``TCG_BSWAP_OS``, then *t0* will be sign-extended fr= om bit 15. + | + | If neither ``TCG_BSWAP_OZ`` nor ``TCG_BSWAP_OS`` are set, then th= e bits of *t0* above bit 15 may contain any value. + + * - bswap32_i64 *t0*, *t1*, *flags* + + - | 32 bit byte swap on a 64-bit value. The flags are the same as fo= r bswap16, + except they apply from bit 31 instead of bit 15. + + * - bswap32_i32 *t0*, *t1*, *flags* + + bswap64_i64 *t0*, *t1*, *flags* + + - | 32/64 bit byte swap. The flags are ignored, but still present + for consistency with the other bswap opcodes. + + * - discard_i32/i64 *t0* + + - | Indicate that the value of *t0* won't be used later. It is useful= to + force dead code elimination. + + * - deposit_i32/i64 *dest*, *t1*, *t2*, *pos*, *len* + + - | Deposit *t2* as a bitfield into *t1*, placing the result in *dest= *. + | + | The bitfield is described by *pos*/*len*, which are immediate val= ues: + | + | *len* - the length of the bitfield + | *pos* - the position of the first bit, counting from the LSB + | + | For example, "deposit_i32 dest, t1, t2, 8, 4" indicates a 4-bit f= ield + at bit 8. This operation would be equivalent to + | + | *dest* =3D (*t1* & ~0x0f00) | ((*t2* << 8) & 0x0f00) + + * - extract_i32/i64 *dest*, *t1*, *pos*, *len* + + sextract_i32/i64 *dest*, *t1*, *pos*, *len* + + - | Extract a bitfield from *t1*, placing the result in *dest*. + | + | The bitfield is described by *pos*/*len*, which are immediate val= ues, + as above for deposit. For extract_*, the result will be extended + to the left with zeros; for sextract_*, the result will be extend= ed + to the left with copies of the bitfield sign bit at *pos* + *len*= - 1. + | + | For example, "sextract_i32 dest, t1, 8, 4" indicates a 4-bit field + at bit 8. This operation would be equivalent to + | + | *dest* =3D (*t1* << 20) >> 28 + | + | (using an arithmetic right shift). + + * - extract2_i32/i64 *dest*, *t1*, *t2*, *pos* + + - | For N =3D {32,64}, extract an N-bit quantity from the concatenati= on + of *t2*:*t1*, beginning at *pos*. The tcg_gen_extract2_{i32,i64} = expander + accepts 0 <=3D *pos* <=3D N as inputs. The backend code generator= will + not see either 0 or N as inputs for these opcodes. + + * - extrl_i64_i32 *t0*, *t1* + + - | For 64-bit hosts only, extract the low 32-bits of input *t1* and = place it + into 32-bit output *t0*. Depending on the host, this may be a si= mple move, + or may require additional canonicalization. + + * - extrh_i64_i32 *t0*, *t1* + + - | For 64-bit hosts only, extract the high 32-bits of input *t1* and= place it + into 32-bit output *t0*. Depending on the host, this may be a si= mple shift, + or may require additional canonicalization. + + +Conditional moves +----------------- + +.. list-table:: + + * - setcond_i32/i64 *dest*, *t1*, *t2*, *cond* + + - | *dest* =3D (*t1* *cond* *t2*) + | + | Set *dest* to 1 if (*t1* *cond* *t2*) is true, otherwise set to 0. + + * - movcond_i32/i64 *dest*, *c1*, *c2*, *v1*, *v2*, *cond* + + - | *dest* =3D (*c1* *cond* *c2* ? *v1* : *v2*) + | + | Set *dest* to *v1* if (*c1* *cond* *c2*) is true, otherwise set t= o *v2*. + + +Type conversions +---------------- + +.. list-table:: + + * - ext_i32_i64 *t0*, *t1* + + - | Convert *t1* (32 bit) to *t0* (64 bit) and does sign extension + + * - extu_i32_i64 *t0*, *t1* + + - | Convert *t1* (32 bit) to *t0* (64 bit) and does zero extension + + * - trunc_i64_i32 *t0*, *t1* + + - | Truncate *t1* (64 bit) to *t0* (32 bit) + + * - concat_i32_i64 *t0*, *t1*, *t2* + + - | Construct *t0* (64-bit) taking the low half from *t1* (32 bit) an= d the high half + from *t2* (32 bit). + + * - concat32_i64 *t0*, *t1*, *t2* + + - | Construct *t0* (64-bit) taking the low half from *t1* (64 bit) an= d the high half + from *t2* (64 bit). + + +Load/Store +---------- + +.. list-table:: + + * - ld_i32/i64 *t0*, *t1*, *offset* + + ld8s_i32/i64 *t0*, *t1*, *offset* + + ld8u_i32/i64 *t0*, *t1*, *offset* + + ld16s_i32/i64 *t0*, *t1*, *offset* + + ld16u_i32/i64 *t0*, *t1*, *offset* + + ld32s_i64 t0, *t1*, *offset* + + ld32u_i64 t0, *t1*, *offset* + + - | *t0* =3D read(*t1* + *offset*) + | + | Load 8, 16, 32 or 64 bits with or without sign extension from hos= t memory. + *offset* must be a constant. + + * - st_i32/i64 *t0*, *t1*, *offset* + + st8_i32/i64 *t0*, *t1*, *offset* + + st16_i32/i64 *t0*, *t1*, *offset* + + st32_i64 *t0*, *t1*, *offset* + + - | write(*t0*, *t1* + *offset*) + | + | Write 8, 16, 32 or 64 bits to host memory. + +All this opcodes assume that the pointed host memory doesn't correspond +to a global. In the latter case the behaviour is unpredictable. + + +Multiword arithmetic support +---------------------------- + +.. list-table:: + + * - add2_i32/i64 *t0_low*, *t0_high*, *t1_low*, *t1_high*, *t2_low*, *t= 2_high* + + sub2_i32/i64 *t0_low*, *t0_high*, *t1_low*, *t1_high*, *t2_low*, *t= 2_high* + + - | Similar to add/sub, except that the double-word inputs *t1* and *= t2* are + formed from two single-word arguments, and the double-word output= *t0* + is returned in two single-word outputs. + + * - mulu2_i32/i64 *t0_low*, *t0_high*, *t1*, *t2* + + - | Similar to mul, except two unsigned inputs *t1* and *t2* yielding= the full + double-word product *t0*. The latter is returned in two single-wo= rd outputs. + + * - muls2_i32/i64 *t0_low*, *t0_high*, *t1*, *t2* + + - | Similar to mulu2, except the two inputs *t1* and *t2* are signed. + + * - mulsh_i32/i64 *t0*, *t1*, *t2* + + muluh_i32/i64 *t0*, *t1*, *t2* + + - | Provide the high part of a signed or unsigned multiply, respectiv= ely. + | + | If mulu2/muls2 are not provided by the backend, the tcg-op genera= tor + can obtain the same results by emitting a pair of opcodes, mul + = muluh/mulsh. + + +Memory Barrier support +---------------------- + +.. list-table:: + + * - mb *<$arg>* + + - | Generate a target memory barrier instruction to ensure memory ord= ering + as being enforced by a corresponding guest memory barrier instru= ction. + | + | The ordering enforced by the backend may be stricter than the ord= ering + required by the guest. It cannot be weaker. This opcode takes a c= onstant + argument which is required to generate the appropriate barrier + instruction. The backend should take care to emit the target barr= ier + instruction only when necessary i.e., for SMP guests and when MTT= CG is + enabled. + | + | The guest translators should generate this opcode for all guest i= nstructions + which have ordering side effects. + | + | Please see :ref:`atomics-ref` for more information on memory barr= iers. + + +64-bit guest on 32-bit host support +----------------------------------- + +The following opcodes are internal to TCG. Thus they are to be implemente= d by +32-bit host code generators, but are not to be emitted by guest translator= s. +They are emitted as needed by inline functions within ``tcg-op.h``. + +.. list-table:: + + * - brcond2_i32 *t0_low*, *t0_high*, *t1_low*, *t1_high*, *cond*, *labe= l* + + - | Similar to brcond, except that the 64-bit values *t0* and *t1* + are formed from two 32-bit arguments. + + * - setcond2_i32 *dest*, *t1_low*, *t1_high*, *t2_low*, *t2_high*, *con= d* + + - | Similar to setcond, except that the 64-bit values *t1* and *t2* a= re + formed from two 32-bit arguments. The result is a 32-bit value. + + +QEMU specific operations +------------------------ + +.. list-table:: + + * - exit_tb *t0* + + - | Exit the current TB and return the value *t0* (word type). + + * - goto_tb *index* + + - | Exit the current TB and jump to the TB index *index* (constant) i= f the + current TB was linked to this TB. Otherwise execute the next + instructions. Only indices 0 and 1 are valid and tcg_gen_goto_tb = may be issued + at most once with each slot index per TB. + + * - lookup_and_goto_ptr *tb_addr* + + - | Look up a TB address *tb_addr* and jump to it if valid. If not va= lid, + jump to the TCG epilogue to go back to the exec loop. + | + | This operation is optional. If the TCG backend does not implement= the + goto_ptr opcode, emitting this op is equivalent to emitting exit_= tb(0). + + * - qemu_ld_i32/i64 *t0*, *t1*, *flags*, *memidx* + + qemu_st_i32/i64 *t0*, *t1*, *flags*, *memidx* + + qemu_st8_i32 *t0*, *t1*, *flags*, *memidx* + + - | Load data at the guest address *t1* into *t0*, or store data in *= t0* at guest + address *t1*. The _i32/_i64 size applies to the size of the inpu= t/output + register *t0* only. The address *t1* is always sized according t= o the guest, + and the width of the memory operation is controlled by *flags*. + | + | Both *t0* and *t1* may be split into little-endian ordered pairs = of registers + if dealing with 64-bit quantities on a 32-bit host. + | + | The *memidx* selects the qemu tlb index to use (e.g. user or kern= el access). + The flags are the MemOp bits, selecting the sign, width, and endi= anness + of the memory access. + | + | For a 32-bit host, qemu_ld/st_i64 is guaranteed to only be used w= ith a + 64-bit memory access specified in *flags*. + | + | For i386, qemu_st8_i32 is exactly like qemu_st_i32, except the si= ze of + the memory operation is known to be 8-bit. This allows the backe= nd to + provide a different set of register constraints. + + +Host vector operations +---------------------- + +All of the vector ops have two parameters, ``TCGOP_VECL`` & ``TCGOP_VECE``. +The former specifies the length of the vector in log2 64-bit units; the +latter specifies the length of the element (if applicable) in log2 8-bit u= nits. +E.g. VECL =3D 1 -> 64 << 1 -> v128, and VECE =3D 2 -> 1 << 2 -> i32. + +.. list-table:: + + * - mov_vec *v0*, *v1* + ld_vec *v0*, *t1* + st_vec *v0*, *t1* + + - | Move, load and store. + + * - dup_vec *v0*, *r1* + + - | Duplicate the low N bits of *r1* into VECL/VECE copies across *v0= *. + + * - dupi_vec *v0*, *c* + + - | Similarly, for a constant. + | Smaller values will be replicated to host register size by the ex= panders. + + * - dup2_vec *v0*, *r1*, *r2* + + - | Duplicate *r2*:*r1* into VECL/64 copies across *v0*. This opcode = is + only present for 32-bit hosts. + + * - add_vec *v0*, *v1*, *v2* + + - | *v0* =3D *v1* + *v2*, in elements across the vector. + + * - sub_vec *v0*, *v1*, *v2* + + - | Similarly, *v0* =3D *v1* - *v2*. + + * - mul_vec *v0*, *v1*, *v2* + + - | Similarly, *v0* =3D *v1* * *v2*. + + * - neg_vec *v0*, *v1* + + - | Similarly, *v0* =3D -*v1*. + + * - abs_vec *v0*, *v1* + + - | Similarly, *v0* =3D *v1* < 0 ? -*v1* : *v1*, in elements across t= he vector. + + * - smin_vec *v0*, *v1*, *v2* + + umin_vec *v0*, *v1*, *v2* + + - | Similarly, *v0* =3D MIN(*v1*, *v2*), for signed and unsigned elem= ent types. + + * - smax_vec *v0*, *v1*, *v2* + + umax_vec *v0*, *v1*, *v2* + + - | Similarly, *v0* =3D MAX(*v1*, *v2*), for signed and unsigned elem= ent types. + + * - ssadd_vec *v0*, *v1*, *v2* + + sssub_vec *v0*, *v1*, *v2* + + usadd_vec *v0*, *v1*, *v2* + + ussub_vec *v0*, *v1*, *v2* + + - | Signed and unsigned saturating addition and subtraction. + | + | If the true result is not representable within the element type, = the + element is set to the minimum or maximum value for the type. + + * - and_vec *v0*, *v1*, *v2* + + or_vec *v0*, *v1*, *v2* + + xor_vec *v0*, *v1*, *v2* + + andc_vec *v0*, *v1*, *v2* + + orc_vec *v0*, *v1*, *v2* + + not_vec *v0*, *v1* + + - | Similarly, logical operations with and without complement. + | + | Note that VECE is unused. + + * - shli_vec *v0*, *v1*, *i2* + + shls_vec *v0*, *v1*, *s2* + + - | Shift all elements from v1 by a scalar *i2*/*s2*. I.e. + + .. code-block:: c + + for (i =3D 0; i < VECL/VECE; ++i) { + v0[i] =3D v1[i] << s2; + } + + * - shri_vec *v0*, *v1*, *i2* + + sari_vec *v0*, *v1*, *i2* + + rotli_vec *v0*, *v1*, *i2* + + shrs_vec *v0*, *v1*, *s2* + + sars_vec *v0*, *v1*, *s2* + + - | Similarly for logical and arithmetic right shift, and left rotate. + + * - shlv_vec *v0*, *v1*, *v2* + + - | Shift elements from *v1* by elements from *v2*. I.e. + + .. code-block:: c + + for (i =3D 0; i < VECL/VECE; ++i) { + v0[i] =3D v1[i] << v2[i]; + } + + * - shrv_vec *v0*, *v1*, *v2* + + sarv_vec *v0*, *v1*, *v2* + + rotlv_vec *v0*, *v1*, *v2* + + rotrv_vec *v0*, *v1*, *v2* + + - | Similarly for logical and arithmetic right shift, and rotates. + + * - cmp_vec *v0*, *v1*, *v2*, *cond* + + - | Compare vectors by element, storing -1 for true and 0 for false. + + * - bitsel_vec *v0*, *v1*, *v2*, *v3* + + - | Bitwise select, *v0* =3D (*v2* & *v1*) | (*v3* & ~\ *v1*), across= the entire vector. + + * - cmpsel_vec *v0*, *c1*, *c2*, *v3*, *v4*, *cond* + + - | Select elements based on comparison results: + + .. code-block:: c + + for (i =3D 0; i < n; ++i) { + v0[i] =3D (c1[i] cond c2[i]) ? v3[i] : v4[i]. + } + +**Note 1**: Some shortcuts are defined when the last operand is known to be +a constant (e.g. addi for add, movi for mov). + +**Note 2**: When using TCG, the opcodes must never be generated directly +as some of them may not be available as "real" opcodes. Always use the +function tcg_gen_xxx(args). + + +Backend +=3D=3D=3D=3D=3D=3D=3D + +``tcg-target.h`` contains the target specific definitions. ``tcg-target.c.= inc`` +contains the target specific code; it is #included by ``tcg/tcg.c``, rather +than being a standalone C file. + +Assumptions +----------- + +The target word size (``TCG_TARGET_REG_BITS``) is expected to be 32 bit or +64 bit. It is expected that the pointer has the same size as the word. + +On a 32 bit target, all 64 bit operations are converted to 32 bits. A +few specific operations must be implemented to allow it (see add2_i32, +sub2_i32, brcond2_i32). + +On a 64 bit target, the values are transferred between 32 and 64-bit +registers using the following ops: + +- trunc_shr_i64_i32 +- ext_i32_i64 +- extu_i32_i64 + +They ensure that the values are correctly truncated or extended when +moved from a 32-bit to a 64-bit register or vice-versa. Note that the +trunc_shr_i64_i32 is an optional op. It is not necessary to implement +it if all the following conditions are met: + +- 64-bit registers can hold 32-bit values +- 32-bit values in a 64-bit register do not need to stay zero or + sign extended +- all 32-bit TCG ops ignore the high part of 64-bit registers + +Floating point operations are not supported in this version. A +previous incarnation of the code generator had full support of them, +but it is better to concentrate on integer operations first. + +Constraints +---------------- + +GCC like constraints are used to define the constraints of every +instruction. Memory constraints are not supported in this +version. Aliases are specified in the input operands as for GCC. + +The same register may be used for both an input and an output, even when +they are not explicitly aliased. If an op expands to multiple target +instructions then care must be taken to avoid clobbering input values. +GCC style "early clobber" outputs are supported, with '``&``'. + +A target can define specific register or constant constraints. If an +operation uses a constant input constraint which does not allow all +constants, it must also accept registers in order to have a fallback. +The constraint '``i``' is defined generically to accept any constant. +The constraint '``r``' is not defined generically, but is consistently +used by each backend to indicate all registers. + +The movi_i32 and movi_i64 operations must accept any constants. + +The mov_i32 and mov_i64 operations must accept any registers of the +same type. + +The ld/st/sti instructions must accept signed 32 bit constant offsets. +This can be implemented by reserving a specific register in which to +compute the address if the offset is too big. + +The ld/st instructions must accept any destination (ld) or source (st) +register. + +The sti instruction may fail if it cannot store the given constant. + +Function call assumptions +------------------------- + +- The only supported types for parameters and return value are: 32 and + 64 bit integers and pointer. +- The stack grows downwards. +- The first N parameters are passed in registers. +- The next parameters are passed on the stack by storing them as words. +- Some registers are clobbered during the call. +- The function can return 0 or 1 value in registers. On a 32 bit + target, functions must be able to return 2 values in registers for + 64 bit return type. + + +Recommended coding rules for best performance +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +- Use globals to represent the parts of the QEMU CPU state which are + often modified, e.g. the integer registers and the condition + codes. TCG will be able to use host registers to store them. + +- Avoid globals stored in fixed registers. They must be used only to + store the pointer to the CPU state and possibly to store a pointer + to a register window. + +- Use temporaries. Use local temporaries only when really needed, + e.g. when you need to use a value after a jump. Local temporaries + introduce a performance hit in the current TCG implementation: their + content is saved to memory at end of each basic block. + +- Free temporaries and local temporaries when they are no longer used + (tcg_temp_free). Since tcg_const_x() also creates a temporary, you + should free it after it is used. Freeing temporaries does not yield + a better generated code, but it reduces the memory usage of TCG and + the speed of the translation. + +- Don't hesitate to use helpers for complicated or seldom used guest + instructions. There is little performance advantage in using TCG to + implement guest instructions taking more than about twenty TCG + instructions. Note that this rule of thumb is more applicable to + helpers doing complex logic or arithmetic, where the C compiler has + scope to do a good job of optimisation; it is less relevant where + the instruction is mostly doing loads and stores, and in those cases + inline TCG may still be faster for longer sequences. + +- The hard limit on the number of TCG instructions you can generate + per guest instruction is set by ``MAX_OP_PER_INSTR`` in ``exec-all.h`` -- + you cannot exceed this without risking a buffer overrun. + +- Use the 'discard' instruction if you know that TCG won't be able to + prove that a given global is "dead" at a given program point. The + x86 guest uses it to improve the condition codes optimisation. diff --git a/docs/devel/tcg.rst b/docs/devel/tcg.rst index a65fb7b1c4..136a7a0d96 100644 --- a/docs/devel/tcg.rst +++ b/docs/devel/tcg.rst @@ -9,7 +9,7 @@ which make it relatively easily portable and simple while a= chieving good performances. =20 QEMU's dynamic translation backend is called TCG, for "Tiny Code -Generator". For more information, please take a look at ``tcg/README``. +Generator". For more information, please take a look at :ref:`tcg-ops-ref`. =20 The following sections outline some notable features and implementation details of QEMU's dynamic translator. diff --git a/tcg/README b/tcg/README deleted file mode 100644 index bc15cc3b32..0000000000 --- a/tcg/README +++ /dev/null @@ -1,784 +0,0 @@ -Tiny Code Generator - Fabrice Bellard. - -1) Introduction - -TCG (Tiny Code Generator) began as a generic backend for a C -compiler. It was simplified to be used in QEMU. It also has its roots -in the QOP code generator written by Paul Brook.=20 - -2) Definitions - -TCG receives RISC-like "TCG ops" and performs some optimizations on them, -including liveness analysis and trivial constant expression -evaluation. TCG ops are then implemented in the host CPU back end, -also known as the TCG "target". - -The TCG "target" is the architecture for which we generate the -code. It is of course not the same as the "target" of QEMU which is -the emulated architecture. As TCG started as a generic C backend used -for cross compiling, it is assumed that the TCG target is different -from the host, although it is never the case for QEMU. - -In this document, we use "guest" to specify what architecture we are -emulating; "target" always means the TCG target, the machine on which -we are running QEMU. - -A TCG "function" corresponds to a QEMU Translated Block (TB). - -A TCG "temporary" is a variable only live in a basic -block. Temporaries are allocated explicitly in each function. - -A TCG "local temporary" is a variable only live in a function. Local -temporaries are allocated explicitly in each function. - -A TCG "global" is a variable which is live in all the functions -(equivalent of a C global variable). They are defined before the -functions defined. A TCG global can be a memory location (e.g. a QEMU -CPU register), a fixed host register (e.g. the QEMU CPU state pointer) -or a memory location which is stored in a register outside QEMU TBs -(not implemented yet). - -A TCG "basic block" corresponds to a list of instructions terminated -by a branch instruction.=20 - -An operation with "undefined behavior" may result in a crash. - -An operation with "unspecified behavior" shall not crash. However, -the result may be one of several possibilities so may be considered -an "undefined result". - -3) Intermediate representation - -3.1) Introduction - -TCG instructions operate on variables which are temporaries, local -temporaries or globals. TCG instructions and variables are strongly -typed. Two types are supported: 32 bit integers and 64 bit -integers. Pointers are defined as an alias to 32 bit or 64 bit -integers depending on the TCG target word size. - -Each instruction has a fixed number of output variable operands, input -variable operands and always constant operands. - -The notable exception is the call instruction which has a variable -number of outputs and inputs. - -In the textual form, output operands usually come first, followed by -input operands, followed by constant operands. The output type is -included in the instruction name. Constants are prefixed with a '$'. - -add_i32 t0, t1, t2 (t0 <- t1 + t2) - -3.2) Assumptions - -* Basic blocks - -- Basic blocks end after branches (e.g. brcond_i32 instruction), - goto_tb and exit_tb instructions. -- Basic blocks start after the end of a previous basic block, or at a - set_label instruction. - -After the end of a basic block, the content of temporaries is -destroyed, but local temporaries and globals are preserved. - -* Floating point types are not supported yet - -* Pointers: depending on the TCG target, pointer size is 32 bit or 64 - bit. The type TCG_TYPE_PTR is an alias to TCG_TYPE_I32 or - TCG_TYPE_I64. - -* Helpers: - -Using the tcg_gen_helper_x_y it is possible to call any function -taking i32, i64 or pointer types. By default, before calling a helper, -all globals are stored at their canonical location and it is assumed -that the function can modify them. By default, the helper is allowed to -modify the CPU state or raise an exception. - -This can be overridden using the following function modifiers: -- TCG_CALL_NO_READ_GLOBALS means that the helper does not read globals, - either directly or via an exception. They will not be saved to their - canonical locations before calling the helper. -- TCG_CALL_NO_WRITE_GLOBALS means that the helper does not modify any glob= als. - They will only be saved to their canonical location before calling helpe= rs, - but they won't be reloaded afterwards. -- TCG_CALL_NO_SIDE_EFFECTS means that the call to the function is removed = if - the return value is not used. - -Note that TCG_CALL_NO_READ_GLOBALS implies TCG_CALL_NO_WRITE_GLOBALS. - -On some TCG targets (e.g. x86), several calling conventions are -supported. - -* Branches: - -Use the instruction 'br' to jump to a label. - -3.3) Code Optimizations - -When generating instructions, you can count on at least the following -optimizations: - -- Single instructions are simplified, e.g. - - and_i32 t0, t0, $0xffffffff - =20 - is suppressed. - -- A liveness analysis is done at the basic block level. The - information is used to suppress moves from a dead variable to - another one. It is also used to remove instructions which compute - dead results. The later is especially useful for condition code - optimization in QEMU. - - In the following example: - - add_i32 t0, t1, t2 - add_i32 t0, t0, $1 - mov_i32 t0, $1 - - only the last instruction is kept. - -3.4) Instruction Reference - -********* Function call - -* call ptr - -call function 'ptr' (pointer type) - - optional 32 bit or 64 bit return value - optional 32 bit or 64 bit parameters - -********* Jumps/Labels - -* set_label $label - -Define label 'label' at the current program point. - -* br $label - -Jump to label. - -* brcond_i32/i64 t0, t1, cond, label - -Conditional jump if t0 cond t1 is true. cond can be: - TCG_COND_EQ - TCG_COND_NE - TCG_COND_LT /* signed */ - TCG_COND_GE /* signed */ - TCG_COND_LE /* signed */ - TCG_COND_GT /* signed */ - TCG_COND_LTU /* unsigned */ - TCG_COND_GEU /* unsigned */ - TCG_COND_LEU /* unsigned */ - TCG_COND_GTU /* unsigned */ - -********* Arithmetic - -* add_i32/i64 t0, t1, t2 - -t0=3Dt1+t2 - -* sub_i32/i64 t0, t1, t2 - -t0=3Dt1-t2 - -* neg_i32/i64 t0, t1 - -t0=3D-t1 (two's complement) - -* mul_i32/i64 t0, t1, t2 - -t0=3Dt1*t2 - -* div_i32/i64 t0, t1, t2 - -t0=3Dt1/t2 (signed). Undefined behavior if division by zero or overflow. - -* divu_i32/i64 t0, t1, t2 - -t0=3Dt1/t2 (unsigned). Undefined behavior if division by zero. - -* rem_i32/i64 t0, t1, t2 - -t0=3Dt1%t2 (signed). Undefined behavior if division by zero or overflow. - -* remu_i32/i64 t0, t1, t2 - -t0=3Dt1%t2 (unsigned). Undefined behavior if division by zero. - -********* Logical - -* and_i32/i64 t0, t1, t2 - -t0=3Dt1&t2 - -* or_i32/i64 t0, t1, t2 - -t0=3Dt1|t2 - -* xor_i32/i64 t0, t1, t2 - -t0=3Dt1^t2 - -* not_i32/i64 t0, t1 - -t0=3D~t1 - -* andc_i32/i64 t0, t1, t2 - -t0=3Dt1&~t2 - -* eqv_i32/i64 t0, t1, t2 - -t0=3D~(t1^t2), or equivalently, t0=3Dt1^~t2 - -* nand_i32/i64 t0, t1, t2 - -t0=3D~(t1&t2) - -* nor_i32/i64 t0, t1, t2 - -t0=3D~(t1|t2) - -* orc_i32/i64 t0, t1, t2 - -t0=3Dt1|~t2 - -* clz_i32/i64 t0, t1, t2 - -t0 =3D t1 ? clz(t1) : t2 - -* ctz_i32/i64 t0, t1, t2 - -t0 =3D t1 ? ctz(t1) : t2 - -* ctpop_i32/i64 t0, t1 - -t0 =3D number of bits set in t1 -With "ctpop" short for "count population", matching -the function name used in include/qemu/host-utils.h. - -********* Shifts/Rotates - -* shl_i32/i64 t0, t1, t2 - -t0=3Dt1 << t2. Unspecified behavior if t2 < 0 or t2 >=3D 32 (resp 64) - -* shr_i32/i64 t0, t1, t2 - -t0=3Dt1 >> t2 (unsigned). Unspecified behavior if t2 < 0 or t2 >=3D 32 (re= sp 64) - -* sar_i32/i64 t0, t1, t2 - -t0=3Dt1 >> t2 (signed). Unspecified behavior if t2 < 0 or t2 >=3D 32 (resp= 64) - -* rotl_i32/i64 t0, t1, t2 - -Rotation of t2 bits to the left. -Unspecified behavior if t2 < 0 or t2 >=3D 32 (resp 64) - -* rotr_i32/i64 t0, t1, t2 - -Rotation of t2 bits to the right. -Unspecified behavior if t2 < 0 or t2 >=3D 32 (resp 64) - -********* Misc - -* mov_i32/i64 t0, t1 - -t0 =3D t1 - -Move t1 to t0 (both operands must have the same type). - -* ext8s_i32/i64 t0, t1 -ext8u_i32/i64 t0, t1 -ext16s_i32/i64 t0, t1 -ext16u_i32/i64 t0, t1 -ext32s_i64 t0, t1 -ext32u_i64 t0, t1 - -8, 16 or 32 bit sign/zero extension (both operands must have the same type) - -* bswap16_i32/i64 t0, t1, flags - -16 bit byte swap on the low bits of a 32/64 bit input. -If flags & TCG_BSWAP_IZ, then t1 is known to be zero-extended from bit 15. -If flags & TCG_BSWAP_OZ, then t0 will be zero-extended from bit 15. -If flags & TCG_BSWAP_OS, then t0 will be sign-extended from bit 15. -If neither TCG_BSWAP_OZ nor TCG_BSWAP_OS are set, then the bits of -t0 above bit 15 may contain any value. - -* bswap32_i64 t0, t1, flags - -32 bit byte swap on a 64-bit value. The flags are the same as for bswap16, -except they apply from bit 31 instead of bit 15. - -* bswap32_i32 t0, t1, flags -* bswap64_i64 t0, t1, flags - -32/64 bit byte swap. The flags are ignored, but still present -for consistency with the other bswap opcodes. - -* discard_i32/i64 t0 - -Indicate that the value of t0 won't be used later. It is useful to -force dead code elimination. - -* deposit_i32/i64 dest, t1, t2, pos, len - -Deposit T2 as a bitfield into T1, placing the result in DEST. -The bitfield is described by POS/LEN, which are immediate values: - - LEN - the length of the bitfield - POS - the position of the first bit, counting from the LSB - -For example, "deposit_i32 dest, t1, t2, 8, 4" indicates a 4-bit field -at bit 8. This operation would be equivalent to - - dest =3D (t1 & ~0x0f00) | ((t2 << 8) & 0x0f00) - -* extract_i32/i64 dest, t1, pos, len -* sextract_i32/i64 dest, t1, pos, len - -Extract a bitfield from T1, placing the result in DEST. -The bitfield is described by POS/LEN, which are immediate values, -as above for deposit. For extract_*, the result will be extended -to the left with zeros; for sextract_*, the result will be extended -to the left with copies of the bitfield sign bit at pos + len - 1. - -For example, "sextract_i32 dest, t1, 8, 4" indicates a 4-bit field -at bit 8. This operation would be equivalent to - - dest =3D (t1 << 20) >> 28 - -(using an arithmetic right shift). - -* extract2_i32/i64 dest, t1, t2, pos - -For N =3D {32,64}, extract an N-bit quantity from the concatenation -of t2:t1, beginning at pos. The tcg_gen_extract2_{i32,i64} expander -accepts 0 <=3D pos <=3D N as inputs. The backend code generator will -not see either 0 or N as inputs for these opcodes. - -* extrl_i64_i32 t0, t1 - -For 64-bit hosts only, extract the low 32-bits of input T1 and place it -into 32-bit output T0. Depending on the host, this may be a simple move, -or may require additional canonicalization. - -* extrh_i64_i32 t0, t1 - -For 64-bit hosts only, extract the high 32-bits of input T1 and place it -into 32-bit output T0. Depending on the host, this may be a simple shift, -or may require additional canonicalization. - -********* Conditional moves - -* setcond_i32/i64 dest, t1, t2, cond - -dest =3D (t1 cond t2) - -Set DEST to 1 if (T1 cond T2) is true, otherwise set to 0. - -* movcond_i32/i64 dest, c1, c2, v1, v2, cond - -dest =3D (c1 cond c2 ? v1 : v2) - -Set DEST to V1 if (C1 cond C2) is true, otherwise set to V2. - -********* Type conversions - -* ext_i32_i64 t0, t1 -Convert t1 (32 bit) to t0 (64 bit) and does sign extension - -* extu_i32_i64 t0, t1 -Convert t1 (32 bit) to t0 (64 bit) and does zero extension - -* trunc_i64_i32 t0, t1 -Truncate t1 (64 bit) to t0 (32 bit) - -* concat_i32_i64 t0, t1, t2 -Construct t0 (64-bit) taking the low half from t1 (32 bit) and the high ha= lf -from t2 (32 bit). - -* concat32_i64 t0, t1, t2 -Construct t0 (64-bit) taking the low half from t1 (64 bit) and the high ha= lf -from t2 (64 bit). - -********* Load/Store - -* ld_i32/i64 t0, t1, offset -ld8s_i32/i64 t0, t1, offset -ld8u_i32/i64 t0, t1, offset -ld16s_i32/i64 t0, t1, offset -ld16u_i32/i64 t0, t1, offset -ld32s_i64 t0, t1, offset -ld32u_i64 t0, t1, offset - -t0 =3D read(t1 + offset) -Load 8, 16, 32 or 64 bits with or without sign extension from host memory.=20 -offset must be a constant. - -* st_i32/i64 t0, t1, offset -st8_i32/i64 t0, t1, offset -st16_i32/i64 t0, t1, offset -st32_i64 t0, t1, offset - -write(t0, t1 + offset) -Write 8, 16, 32 or 64 bits to host memory. - -All this opcodes assume that the pointed host memory doesn't correspond -to a global. In the latter case the behaviour is unpredictable. - -********* Multiword arithmetic support - -* add2_i32/i64 t0_low, t0_high, t1_low, t1_high, t2_low, t2_high -* sub2_i32/i64 t0_low, t0_high, t1_low, t1_high, t2_low, t2_high - -Similar to add/sub, except that the double-word inputs T1 and T2 are -formed from two single-word arguments, and the double-word output T0 -is returned in two single-word outputs. - -* mulu2_i32/i64 t0_low, t0_high, t1, t2 - -Similar to mul, except two unsigned inputs T1 and T2 yielding the full -double-word product T0. The later is returned in two single-word outputs. - -* muls2_i32/i64 t0_low, t0_high, t1, t2 - -Similar to mulu2, except the two inputs T1 and T2 are signed. - -* mulsh_i32/i64 t0, t1, t2 -* muluh_i32/i64 t0, t1, t2 - -Provide the high part of a signed or unsigned multiply, respectively. -If mulu2/muls2 are not provided by the backend, the tcg-op generator -can obtain the same results can be obtained by emitting a pair of -opcodes, mul+muluh/mulsh. - -********* Memory Barrier support - -* mb <$arg> - -Generate a target memory barrier instruction to ensure memory ordering as = being -enforced by a corresponding guest memory barrier instruction. The ordering -enforced by the backend may be stricter than the ordering required by the = guest. -It cannot be weaker. This opcode takes a constant argument which is requir= ed to -generate the appropriate barrier instruction. The backend should take care= to -emit the target barrier instruction only when necessary i.e., for SMP gues= ts and -when MTTCG is enabled. - -The guest translators should generate this opcode for all guest instructio= ns -which have ordering side effects. - -Please see docs/devel/atomics.rst for more information on memory barriers. - -********* 64-bit guest on 32-bit host support - -The following opcodes are internal to TCG. Thus they are to be implemente= d by -32-bit host code generators, but are not to be emitted by guest translator= s. -They are emitted as needed by inline functions within "tcg-op.h". - -* brcond2_i32 t0_low, t0_high, t1_low, t1_high, cond, label - -Similar to brcond, except that the 64-bit values T0 and T1 -are formed from two 32-bit arguments. - -* setcond2_i32 dest, t1_low, t1_high, t2_low, t2_high, cond - -Similar to setcond, except that the 64-bit values T1 and T2 are -formed from two 32-bit arguments. The result is a 32-bit value. - -********* QEMU specific operations - -* exit_tb t0 - -Exit the current TB and return the value t0 (word type). - -* goto_tb index - -Exit the current TB and jump to the TB index 'index' (constant) if the -current TB was linked to this TB. Otherwise execute the next -instructions. Only indices 0 and 1 are valid and tcg_gen_goto_tb may be is= sued -at most once with each slot index per TB. - -* lookup_and_goto_ptr tb_addr - -Look up a TB address ('tb_addr') and jump to it if valid. If not valid, -jump to the TCG epilogue to go back to the exec loop. - -This operation is optional. If the TCG backend does not implement the -goto_ptr opcode, emitting this op is equivalent to emitting exit_tb(0). - -* qemu_ld_i32/i64 t0, t1, flags, memidx -* qemu_st_i32/i64 t0, t1, flags, memidx -* qemu_st8_i32 t0, t1, flags, memidx - -Load data at the guest address t1 into t0, or store data in t0 at guest -address t1. The _i32/_i64 size applies to the size of the input/output -register t0 only. The address t1 is always sized according to the guest, -and the width of the memory operation is controlled by flags. - -Both t0 and t1 may be split into little-endian ordered pairs of registers -if dealing with 64-bit quantities on a 32-bit host. - -The memidx selects the qemu tlb index to use (e.g. user or kernel access). -The flags are the MemOp bits, selecting the sign, width, and endianness -of the memory access. - -For a 32-bit host, qemu_ld/st_i64 is guaranteed to only be used with a -64-bit memory access specified in flags. - -For i386, qemu_st8_i32 is exactly like qemu_st_i32, except the size of -the memory operation is known to be 8-bit. This allows the backend to -provide a different set of register constraints. - -********* Host vector operations - -All of the vector ops have two parameters, TCGOP_VECL & TCGOP_VECE. -The former specifies the length of the vector in log2 64-bit units; the -later specifies the length of the element (if applicable) in log2 8-bit un= its. -E.g. VECL=3D1 -> 64 << 1 -> v128, and VECE=3D2 -> 1 << 2 -> i32. - -* mov_vec v0, v1 -* ld_vec v0, t1 -* st_vec v0, t1 - - Move, load and store. - -* dup_vec v0, r1 - - Duplicate the low N bits of R1 into VECL/VECE copies across V0. - -* dupi_vec v0, c - - Similarly, for a constant. - Smaller values will be replicated to host register size by the expanders. - -* dup2_vec v0, r1, r2 - - Duplicate r2:r1 into VECL/64 copies across V0. This opcode is - only present for 32-bit hosts. - -* add_vec v0, v1, v2 - - v0 =3D v1 + v2, in elements across the vector. - -* sub_vec v0, v1, v2 - - Similarly, v0 =3D v1 - v2. - -* mul_vec v0, v1, v2 - - Similarly, v0 =3D v1 * v2. - -* neg_vec v0, v1 - - Similarly, v0 =3D -v1. - -* abs_vec v0, v1 - - Similarly, v0 =3D v1 < 0 ? -v1 : v1, in elements across the vector. - -* smin_vec: -* umin_vec: - - Similarly, v0 =3D MIN(v1, v2), for signed and unsigned element types. - -* smax_vec: -* umax_vec: - - Similarly, v0 =3D MAX(v1, v2), for signed and unsigned element types. - -* ssadd_vec: -* sssub_vec: -* usadd_vec: -* ussub_vec: - - Signed and unsigned saturating addition and subtraction. If the true - result is not representable within the element type, the element is - set to the minimum or maximum value for the type. - -* and_vec v0, v1, v2 -* or_vec v0, v1, v2 -* xor_vec v0, v1, v2 -* andc_vec v0, v1, v2 -* orc_vec v0, v1, v2 -* not_vec v0, v1 - - Similarly, logical operations with and without complement. - Note that VECE is unused. - -* shli_vec v0, v1, i2 -* shls_vec v0, v1, s2 - - Shift all elements from v1 by a scalar i2/s2. I.e. - - for (i =3D 0; i < VECL/VECE; ++i) { - v0[i] =3D v1[i] << s2; - } - -* shri_vec v0, v1, i2 -* sari_vec v0, v1, i2 -* rotli_vec v0, v1, i2 -* shrs_vec v0, v1, s2 -* sars_vec v0, v1, s2 - - Similarly for logical and arithmetic right shift, and left rotate. - -* shlv_vec v0, v1, v2 - - Shift elements from v1 by elements from v2. I.e. - - for (i =3D 0; i < VECL/VECE; ++i) { - v0[i] =3D v1[i] << v2[i]; - } - -* shrv_vec v0, v1, v2 -* sarv_vec v0, v1, v2 -* rotlv_vec v0, v1, v2 -* rotrv_vec v0, v1, v2 - - Similarly for logical and arithmetic right shift, and rotates. - -* cmp_vec v0, v1, v2, cond - - Compare vectors by element, storing -1 for true and 0 for false. - -* bitsel_vec v0, v1, v2, v3 - - Bitwise select, v0 =3D (v2 & v1) | (v3 & ~v1), across the entire vector. - -* cmpsel_vec v0, c1, c2, v3, v4, cond - - Select elements based on comparison results: - for (i =3D 0; i < n; ++i) { - v0[i] =3D (c1[i] cond c2[i]) ? v3[i] : v4[i]. - } - -********* - -Note 1: Some shortcuts are defined when the last operand is known to be -a constant (e.g. addi for add, movi for mov). - -Note 2: When using TCG, the opcodes must never be generated directly -as some of them may not be available as "real" opcodes. Always use the -function tcg_gen_xxx(args). - -4) Backend - -tcg-target.h contains the target specific definitions. tcg-target.c.inc -contains the target specific code; it is #included by tcg/tcg.c, rather -than being a standalone C file. - -4.1) Assumptions - -The target word size (TCG_TARGET_REG_BITS) is expected to be 32 bit or -64 bit. It is expected that the pointer has the same size as the word. - -On a 32 bit target, all 64 bit operations are converted to 32 bits. A -few specific operations must be implemented to allow it (see add2_i32, -sub2_i32, brcond2_i32). - -On a 64 bit target, the values are transferred between 32 and 64-bit -registers using the following ops: -- trunc_shr_i64_i32 -- ext_i32_i64 -- extu_i32_i64 - -They ensure that the values are correctly truncated or extended when -moved from a 32-bit to a 64-bit register or vice-versa. Note that the -trunc_shr_i64_i32 is an optional op. It is not necessary to implement -it if all the following conditions are met: -- 64-bit registers can hold 32-bit values -- 32-bit values in a 64-bit register do not need to stay zero or - sign extended -- all 32-bit TCG ops ignore the high part of 64-bit registers - -Floating point operations are not supported in this version. A -previous incarnation of the code generator had full support of them, -but it is better to concentrate on integer operations first. - -4.2) Constraints - -GCC like constraints are used to define the constraints of every -instruction. Memory constraints are not supported in this -version. Aliases are specified in the input operands as for GCC. - -The same register may be used for both an input and an output, even when -they are not explicitly aliased. If an op expands to multiple target -instructions then care must be taken to avoid clobbering input values. -GCC style "early clobber" outputs are supported, with '&'. - -A target can define specific register or constant constraints. If an -operation uses a constant input constraint which does not allow all -constants, it must also accept registers in order to have a fallback. -The constraint 'i' is defined generically to accept any constant. -The constraint 'r' is not defined generically, but is consistently -used by each backend to indicate all registers. - -The movi_i32 and movi_i64 operations must accept any constants. - -The mov_i32 and mov_i64 operations must accept any registers of the -same type. - -The ld/st/sti instructions must accept signed 32 bit constant offsets. -This can be implemented by reserving a specific register in which to -compute the address if the offset is too big. - -The ld/st instructions must accept any destination (ld) or source (st) -register. - -The sti instruction may fail if it cannot store the given constant. - -4.3) Function call assumptions - -- The only supported types for parameters and return value are: 32 and - 64 bit integers and pointer. -- The stack grows downwards. -- The first N parameters are passed in registers. -- The next parameters are passed on the stack by storing them as words. -- Some registers are clobbered during the call.=20 -- The function can return 0 or 1 value in registers. On a 32 bit - target, functions must be able to return 2 values in registers for - 64 bit return type. - -5) Recommended coding rules for best performance - -- Use globals to represent the parts of the QEMU CPU state which are - often modified, e.g. the integer registers and the condition - codes. TCG will be able to use host registers to store them. - -- Avoid globals stored in fixed registers. They must be used only to - store the pointer to the CPU state and possibly to store a pointer - to a register window. - -- Use temporaries. Use local temporaries only when really needed, - e.g. when you need to use a value after a jump. Local temporaries - introduce a performance hit in the current TCG implementation: their - content is saved to memory at end of each basic block. - -- Free temporaries and local temporaries when they are no longer used - (tcg_temp_free). Since tcg_const_x() also creates a temporary, you - should free it after it is used. Freeing temporaries does not yield - a better generated code, but it reduces the memory usage of TCG and - the speed of the translation. - -- Don't hesitate to use helpers for complicated or seldom used guest - instructions. There is little performance advantage in using TCG to - implement guest instructions taking more than about twenty TCG - instructions. Note that this rule of thumb is more applicable to - helpers doing complex logic or arithmetic, where the C compiler has - scope to do a good job of optimisation; it is less relevant where - the instruction is mostly doing loads and stores, and in those cases - inline TCG may still be faster for longer sequences. - -- The hard limit on the number of TCG instructions you can generate - per guest instruction is set by MAX_OP_PER_INSTR in exec-all.h -- - you cannot exceed this without risking a buffer overrun. - -- Use the 'discard' instruction if you know that TCG won't be able to - prove that a given global is "dead" at a given program point. The - x86 guest uses it to improve the condition codes optimisation. --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672358939; cv=none; d=zohomail.com; s=zohoarc; b=cmUkL9fpWWHE5JF/WqAsU0zW2OJ6DyPRQmRxeuQ1gAkukLC7r3ylkp+7/is8DBSIPluTln/y4jdYxbFbsXUEZA0jz1HXGTBIzd72qN29PjIikpJ47NTtv1QNwaUiJyf3xsohf4wz0sOitYcK3apbXB/C476vmLJKESpo134Ez1A= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672358939; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=ZuFGBK7oJk/EujTjAqZpKzYL125RUa7EsoUz7ySoMMg=; b=JBvuXQq19TceS3eI0oiGJN04wp2PWYy3CaTlri0Zb2cpzB6ghDMcWFJwZ19y2Y3ADO7Tu9kVzWbvNlbjMoLadnQUOh4Wrkpd6HevLam3pQC5ZF0AP7u+G+qqlIo/8YJkZoPdYRILiGLN+ePVhNbfCvYYuBt43lQPsswInipRoV4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672358939706277.8845788415663; Thu, 29 Dec 2022 16:08:59 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2r4-0002y9-EW; Thu, 29 Dec 2022 19:02:34 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2r1-0002x9-22 for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:31 -0500 Received: from mail-pj1-x102f.google.com ([2607:f8b0:4864:20::102f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2qz-0002f8-9X for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:30 -0500 Received: by mail-pj1-x102f.google.com with SMTP id v13-20020a17090a6b0d00b00219c3be9830so20259516pjj.4 for ; Thu, 29 Dec 2022 16:02:25 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZuFGBK7oJk/EujTjAqZpKzYL125RUa7EsoUz7ySoMMg=; b=JUeTMVSh89J0bs6ghmWp6xkedSFwV/PnfXJWzRnWOymowYlOg6KE9u28WzKz1XWE8b Ha6tTeUjf4dvU7IEcbQqMG2D+dBAt/JtTvQ1v643Pzh9Mg7N475KzGCNgAJ7zWn3XtWn 2E26m7jqiporFWeR9SSOKfoqAvUQDeEdhrGY7dtSDaAWmzzMlMvji4rWpoml9vwNb3K5 EmYjuj78Lo9dxkbZHSGC2yn49XLK8HxEy6xz9LY+/IJtleryVTu9m6z04q6wrVPjPW4V oRVzgLB+j9quoFCPt0chyKKsnnikcKuC4tlX6f8/l798ngWI3b4DfgeL9OghwMzgmCMQ qC/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZuFGBK7oJk/EujTjAqZpKzYL125RUa7EsoUz7ySoMMg=; b=B2cBGMUwbrgeFZqxgr/ovHWw7L6b61wwUeWGONrNUDZ3xXexifsfCofkQiUWTwoc6D B3Odu9V46vfGB59WrgpIcudWhDhjC5TI2ExuRaI7xpZGlaTbu+LCws2sL9QQaHiyHg9a 7xPmq/OV4DQMtf7ltO5leZjn2GHdTFFHW+7/0wlIOMYkL3GMsdRRn8xmiAJs23S0oLpf CswFO7BW543f1ZYDCLtaI3fdIJETQvlnR+zxtNU1oBhxs5moc/ssmzYpcZ2GrFMpoEZY xPWqn7GfxR1zL6fh9/ugz0Qe2q6QO0j7FyugQab7TONGB9Zqu/664BXSScbXVAORuFs0 PXzQ== X-Gm-Message-State: AFqh2kpnyF1JtmCxr67JcEQ33YoYAyyhbuWcSEYvrDais2e/Z+IOZqal jMIzI+CCcavnwvOCU540Zmlp08iAYWVAXSsn X-Google-Smtp-Source: AMrXdXsvs3BwlzgQwQsyrmeG7wBz8BPLEdYWm1y0P5DngaZhbIGNYbQcABAEm9nj8f+r2MHbEeRJ5Q== X-Received: by 2002:a17:903:186:b0:188:d2b3:26c1 with SMTP id z6-20020a170903018600b00188d2b326c1mr41051776plg.10.1672358544947; Thu, 29 Dec 2022 16:02:24 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 02/47] meson: Move CONFIG_TCG_INTERPRETER to config_host Date: Thu, 29 Dec 2022 16:01:36 -0800 Message-Id: <20221230000221.2764875-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672358940348000001 Like CONFIG_TCG, the enabled method of execution is a host property not a guest property. This exposes the define to compile-once files. Acked-by: Paolo Bonzini Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- meson.build | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/meson.build b/meson.build index 4c6f8a674a..14e3eba227 100644 --- a/meson.build +++ b/meson.build @@ -469,6 +469,7 @@ if get_option('tcg').allowed() endif if get_option('tcg_interpreter') tcg_arch =3D 'tci' + config_host +=3D { 'CONFIG_TCG_INTERPRETER': 'y' } elif host_arch =3D=3D 'x86_64' tcg_arch =3D 'i386' elif host_arch =3D=3D 'ppc64' @@ -2545,9 +2546,6 @@ foreach target : target_dirs if sym =3D=3D 'CONFIG_TCG' or target in accelerator_targets.get(sym, [= ]) config_target +=3D { sym: 'y' } config_all +=3D { sym: 'y' } - if sym =3D=3D 'CONFIG_TCG' and tcg_arch =3D=3D 'tci' - config_target +=3D { 'CONFIG_TCG_INTERPRETER': 'y' } - endif if target in modular_tcg config_target +=3D { 'CONFIG_TCG_MODULAR': 'y' } else --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359790; cv=none; d=zohomail.com; s=zohoarc; b=jrhG48qWgg8rhfw4PP+mWy+vhWWrCypi9nZvf6zNpsGz2ACAF58cvE17+R1mOk/bOM6oZcQKKDxdyjCokiVkeno78PWn9Lx3/2pkYfiJ3t62bn3uF3rserfqZqmxxRf4Yk3fZz5vSFX5/9qE/jiYgtrXfkLxFmTw0TfcXRohT1Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359790; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=l2AYVfOigGNcWueyGcFEAyNre3J/WgPqkB4M4xEOEGc=; b=eHA9ioOld1QV4bFAZJVnW3ipugE3DJr2LpWQEEFwNZdjIkjryCLwkYHY7fH7MfxMJNfI4DO3kJuqLsJZ1iqy1jXshGo0W4jh/Xwty1ru8mjaTfKtu2A3rBxKs02nlXM71Of/WiqoZAsRj69zPFnpOZu061hUHEaXn9vVIQQJ4/w= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672359790915932.0865544284658; Thu, 29 Dec 2022 16:23:10 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2r7-00030C-8m; Thu, 29 Dec 2022 19:02:37 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2r2-0002xJ-Iu for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:33 -0500 Received: from mail-pl1-x629.google.com ([2607:f8b0:4864:20::629]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2qz-0002fG-9o for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:32 -0500 Received: by mail-pl1-x629.google.com with SMTP id g16so10694430plq.12 for ; Thu, 29 Dec 2022 16:02:26 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=l2AYVfOigGNcWueyGcFEAyNre3J/WgPqkB4M4xEOEGc=; b=sIHIfodGP7l5hxQJ/RX0cdNtQwZCFEFhML628ZQj0AMZWbD8mflMl+79F8UtCoRQxE VZiJ68vnzHSZz2xEIBciFWyettPWj8pw/q0iOatQ1g12RwHyNILV/Cts3NZq2eHhGEcQ NsPPMltFhN5y6yD24zMKvbiBiKR2DEDo5N7iUgg10C7U7oBy2rf+QU2fQPik2Yj7pJeF apSDdBdW1+FZFvNOaiL/kmgonNz6TpeFQHMD6G1nBSRBh61RLuz7tE+GpilwiHKw0uTr XdrEsQrpvxIFCHyTxWHKRGW7qxxhX5lrsEUz/yzXdhIkPGTgim58dfMn6WKtLU5cs6pv 7dvw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359791299000001 From: Philippe Mathieu-Daud=C3=A9 We are going to modify this code, so fix its style first to avoid: ERROR: spaces required around that '*' (ctx:VxV) #281: FILE: tcg/s390x/tcg-target.c.inc:1224: + uintptr_t mask =3D ~(0xffffull << i*16); ^ Reviewed-by: Wilfred Mallawa Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20221130132654.76369-2-philmd@linaro.org> Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.c.inc | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index 33becd7694..f1d3907cd8 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -802,9 +802,9 @@ static bool maybe_out_small_movi(TCGContext *s, TCGType= type, } =20 for (i =3D 0; i < 4; i++) { - tcg_target_long mask =3D 0xffffull << i*16; + tcg_target_long mask =3D 0xffffull << i * 16; if ((uval & mask) =3D=3D uval) { - tcg_out_insn_RI(s, lli_insns[i], ret, uval >> i*16); + tcg_out_insn_RI(s, lli_insns[i], ret, uval >> i * 16); return true; } } @@ -1221,9 +1221,9 @@ static void tgen_andi(TCGContext *s, TCGType type, TC= GReg dest, uint64_t val) =20 /* Try all 32-bit insns that can perform it in one go. */ for (i =3D 0; i < 4; i++) { - tcg_target_ulong mask =3D ~(0xffffull << i*16); + tcg_target_ulong mask =3D ~(0xffffull << i * 16); if (((val | ~valid) & mask) =3D=3D mask) { - tcg_out_insn_RI(s, ni_insns[i], dest, val >> i*16); + tcg_out_insn_RI(s, ni_insns[i], dest, val >> i * 16); return; } } @@ -1231,9 +1231,9 @@ static void tgen_andi(TCGContext *s, TCGType type, TC= GReg dest, uint64_t val) /* Try all 48-bit insns that can perform it in one go. */ if (HAVE_FACILITY(EXT_IMM)) { for (i =3D 0; i < 2; i++) { - tcg_target_ulong mask =3D ~(0xffffffffull << i*32); + tcg_target_ulong mask =3D ~(0xffffffffull << i * 32); if (((val | ~valid) & mask) =3D=3D mask) { - tcg_out_insn_RIL(s, nif_insns[i], dest, val >> i*32); + tcg_out_insn_RIL(s, nif_insns[i], dest, val >> i * 32); return; } } @@ -1279,9 +1279,9 @@ static void tgen_ori(TCGContext *s, TCGType type, TCG= Reg dest, uint64_t val) =20 /* Try all 32-bit insns that can perform it in one go. */ for (i =3D 0; i < 4; i++) { - tcg_target_ulong mask =3D (0xffffull << i*16); + tcg_target_ulong mask =3D (0xffffull << i * 16); if ((val & mask) !=3D 0 && (val & ~mask) =3D=3D 0) { - tcg_out_insn_RI(s, oi_insns[i], dest, val >> i*16); + tcg_out_insn_RI(s, oi_insns[i], dest, val >> i * 16); return; } } @@ -1289,9 +1289,9 @@ static void tgen_ori(TCGContext *s, TCGType type, TCG= Reg dest, uint64_t val) /* Try all 48-bit insns that can perform it in one go. */ if (HAVE_FACILITY(EXT_IMM)) { for (i =3D 0; i < 2; i++) { - tcg_target_ulong mask =3D (0xffffffffull << i*32); + tcg_target_ulong mask =3D (0xffffffffull << i * 32); if ((val & mask) !=3D 0 && (val & ~mask) =3D=3D 0) { - tcg_out_insn_RIL(s, oif_insns[i], dest, val >> i*32); + tcg_out_insn_RIL(s, oif_insns[i], dest, val >> i * 32); return; } } --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=J6tqpC+7m8/ICgyOyiYZ2RwX4BgqdHMMEgREVC9PV0w=; b=pcpBQUP9msqHHX2nnKvyi14sk/x1tkuompJzWhZhV5/folRce6yvLZZfCbVIuwbLM8 eKipgL5YdDzxIAtn+ICALh1zcF7mCT4TzhxYv8oGu4/FMn7WDMn9/zBqSin9j0DaPAtA 5+iD+CwI/7/CY0F1HfE0SvZW3oxSvfNWTjqsk3P1foCSNcoiCCVzdDSWBPiBw/VnwZk8 20q8O4ZKVZ4simRfe97F7P+9tmeUOL6s3Jt7ztSbe1LNNYAW4q9pNa6vAXxtsJfaGxt3 RGOfDgESNiyYZM25m8n2UXwpHOX6tO+BbfMu9q81sMFEVHa9NsQVeDyqk2Gkagdc6knW /pXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=J6tqpC+7m8/ICgyOyiYZ2RwX4BgqdHMMEgREVC9PV0w=; b=Xv6/CBghCdL3/lx9v+8De3yA8xynuDSwptzoyHBBbsfEB+s0QMDNHxmFJTeVaocHfV rLzkClk922g+R1mxTnjuoFm59bcwUxo2x+jYKsTR7iODy8p3pHh4VpxhrbbIeJ/vYKP7 gdf7SkH584LhL0+tUn6rlj0cEJE+9B5/CI7/gQWlSIsr4mNRlmhau2rjb9OsjXRbzNrj xOPGM5xjdGrNmjFC0hPSZCDQShgC+RIm0DqmAOIXBaBXMWly9pXydS8Hh4q781olgfBK iIQ3IAd8qVM2vN1RDAuxt5xtbsTYhlRk7HFcfKoErvtQirVvPfevNX1m3vx5msVT7aLN wpxg== X-Gm-Message-State: AFqh2kraJgXE/iRggt6Rf8nokA7TGvV1VUlY7u3eppZSvJmGUGlbDmee 5726krds/MJWPv1ZuqTRGUeyZ2Zlqpp4lzsX X-Google-Smtp-Source: AMrXdXtugW6YwgqvLg7UuwAPvkBoJB+LIiBO9eHF4DAkpMf9F+X6fS2dgCHBO7RagW8mlu2m64QC6Q== X-Received: by 2002:a17:902:ce10:b0:189:af28:fd8d with SMTP id k16-20020a170902ce1000b00189af28fd8dmr38649549plg.1.1672358546843; Thu, 29 Dec 2022 16:02:26 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 04/47] tcg: Cleanup trailing whitespace Date: Thu, 29 Dec 2022 16:01:38 -0800 Message-Id: <20221230000221.2764875-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359235148000005 Remove whitespace at end of line, plus one place this also highlights some missing braces. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/tcg.c | 33 +++++++++++++++++---------------- tcg/ppc/tcg-target.c.inc | 2 +- 2 files changed, 18 insertions(+), 17 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 436fcf6ebd..db64799e03 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -496,7 +496,7 @@ void *tcg_malloc_internal(TCGContext *s, int size) { TCGPool *p; int pool_size; - =20 + if (size > TCG_POOL_CHUNK_SIZE) { /* big malloc: insert a new pool (XXX: could optimize) */ p =3D g_malloc(sizeof(TCGPool) + size); @@ -517,10 +517,11 @@ void *tcg_malloc_internal(TCGContext *s, int size) p =3D g_malloc(sizeof(TCGPool) + pool_size); p->size =3D pool_size; p->next =3D NULL; - if (s->pool_current)=20 + if (s->pool_current) { s->pool_current->next =3D p; - else + } else { s->pool_first =3D p; + } } else { p =3D p->next; } @@ -2949,8 +2950,8 @@ static void dump_regs(TCGContext *s) =20 for(i =3D 0; i < TCG_TARGET_NB_REGS; i++) { if (s->reg_to_temp[i] !=3D NULL) { - printf("%s: %s\n",=20 - tcg_target_reg_names[i],=20 + printf("%s: %s\n", + tcg_target_reg_names[i], tcg_get_arg_str_ptr(s, buf, sizeof(buf), s->reg_to_temp= [i])); } } @@ -2967,7 +2968,7 @@ static void check_regs(TCGContext *s) ts =3D s->reg_to_temp[reg]; if (ts !=3D NULL) { if (ts->val_type !=3D TEMP_VAL_REG || ts->reg !=3D reg) { - printf("Inconsistency for register %s:\n",=20 + printf("Inconsistency for register %s:\n", tcg_target_reg_names[reg]); goto fail; } @@ -3597,14 +3598,14 @@ static void tcg_reg_alloc_op(TCGContext *s, const T= CGOp *op) nb_iargs =3D def->nb_iargs; =20 /* copy constants */ - memcpy(new_args + nb_oargs + nb_iargs,=20 + memcpy(new_args + nb_oargs + nb_iargs, op->args + nb_oargs + nb_iargs, sizeof(TCGArg) * def->nb_cargs); =20 i_allocated_regs =3D s->reserved_regs; o_allocated_regs =3D s->reserved_regs; =20 - /* satisfy input constraints */=20 + /* satisfy input constraints */ for (k =3D 0; k < nb_iargs; k++) { TCGRegSet i_preferred_regs, o_preferred_regs; =20 @@ -3678,7 +3679,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCG= Op *op) const_args[i] =3D 0; tcg_regset_set_reg(i_allocated_regs, reg); } - =20 + /* mark dead temporaries and free the associated registers */ for (i =3D nb_oargs; i < nb_oargs + nb_iargs; i++) { if (IS_DEAD_ARG(i)) { @@ -3692,7 +3693,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCG= Op *op) tcg_reg_alloc_bb_end(s, i_allocated_regs); } else { if (def->flags & TCG_OPF_CALL_CLOBBER) { - /* XXX: permit generic clobber register list ? */=20 + /* XXX: permit generic clobber register list ? */ for (i =3D 0; i < TCG_TARGET_NB_REGS; i++) { if (tcg_regset_test_reg(tcg_target_call_clobber_regs, i)) { tcg_reg_free(s, i, i_allocated_regs); @@ -3704,7 +3705,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCG= Op *op) an exception. */ sync_globals(s, i_allocated_regs); } - =20 + /* satisfy the output constraints */ for(k =3D 0; k < nb_oargs; k++) { i =3D def->args_ct[k].sort_index; @@ -3889,7 +3890,7 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *= op) =20 /* assign stack slots first */ call_stack_size =3D (nb_iargs - nb_regs) * sizeof(tcg_target_long); - call_stack_size =3D (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) &=20 + call_stack_size =3D (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) & ~(TCG_TARGET_STACK_ALIGN - 1); allocate_args =3D (call_stack_size > TCG_STATIC_CALL_ARGS_SIZE); if (allocate_args) { @@ -3914,7 +3915,7 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *= op) stack_offset +=3D sizeof(tcg_target_long); #endif } - =20 + /* assign input registers */ allocated_regs =3D s->reserved_regs; for (i =3D 0; i < nb_regs; i++) { @@ -3947,14 +3948,14 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp= *op) tcg_regset_set_reg(allocated_regs, reg); } } - =20 + /* mark dead temporaries and free the associated registers */ for (i =3D nb_oargs; i < nb_iargs + nb_oargs; i++) { if (IS_DEAD_ARG(i)) { temp_dead(s, arg_temp(op->args[i])); } } - =20 + /* clobber call registers */ for (i =3D 0; i < TCG_TARGET_NB_REGS; i++) { if (tcg_regset_test_reg(tcg_target_call_clobber_regs, i)) { @@ -4395,7 +4396,7 @@ void tcg_dump_info(GString *buf) (double)s->code_out_len / tb_div_count); g_string_append_printf(buf, "avg search data/TB %0.1f\n", (double)s->search_out_len / tb_div_count); - =20 + g_string_append_printf(buf, "cycles/op %0.1f\n", s->op_count ? (double)tot / s->op_count : 0); g_string_append_printf(buf, "cycles/in byte %0.1f\n", diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index e3dba47697..9e34df94ba 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -42,7 +42,7 @@ # else # error "Unknown ABI" # endif -#endif=20 +#endif =20 #ifdef _CALL_SYSV # define TCG_TARGET_CALL_ALIGN_ARGS 1 --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359232; cv=none; d=zohomail.com; s=zohoarc; b=FBILv/b6g8mjcNFxkMBdNln8P0cVAl14uLHxnq8wwNCY75pIZZzPV8Ojt4MhuanLIbXUvvlRmZkJ1ilHOfWt5fYISO5asbeKNL16yQX4czj7AxsQQQOcmbckNGzFy6FC0S88SaGWpjA6heIPOdDV80KZYhsXeyopPHm1tqjOG1E= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359232; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=xe4xTZh/olelEWsm0lJjRBAP0V+vxyo3x0yWKfVII3Q=; b=bQeKbFdaKE2iScfkxOlEOrSL+JXC/nHYChrAni/LuE/loirs1cOzs6ooS8INbF9OcYEzfdYBLuGk9T9YFc2v1qjE72V2Rb/w5CKIy1wbEkxwz3HwpSvUtosQOHDzWFEDbvsjruiuJ2VFMz5/JARbpXNSzAZxZ41msjO0/mn4rQk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16723592324581013.3446974104033; Thu, 29 Dec 2022 16:13:52 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2r5-0002yL-09; Thu, 29 Dec 2022 19:02:35 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2r2-0002xM-R6 for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:33 -0500 Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2qz-0002fO-KC for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:32 -0500 Received: by mail-pj1-x1031.google.com with SMTP id p4so20796358pjk.2 for ; Thu, 29 Dec 2022 16:02:28 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xe4xTZh/olelEWsm0lJjRBAP0V+vxyo3x0yWKfVII3Q=; b=InX3Bww5FTo6olEtvtEQ3RMkkrfThUjDRB+E0TA+5r0J1m+uaS6rex0MZ9tBn3OqpE g+XgaagGG+QoGaOTsigKaQfzH5deXQbYwFH0fFB7RFK1YH1Le1Ls3qzzr4czRQ279pBq UmcZDbawX7dwTEuI8A8LpCxUJUKGcaXsbtiJjNxd8s1BNhsF8ZeX1l78kdL/g6COvnkJ ul30SJCiVc0BV4mgB1ybU/8FD5JtNho7Y5khSsUKkLANejykB4WxpX/D533+1I1UUYgB HZ8xf9izclQVDnHKSJxnFaKsGMQxD9JN0XYBWyiaWleI5pwOrND9yojuRSp0T1tuQ4uo TfZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xe4xTZh/olelEWsm0lJjRBAP0V+vxyo3x0yWKfVII3Q=; b=wLZhhsq95IQ1iHI+GiP4C68TTUV9SxW2KuFjR3l0GPhUg5bMyXivbHj7DMUctsk7x3 IFk47pv0bhFP07/4dfpj2VDu+9fMjBjfUe10vys6vQz4pM66QJVQlsnKD0pMJdURezDL qI8RjikiAIIplY4o6G1nj5781+pPW8GLWk6fco3wz+Ynq3Sc29B+2GCTnSziitW2C8yt 1vgQWU1n4+s23Tlm/gEmyKUGe7dbHtCjUQp/+Blm2nm7qrhb3qq993Y4IJ1Y2vywN38Y jEKUVIa5EULdZs0YcWXJbzv1nI+o3/RQweiLYo8qU0EwoLgSzOwZ21bkOI7hVetAoDzM g4qA== X-Gm-Message-State: AFqh2krvz/3sz6+eFuy2OoWI6IWBIGy1569UnDfAnNeZu8PkU2ONJ9Y7 3tGepWV5bexpdvQeXbWrn+FBa4mUMOdlQiV4 X-Google-Smtp-Source: AMrXdXsUpjPf0E/ixIXwl42EPqxdKQBHkRQEMkrALrZaCy45SdgwqUGPiHEX/UkaEIQaBQxRAKFnZQ== X-Received: by 2002:a17:902:ccc1:b0:189:8002:5f59 with SMTP id z1-20020a170902ccc100b0018980025f59mr57457991ple.57.1672358547776; Thu, 29 Dec 2022 16:02:27 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 05/47] qemu/main-loop: Introduce QEMU_IOTHREAD_LOCK_GUARD Date: Thu, 29 Dec 2022 16:01:39 -0800 Message-Id: <20221230000221.2764875-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1031.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359233177000001 Create a wrapper for locking/unlocking the iothread lock. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- include/qemu/main-loop.h | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/include/qemu/main-loop.h b/include/qemu/main-loop.h index 3c9a9a982d..c25f390696 100644 --- a/include/qemu/main-loop.h +++ b/include/qemu/main-loop.h @@ -343,6 +343,35 @@ void qemu_mutex_lock_iothread_impl(const char *file, i= nt line); */ void qemu_mutex_unlock_iothread(void); =20 +/** + * QEMU_IOTHREAD_LOCK_GUARD + * + * Wrap a block of code in a conditional qemu_mutex_{lock,unlock}_iothread. + */ +typedef struct IOThreadLockAuto IOThreadLockAuto; + +static inline IOThreadLockAuto *qemu_iothread_auto_lock(const char *file, + int line) +{ + if (qemu_mutex_iothread_locked()) { + return NULL; + } + qemu_mutex_lock_iothread_impl(file, line); + /* Anything non-NULL causes the cleanup function to be called */ + return (IOThreadLockAuto *)(uintptr_t)1; +} + +static inline void qemu_iothread_auto_unlock(IOThreadLockAuto *l) +{ + qemu_mutex_unlock_iothread(); +} + +G_DEFINE_AUTOPTR_CLEANUP_FUNC(IOThreadLockAuto, qemu_iothread_auto_unlock) + +#define QEMU_IOTHREAD_LOCK_GUARD() \ + g_autoptr(IOThreadLockAuto) _iothread_lock_auto __attribute__((unused)= ) \ + =3D qemu_iothread_auto_lock(__FILE__, __LINE__) + /* * qemu_cond_wait_iothread: Wait on condition for the main loop mutex * --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672358965; cv=none; d=zohomail.com; s=zohoarc; b=BlgJkMuc4wwFtAzDmW5wJioUi21fDmonwcM+lEs5y6yjX88dJKHuoDpSHQrjVsqCz0sDNMH9v5mfy8QhnIyxiLVqn2yepuaxFrG0jkY/BUiBJBe4zX50J6rjSYajHk5Fa0mTjbch+ido0+7475gdkfumWxCBfxmOdjnqTq/FQx0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672358965; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=J5fURURdpD95K+AiPWNLzyWdmAHAOzWJ7x2HA9bfmtE=; b=ZfyWo6AFJ2zD0ij4+sixMsn59vMoVci1t8LGbeqsEONfNwZzC75TQDFasIQ7YAR8rBcoCVC+jDLXGk/c0jGK+E5HMyePDT69y9binmXmqvkAxHfjuKrj08J9YQ3nLJKkDz1v2kqgdb/exYhOeswagr8BqR5IPyr4e78MeKz6UOk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672358965071779.2629778911997; Thu, 29 Dec 2022 16:09:25 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2r5-0002zC-TO; Thu, 29 Dec 2022 19:02:35 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2r2-0002xK-QL for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:33 -0500 Received: from mail-pj1-x1032.google.com ([2607:f8b0:4864:20::1032]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2r0-0002fT-0D for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:32 -0500 Received: by mail-pj1-x1032.google.com with SMTP id i12-20020a17090a4b8c00b0022632104a6eso2926223pjh.1 for ; Thu, 29 Dec 2022 16:02:29 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=J5fURURdpD95K+AiPWNLzyWdmAHAOzWJ7x2HA9bfmtE=; b=WBBAfHYFqRhMSfloB9ZphZXOebPiRU4uPUGjadi2DNkRE7cafnAzSt88hKj9fAk3ry W3/LXFyr4W8f/d2h1JCvhTWmqkhG6o8pcqAXWELnSyjDNBCOysoJuUOZtGaPamfhx/KS FppZNVJ3evaM2GDX4Qfzie44EpexAqR9aubTiQGDUZdWdv1+V9tKNWruhTox4/uszkBT errTush2g2cbntfmBMim4VLmofeItnChnAIJ3kbKLG9pY5i5Ht/4KPbZEQaWOPCTBZGp KhW1u+OFkqKX9KbgpWfCmRwbVjtxXtY+hef/MXT8i4JXiizJFS72gWL7Mw7SLSvEPDMN yXBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672358966424000003 Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- hw/mips/mips_int.c | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/hw/mips/mips_int.c b/hw/mips/mips_int.c index 2db5e10fe0..73437cd90f 100644 --- a/hw/mips/mips_int.c +++ b/hw/mips/mips_int.c @@ -32,17 +32,12 @@ static void cpu_mips_irq_request(void *opaque, int irq,= int level) MIPSCPU *cpu =3D opaque; CPUMIPSState *env =3D &cpu->env; CPUState *cs =3D CPU(cpu); - bool locked =3D false; =20 if (irq < 0 || irq > 7) { return; } =20 - /* Make sure locking works even if BQL is already held by the caller */ - if (!qemu_mutex_iothread_locked()) { - locked =3D true; - qemu_mutex_lock_iothread(); - } + QEMU_IOTHREAD_LOCK_GUARD(); =20 if (level) { env->CP0_Cause |=3D 1 << (irq + CP0Ca_IP); @@ -59,10 +54,6 @@ static void cpu_mips_irq_request(void *opaque, int irq, = int level) } else { cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); } - - if (locked) { - qemu_mutex_unlock_iothread(); - } } =20 void cpu_mips_irq_init_cpu(MIPSCPU *cpu) --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1030.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672358695418000003 Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- target/ppc/excp_helper.c | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index add4d54ae7..287659c74d 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -2163,22 +2163,13 @@ static int ppc_next_unmasked_interrupt(CPUPPCState = *env) void ppc_maybe_interrupt(CPUPPCState *env) { CPUState *cs =3D env_cpu(env); - bool locked =3D false; - - if (!qemu_mutex_iothread_locked()) { - locked =3D true; - qemu_mutex_lock_iothread(); - } + QEMU_IOTHREAD_LOCK_GUARD(); =20 if (ppc_next_unmasked_interrupt(env)) { cpu_interrupt(cs, CPU_INTERRUPT_HARD); } else { cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); } - - if (locked) { - qemu_mutex_unlock_iothread(); - } } =20 #if defined(TARGET_PPC64) --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359407; cv=none; d=zohomail.com; s=zohoarc; b=hiJI4PMs65xgDy7kozt5mqJ1N6cZ+Es7Gq+4Zwp6Fqr2ufLvniat1yHsFlOWD6iHMNj8ZWIvh1PsncYvhtV4y/auhGZpyzRxeolULd5WUxTSU8AqEAuBJSPd/eRUbt+xj//Q84km4XQ1umydW9IEvqPPe5qd9JVzl/uWRhOHvYU= ARC-Message-Signature: i=1; a=rsa-sha256; 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=plDIoOrc/jMHxHch1a/joN0jkJOzT26vJ1hDyyzmh0Q=; b=p4u5hdCMy8oC0Ynk7f8yKar/cGWI+6wyXmZZCVKoNxQAZR4p56FhZYFnFb2Wu9GLLl 3d/vxWSrml9v+3jOSaw3RkLSkzf4g7rQIC8NqenaLDVaJmtQBuU0jj8GPUXgtv4+k6Dz eF3iN2b3iJZrOeMxd3HBX7XuRHjWF2UITh4YAMhikbQSKKS3coAUiaQjYv/0UzVqOJE9 LS/8bukLbzziUvXl17Bhg2DnpwQGbPRn8LncmtlieW7hKDaGcpa2GzFsVMZ3PRBgOSsT yD29g4qZcg2ODAU1yJi6u9Y8F8hT5n4oNbJIUJn8TRJPnzX4pRMsZJGriOcdpBbTRDlS ev6A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=plDIoOrc/jMHxHch1a/joN0jkJOzT26vJ1hDyyzmh0Q=; b=tR/fZx5lgouzRzlFuktN7I5GsS3Foz7KN4swJ3xSQRo7LYz0aXc6dmWtIvSuDeZ4Cp 35y/wEH+U9dkei5cMPMoizsAuweAAw7zf2tQMx6eFNlMsa+Tt9oON7jZg58ldzI3xJKZ qrl6ROsWe2+aa4FH5MFTJhaiU1lpYid5rMG76EVZnq2zSmDOjFLjJ1Qn1qlj4o0scHtH DmGQ2uiIwzGXLEPGMyabUdAghwNQlmfX4p0kXDl45OXDJJhpdsz4NPvY9/yYN0+Ghpny 2H9AV3QddNbKLCCRYcXbzN8k/BOCIQFJ6hbvyotwwtwQxrVCVeKQhfC7JCpR2YjampMg kKQA== X-Gm-Message-State: AFqh2ko6iPUFHrazszkEHR3sca+EvnSbJBrj0gf7Ee0AMi1uT6IajSkC NZdgpmHHJkv/MST4oQCkALISswfO1NuroHxQ X-Google-Smtp-Source: AMrXdXvvzuTozUOrZBpAmpX8U/xmRDsvMLhR6nWnrPBhAOfqi5EtEGAh08IWFxoNbgV7FiAa5v0Vmg== X-Received: by 2002:a17:902:aa85:b0:189:894c:6b48 with SMTP id d5-20020a170902aa8500b00189894c6b48mr33155026plr.59.1672358550462; Thu, 29 Dec 2022 16:02:30 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Daniel Henrique Barboza Subject: [PULL 08/47] target/ppc: Use QEMU_IOTHREAD_LOCK_GUARD in cpu_interrupt_exittb Date: Thu, 29 Dec 2022 16:01:42 -0800 Message-Id: <20221230000221.2764875-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359407747000005 In addition, use tcg_enabled instead of !kvm_enabled. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- target/ppc/helper_regs.c | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c index c0aee5855b..779e7db513 100644 --- a/target/ppc/helper_regs.c +++ b/target/ppc/helper_regs.c @@ -22,6 +22,7 @@ #include "qemu/main-loop.h" #include "exec/exec-all.h" #include "sysemu/kvm.h" +#include "sysemu/tcg.h" #include "helper_regs.h" #include "power8-pmu.h" #include "cpu-models.h" @@ -203,17 +204,10 @@ void cpu_interrupt_exittb(CPUState *cs) { /* * We don't need to worry about translation blocks - * when running with KVM. + * unless running with TCG. */ - if (kvm_enabled()) { - return; - } - - if (!qemu_mutex_iothread_locked()) { - qemu_mutex_lock_iothread(); - cpu_interrupt(cs, CPU_INTERRUPT_EXITTB); - qemu_mutex_unlock_iothread(); - } else { + if (tcg_enabled()) { + QEMU_IOTHREAD_LOCK_GUARD(); cpu_interrupt(cs, CPU_INTERRUPT_EXITTB); } } --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359360; cv=none; d=zohomail.com; s=zohoarc; b=cAgNWmaLCUwHUK2MsD6W+T+8jIUNboD4kyG9inbssAbtOS+ouNKYU9DjAM+PYOAdL3iyGKmbm1v02Xu+Fq9uGPlHTp83l0HA8/Au5sRUXY7KruJ5qolHkQ5+796iEuh2y5wpFQWuRlV7mXuA3/g0TF+Tw9emgEBWYM4N+Rpmt7M= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359360; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=1y/tXWdTWI0vCwq66Bd7dAixKbHX6fB2Vsdpuh+SVC4=; b=fuXqroHTDdqzOgcTfkz7B4J0ZpYJfdcQK4GFV7EKrid2KTTOJw8ya/Y/OArDyt5RweKpYgRy1Q8jYwPyyxr6DOVcrzBSZeHJghsEFVMIzd99mV3GmZoCMKRdS20pMm0DSLMRTkYE224EdXLFoAGPfJ4bsbYT0IydCfOc0NMeW0k= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672359360524655.8091234701773; Thu, 29 Dec 2022 16:16:00 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2r7-000310-Tz; Thu, 29 Dec 2022 19:02:37 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2r4-0002yJ-Rh for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:34 -0500 Received: from mail-pj1-x102f.google.com ([2607:f8b0:4864:20::102f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2r3-0002g0-6c for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:34 -0500 Received: by mail-pj1-x102f.google.com with SMTP id o8-20020a17090a9f8800b00223de0364beso24358672pjp.4 for ; Thu, 29 Dec 2022 16:02:32 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1y/tXWdTWI0vCwq66Bd7dAixKbHX6fB2Vsdpuh+SVC4=; b=HxksPY9G2ZbnBY77BTiepwj81VIl2hBLXqFuzerP3bHMeHX1U4C0JQ5MXelVhol/3L 755Re1XSpyUSQ3XqaAKkYoBz5zG5fCJAiqg2mBN7ZV7ODrTsYCG6evS0CcZbt6jCVzuX 07Ol1H+7VJuikty2a+oaIP7sZSTpuCgvyarjwVBQ7KZRCkqIWZaMmi9R8SBJ2zdawBsi wjs/UwINaS0+HFoBexxQvjiJRAeny3uZlUVIRDO1ST7xKMT5E+aejn5PfOHb1marNlSj BX4h0bwWRsojt/XBvYNfkm4LQOmjgiKXQ0/YLdH6REFQgNw9rU90xU68zmv4/ywTSTFK Kkmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1y/tXWdTWI0vCwq66Bd7dAixKbHX6fB2Vsdpuh+SVC4=; b=nsIeD+pdXkP13us5TV25qJT9qsej7dVL7/Yg6k0zbT7dM++x94WGrYX7TLtaRRiFLg XC29mgV2/Dc5FT0i2XLR6tibTBnMsXJv7G4LM8kJ4TgP484UKVD3aOeSJdNCcbDREg8C SWsOyzXw6uchxcJP9GRjig8s6k7ka5GkLdL5h+pehsMJrBfHsnnvHwBAR8hGdnF0S1P4 8W+Oi8kicNBd3GIlHTuEaXXXTH+E8j/6AFDJwRLJIHtC7sFJjJ2D67y0wy5bXwvvYTzY 6yBZ8Gb5xAH4PuuXgGY6SBkVRTfLKB8WO3Twujyt0kJtHEnOXxg5sxCMxXdbaZpKZNDn Kqrg== X-Gm-Message-State: AFqh2krVkGiNTwW7DR5s2aoZT+cRs93FVdtuW39E1qIwhQRcR1xnuM9U AMlKA482UPKvodgPDBXASHAJAfKVqCoe4cUj X-Google-Smtp-Source: AMrXdXvmnj4r4ZC4aJlQPeTnD1NsW3Ry5LamEAAQk/xve8tcUZhpOk6+RsSkySEfNgLw16GQEVbZAQ== X-Received: by 2002:a17:902:d2cd:b0:192:9c7a:e60c with SMTP id n13-20020a170902d2cd00b001929c7ae60cmr6953086plc.48.1672358551406; Thu, 29 Dec 2022 16:02:31 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis Subject: [PULL 09/47] target/riscv: Use QEMU_IOTHREAD_LOCK_GUARD in riscv_cpu_update_mip Date: Thu, 29 Dec 2022 16:01:43 -0800 Message-Id: <20221230000221.2764875-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359361623000001 Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson --- target/riscv/cpu_helper.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 278d163803..241d06bab8 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -610,7 +610,6 @@ uint64_t riscv_cpu_update_mip(RISCVCPU *cpu, uint64_t m= ask, uint64_t value) CPURISCVState *env =3D &cpu->env; CPUState *cs =3D CPU(cpu); uint64_t gein, vsgein =3D 0, vstip =3D 0, old =3D env->mip; - bool locked =3D false; =20 if (riscv_cpu_virt_enabled(env)) { gein =3D get_field(env->hstatus, HSTATUS_VGEIN); @@ -621,10 +620,7 @@ uint64_t riscv_cpu_update_mip(RISCVCPU *cpu, uint64_t = mask, uint64_t value) mask =3D ((mask =3D=3D MIP_VSTIP) && env->vstime_irq) ? 0 : mask; vstip =3D env->vstime_irq ? MIP_VSTIP : 0; =20 - if (!qemu_mutex_iothread_locked()) { - locked =3D true; - qemu_mutex_lock_iothread(); - } + QEMU_IOTHREAD_LOCK_GUARD(); =20 env->mip =3D (env->mip & ~mask) | (value & mask); =20 @@ -634,10 +630,6 @@ uint64_t riscv_cpu_update_mip(RISCVCPU *cpu, uint64_t = mask, uint64_t value) cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); } =20 - if (locked) { - qemu_mutex_unlock_iothread(); - } - return old; } =20 --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359074; cv=none; d=zohomail.com; s=zohoarc; b=GVV/jGdf1pBCsozMPbQYSzfzy6R+PvogBNx+MD4tIaPSFG4xQQ4B6OVMAhs9NSG11JKbw15QB+I5DdvdnkxFf9UvLOiHXoHaMReyTzC16d7VxzGfwOqk1CQHJyaHHY/EZRHByJ/QSKaLe+n+z6z728FASAVkvT9q5NhPEUycov8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359074; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=rFR0O1YijUsq1uYIRbDYqS29WFSZX2n/uoAxYINV+hk=; b=RMPeb+pD7kyTa4cvD/mcjcg8bhwebuUUFboH8cEVHzIiIN0gd5dFdSRIL0Hu1+fWIsjj2YLLpEyPmlVm3HAstGtKkFbPe+lLJ2c39xjCmxb7ehc00BS7omywXNcM5f+sy5Rlo4/i5f4UmiPKgFM9Tfdl6/M6uLSwK4kZGLyURKc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 167235907470346.247611417522535; Thu, 29 Dec 2022 16:11:14 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2rC-000332-Uw; Thu, 29 Dec 2022 19:02:42 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2r5-0002yu-Nf for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:35 -0500 Received: from mail-pj1-x1033.google.com ([2607:f8b0:4864:20::1033]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2r3-0002gR-Tw for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:35 -0500 Received: by mail-pj1-x1033.google.com with SMTP id o1-20020a17090a678100b00219cf69e5f0so24375389pjj.2 for ; Thu, 29 Dec 2022 16:02:33 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rFR0O1YijUsq1uYIRbDYqS29WFSZX2n/uoAxYINV+hk=; b=Yxmg1DpEG+35EWc1BpVW9AGd9v1eO+rAmp3ncEbT4yC9aIq5epS+qwFw4Nqv7ezsDF 6yjSlPkzNcoEgqvzfajtf9fddGSzAeL/4/UfGdbOLisN7xEr0zH/L3kqKDtTdzFCI0OO ySBf3a+r1Fl6lttzQR+MDYzgNnw39xRj50I8hkNrWqFdDeXEIwYLERPZIY/yhoRo8iyX QgmTGScc4iSmnWtBJir3dsIO8EkA5OZ/eQA+q5EHAgN7CGYxLuQB/nDBCjrRwTXiVIrZ 07hn8OILWg6Ap7mejSDWrqmgYy+5Dl/rjW3dAjXsmjkZV01KgfGemuI48FoWvmQ88hIg tx3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1033.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359074836000001 Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- hw/ppc/ppc.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c index dc86c1c7db..4e816c68c7 100644 --- a/hw/ppc/ppc.c +++ b/hw/ppc/ppc.c @@ -44,13 +44,9 @@ void ppc_set_irq(PowerPCCPU *cpu, int irq, int level) { CPUPPCState *env =3D &cpu->env; unsigned int old_pending; - bool locked =3D false; =20 /* We may already have the BQL if coming from the reset path */ - if (!qemu_mutex_iothread_locked()) { - locked =3D true; - qemu_mutex_lock_iothread(); - } + QEMU_IOTHREAD_LOCK_GUARD(); =20 old_pending =3D env->pending_interrupts; =20 @@ -67,10 +63,6 @@ void ppc_set_irq(PowerPCCPU *cpu, int irq, int level) =20 trace_ppc_irq_set_exit(env, irq, level, env->pending_interrupts, CPU(cpu)->interrupt_request); - - if (locked) { - qemu_mutex_unlock_iothread(); - } } =20 /* PowerPC 6xx / 7xx internal IRQ controller */ --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359139; cv=none; d=zohomail.com; s=zohoarc; b=BolPTSWw65GO/zBmc2zqNpCkMkVZFdLR95eI/2qNb60x18poYJ+dcKXICmFhyMYzWQXCvOoMKut06Cu8MDl2TAovmoNbBUORT9/D+OZJYZbqJRLo/bzQ6y70bZCXgOvZIOm09qK9ryxQUumEXYYAciEUuLxwaIfMzacOpFKGS7E= ARC-Message-Signature: i=1; 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yTAFA5u9VpP4tWGyC/Uni1rtwcEMMx/BI1MBDPeSpjQ=; b=Ux57F5sVqlCG8QYQDCHCLHXGC9OrJDcdjUG1Oly4PodSzKqDN7CQ3I0BKmzeLEYARC 3NRGBtvOHIkxuqewC/907+ssP1DfQQq7qRUmVYQsj6OUZ02Sm7R0Jtk8QNCt+4wK0tpC pocvlI2RUc3TQhaoByuaozEA+tVFb9X4rZguy1mtaj4hbty1ZwgjYL/bGtvIRFhETw4B Kbla5NTQGzYNL/Q6M8eL/HdChbaT6vCyDn6ixHt0V2/3TDGtLY0qZJT+GusoEmbFdIbw G4J3yvqe0doY/xe+yos49ND9yrnSJthbL+IaCguRV/x1wMkfaOYAavOVEd8ag+KSi3i6 ukNg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yTAFA5u9VpP4tWGyC/Uni1rtwcEMMx/BI1MBDPeSpjQ=; b=zawUmGx5SF+iFOSVY0Cpudb0m7FOUrLNmrjoh9M5ULteEAN6NKRxXPZicFptZadC4Z WrDyDncAwxjxRmajZS+ICaBlj2U3OGuHtFeUvwT+BQ1QnkWpbAm04JAV8Veihxlegb/a VbLE4qIQssyCAEiuKlpB8zIFX30uhoTMJSLikuFDUaez2B83Ogh5R6x2ZhG41EmYR4Qc iUWnJS8/uP64872QSfeg+HcsIsY0nB00dsui+7SAHdHB7p/PKn9WOMRfWcq/L8TrVhEY gYKCqmTurhk5iHp2bBTgkHiN2isfr/vV4Btw8rND7+Nj6oa6BLX++YYXUTj++bi7Y7wK /OyA== X-Gm-Message-State: AFqh2kpzp6xwyqaYP8/4UDD5UPim1BbS3twMRURp3ZWb9mg8zzhh+lI6 3a9nMjH+XVuF+pMfT1urgDsw2M7uwJLuljm9 X-Google-Smtp-Source: AMrXdXs6CALUgcIePhqTYrbYl9HImaFL7hn6eh0wezcjRcberlwms4CQsY141GEuHcDizQ6L21imqQ== X-Received: by 2002:a17:902:b609:b0:192:4ed2:7509 with SMTP id b9-20020a170902b60900b001924ed27509mr31905401pls.15.1672358553306; Thu, 29 Dec 2022 16:02:33 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 11/47] accel/tcg: Use QEMU_IOTHREAD_LOCK_GUARD in io_readx/io_writex Date: Thu, 29 Dec 2022 16:01:45 -0800 Message-Id: <20221230000221.2764875-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1033.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359140746000001 Narrow the scope of the lock to the actual read/write, moving the cpu_transation_failed call outside the lock. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- accel/tcg/cputlb.c | 25 ++++++++----------------- 1 file changed, 8 insertions(+), 17 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 03674d598f..4948729917 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1356,7 +1356,6 @@ static uint64_t io_readx(CPUArchState *env, CPUTLBEnt= ryFull *full, MemoryRegionSection *section; MemoryRegion *mr; uint64_t val; - bool locked =3D false; MemTxResult r; =20 section =3D iotlb_to_section(cpu, full->xlat_section, full->attrs); @@ -1367,11 +1366,11 @@ static uint64_t io_readx(CPUArchState *env, CPUTLBE= ntryFull *full, cpu_io_recompile(cpu, retaddr); } =20 - if (!qemu_mutex_iothread_locked()) { - qemu_mutex_lock_iothread(); - locked =3D true; + { + QEMU_IOTHREAD_LOCK_GUARD(); + r =3D memory_region_dispatch_read(mr, mr_offset, &val, op, full->a= ttrs); } - r =3D memory_region_dispatch_read(mr, mr_offset, &val, op, full->attrs= ); + if (r !=3D MEMTX_OK) { hwaddr physaddr =3D mr_offset + section->offset_within_address_space - @@ -1380,10 +1379,6 @@ static uint64_t io_readx(CPUArchState *env, CPUTLBEn= tryFull *full, cpu_transaction_failed(cpu, physaddr, addr, memop_size(op), access= _type, mmu_idx, full->attrs, r, retaddr); } - if (locked) { - qemu_mutex_unlock_iothread(); - } - return val; } =20 @@ -1410,7 +1405,6 @@ static void io_writex(CPUArchState *env, CPUTLBEntryF= ull *full, hwaddr mr_offset; MemoryRegionSection *section; MemoryRegion *mr; - bool locked =3D false; MemTxResult r; =20 section =3D iotlb_to_section(cpu, full->xlat_section, full->attrs); @@ -1427,11 +1421,11 @@ static void io_writex(CPUArchState *env, CPUTLBEntr= yFull *full, */ save_iotlb_data(cpu, section, mr_offset); =20 - if (!qemu_mutex_iothread_locked()) { - qemu_mutex_lock_iothread(); - locked =3D true; + { + QEMU_IOTHREAD_LOCK_GUARD(); + r =3D memory_region_dispatch_write(mr, mr_offset, val, op, full->a= ttrs); } - r =3D memory_region_dispatch_write(mr, mr_offset, val, op, full->attrs= ); + if (r !=3D MEMTX_OK) { hwaddr physaddr =3D mr_offset + section->offset_within_address_space - @@ -1441,9 +1435,6 @@ static void io_writex(CPUArchState *env, CPUTLBEntryF= ull *full, MMU_DATA_STORE, mmu_idx, full->attrs, r, retaddr); } - if (locked) { - qemu_mutex_unlock_iothread(); - } } =20 static inline target_ulong tlb_read_ofs(CPUTLBEntry *entry, size_t ofs) --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672358649; cv=none; d=zohomail.com; s=zohoarc; b=LBBs28WLJsy+sYWbhAw9KfEbioiWxqOaZRWwIARzMleKI5yhP67PF0BadxrWUxRNM23zec5vu8LVLLjY441FtkdLfyQ5IqhAwRurslaJ32vfvTwJ2CCpaNZHXDEn4QM+g+PYPUZMvYHUPUr+0EegUpzh903gYYBpeDSn2LyFmzs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672358649; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=vtHTxOsR6ht0+9SPiWHuqeFVG+XUj4+DdhfsvFYW/Qc=; b=NGqqiZdevIxPR702GwJkbk73GB3NjfhW6q2ojbby9kuIW5nD6WGrVP3zLQYDFGniFhBJWzaqPVU5As2jgnFyVBQxeas7i/8CBEc8O6Vg0dlMybskv2ksDz0Nqa/A3B4+iTEW69Nuc6aSrgvC5gSm0VdXtB1Ds7OnnnZ+tCOxYvE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672358649772883.7637803814865; Thu, 29 Dec 2022 16:04:09 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2r9-00031g-8L; Thu, 29 Dec 2022 19:02:39 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2r7-00030h-L8 for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:37 -0500 Received: from mail-pj1-x102d.google.com ([2607:f8b0:4864:20::102d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2r5-0002gz-Qg for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:37 -0500 Received: by mail-pj1-x102d.google.com with SMTP id fy4so20830718pjb.0 for ; Thu, 29 Dec 2022 16:02:35 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vtHTxOsR6ht0+9SPiWHuqeFVG+XUj4+DdhfsvFYW/Qc=; b=CuhoUqCNKff5g05AesnvhmC82N0vQzpitb3pRHJSXSO3hBBXvOP0eYYGv+HgpNfeCo xJ1lFKkSbb9ow8bmoV68dQ5UHXuKMxsBn0ZJTwwc2ZONESqIbfFxZmctSe8MvxYYb9x9 waODVHF7gY/1PlcXEhY89PFnxMxHLgsvJUPh2QK1GbwQhtmPFdDfURfV3lAClK7tSOU8 vthdwe54NsFGEyGFbpRryFMp5Wrk0JmnXKQ7EGtj0Y905AprkiMhR0WwlXhHw0Vs7r25 qAvmyivXeAgvE/u7rAuHW7ZBaRxNuLlCI+WEPliiyCzFvIEB/pAN/oKBIsORsXGJ9um8 Za/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vtHTxOsR6ht0+9SPiWHuqeFVG+XUj4+DdhfsvFYW/Qc=; b=vnzp33ofXBQ+IWxMk+5KZhGt6ghQ4kFCbtpvBh1q0PTuSVCIJjd0Ri952YCu+RMLVm F+Bti8mnhNAF6fWGoE3KjbeUyJbEJJwC4AOT3U3ELH5yOvm4cUh3QmYiny0sGnw7CsDT S+Qa9ssQtt3v+VaDcyNFT9J9kQzEtUB4Z8Pi2XHnRt3irvUuMJftWFO3yCabo3MKcV6X YzZLXvzDyUsfyIPqLlAsziebW3+EIK7rhV2xRoQDQHWtv4IjbGehA7p7x415LR/j3nKc a10AbVbTUVGejA3h34EjoJltxUcC1Qx4g6mKAYgkgbWsUUC2m2SWUDcfXfFqJItPAZI7 CY3Q== X-Gm-Message-State: AFqh2krZ8jslEGrsCeRq2/4dV/jxk/Ln8R/qzdSjmjvbD2ebVDawhWCd SbRaWh/q65Sn4aPjSPo2bQXJZzRJRw9Z7PZP X-Google-Smtp-Source: AMrXdXsD4uenCT4WjV5ariakcogv6ryZqvKgWqJyE1X2iiMvqx+DzOUWLuVHkgAkkrHY3MCeUlqbKQ== X-Received: by 2002:a17:903:443:b0:189:c7e3:275f with SMTP id iw3-20020a170903044300b00189c7e3275fmr31281668plb.38.1672358554257; Thu, 29 Dec 2022 16:02:34 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 12/47] tcg: Tidy tcg_reg_alloc_op Date: Thu, 29 Dec 2022 16:01:46 -0800 Message-Id: <20221230000221.2764875-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672358651618000003 Replace goto allocate_in_reg with a boolean. Remove o_preferred_regs which isn't used, except to copy. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/tcg.c | 45 +++++++++++++++++++++------------------------ 1 file changed, 21 insertions(+), 24 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index db64799e03..215ddf2db5 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -3607,7 +3607,8 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCG= Op *op) =20 /* satisfy input constraints */ for (k =3D 0; k < nb_iargs; k++) { - TCGRegSet i_preferred_regs, o_preferred_regs; + TCGRegSet i_preferred_regs; + bool allocate_new_reg; =20 i =3D def->args_ct[nb_oargs + k].sort_index; arg =3D op->args[i]; @@ -3622,9 +3623,12 @@ static void tcg_reg_alloc_op(TCGContext *s, const TC= GOp *op) continue; } =20 - i_preferred_regs =3D o_preferred_regs =3D 0; + reg =3D ts->reg; + i_preferred_regs =3D 0; + allocate_new_reg =3D false; + if (arg_ct->ialias) { - o_preferred_regs =3D op->output_pref[arg_ct->alias_index]; + i_preferred_regs =3D op->output_pref[arg_ct->alias_index]; =20 /* * If the input is readonly, then it cannot also be an @@ -3633,30 +3637,23 @@ static void tcg_reg_alloc_op(TCGContext *s, const T= CGOp *op) * register and move it. */ if (temp_readonly(ts) || !IS_DEAD_ARG(i)) { - goto allocate_in_reg; + allocate_new_reg =3D true; + } else if (ts->val_type =3D=3D TEMP_VAL_REG) { + /* + * Check if the current register has already been + * allocated for another input. + */ + allocate_new_reg =3D tcg_regset_test_reg(i_allocated_regs,= reg); } - - /* - * Check if the current register has already been allocated - * for another input aliased to an output. - */ - if (ts->val_type =3D=3D TEMP_VAL_REG) { - reg =3D ts->reg; - for (int k2 =3D 0; k2 < k; k2++) { - int i2 =3D def->args_ct[nb_oargs + k2].sort_index; - if (def->args_ct[i2].ialias && reg =3D=3D new_args[i2]= ) { - goto allocate_in_reg; - } - } - } - i_preferred_regs =3D o_preferred_regs; } =20 - temp_load(s, ts, arg_ct->regs, i_allocated_regs, i_preferred_regs); - reg =3D ts->reg; + if (!allocate_new_reg) { + temp_load(s, ts, arg_ct->regs, i_allocated_regs, i_preferred_r= egs); + reg =3D ts->reg; + allocate_new_reg =3D !tcg_regset_test_reg(arg_ct->regs, reg); + } =20 - if (!tcg_regset_test_reg(arg_ct->regs, reg)) { - allocate_in_reg: + if (allocate_new_reg) { /* * Allocate a new register matching the constraint * and move the temporary register into it. @@ -3664,7 +3661,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCG= Op *op) temp_load(s, ts, tcg_target_available_regs[ts->type], i_allocated_regs, 0); reg =3D tcg_reg_alloc(s, arg_ct->regs, i_allocated_regs, - o_preferred_regs, ts->indirect_base); + i_preferred_regs, ts->indirect_base); if (!tcg_out_mov(s, ts->type, reg, ts->reg)) { /* * Cross register class move not supported. Sync the --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672358681; cv=none; d=zohomail.com; s=zohoarc; b=gcCZzwSFrJVYZHC+Sa/2T9Md7JlR/rQ3ISNvWu3VUgEvES3/wb2Uomr7g0uFrvE6B3+y20OHHesb4jKLPYPS2mkJFL1+ii8R/DnGOalbX3cGovrvX89kTXlO7Tv9fqbo+0ncgE6JjWdXruIufp0vO0VhnOFALuODdyGJ97CSkvs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672358681; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=ICnDE5CkA2lmO28avcdDx7Ov//rZAy7zNfU1ruYzqlU=; b=mgYdaUPqXDJOvyj4FPhBDBL/sMAChKUJSMwR7EaW96XOCpgpAl9Vg52WDN0YW1i0OnLxnTx285R4QH2vSAWsyhvCDGBlx0ctGyDeiC1WfyFsuf5c5vp8Lt+uLyrEPXiGIR06tg4QiiWhtB8VWOfV33FqT3qi7sl3UpqW2o9Xmj8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672358681891157.9451049712843; Thu, 29 Dec 2022 16:04:41 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2rB-00032B-1y; Thu, 29 Dec 2022 19:02:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2r8-000317-Ar for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:38 -0500 Received: from mail-pl1-x62d.google.com ([2607:f8b0:4864:20::62d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2r6-0002hC-JT for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:38 -0500 Received: by mail-pl1-x62d.google.com with SMTP id m4so20370874pls.4 for ; Thu, 29 Dec 2022 16:02:36 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ICnDE5CkA2lmO28avcdDx7Ov//rZAy7zNfU1ruYzqlU=; b=xdE1yUOXFiKW5kpfFqQqgypJYicUEhTmb0vH18lmIH1o6wFYZZjLR93KLydG7rta44 BW7r6HooNlIV6IraZh6VB+NZ+O7YKeE9rt68rHqek8LSFF5is9lsVUZu1REVnK5vSOx0 K1QC10puMCt5LbcrK8zPQucn7VmZvRr4xOUCsb6IsLZGNswakM214LCBiaRZKQ3iAICH aJpPM29GNGdKMkJv9gabDnXBJhRxek7dZ9FyXkQ0tAeL/r+NMJ0hqT02oa0sDKFLYe7i WETbHMKXtP/5aYFkOywLBcIym59Bj3PCsY0eBHnelQKv8XE1ovv6JUppyTRuo6meWzGD 7Vyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ICnDE5CkA2lmO28avcdDx7Ov//rZAy7zNfU1ruYzqlU=; b=8JOoCv+cH8VP6N+ZYGKuThzx8dQnVyh/ynPNqE9cwIF2qqTDq8ratMbBo1+H3ulssr 392wXiFPV3Ip/FiQKq4pLW66rn2LGGXHZXClNO5Vs3VG0WyOshGwjGXEGHIqBLHjzdvp lDtx1qCi2SX6IbBhyly8Sp8RGrgR1BTSGrIAnSWjbpTiqs9B2plt4dADKDZdWNtzyolF Unl2aZ/Q+TrvL3G2T4m6rJSwIpbQsKmz0ctk3o1y08pGwNDsJlCM2gBh8XrhF9vcXgmd bEjS/jCAOLNl+SZ1vWYB3LPsu7tUdtRsureeMIMhwHCZWk3VXBeV4C3pCA5p1N96T1EC BELw== X-Gm-Message-State: AFqh2kpYCeZsftcBAE1F79UT2gSkP6FL9bzEAevzIU/xnHij7GgWKRnu i6WDGw78bnOx5g03fjpBvkqXaY8eUfSkRzWM X-Google-Smtp-Source: AMrXdXtdM1PuqTAaAVHZN/XzrPOx3s8IyDU+iwYe6DTWEq3PODqSygvjEU7AfmdJ9QOHEmEpamrSyQ== X-Received: by 2002:a17:903:28e:b0:192:a470:c6d with SMTP id j14-20020a170903028e00b00192a4700c6dmr3191440plr.41.1672358555180; Thu, 29 Dec 2022 16:02:35 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 13/47] tcg: Remove TCG_TARGET_STACK_GROWSUP Date: Thu, 29 Dec 2022 16:01:47 -0800 Message-Id: <20221230000221.2764875-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672358685219000001 The hppa host code has been removed since 2013; this should have been deleted at the same time. Fixes: 802b5081233a ("tcg-hppa: Remove tcg backend") Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.h | 1 - tcg/arm/tcg-target.h | 1 - tcg/tcg.c | 32 ++------------------------------ 3 files changed, 2 insertions(+), 32 deletions(-) diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h index 485f685bd2..e145d50fef 100644 --- a/tcg/aarch64/tcg-target.h +++ b/tcg/aarch64/tcg-target.h @@ -16,7 +16,6 @@ #define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 24 #define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) -#undef TCG_TARGET_STACK_GROWSUP =20 typedef enum { TCG_REG_X0, TCG_REG_X1, TCG_REG_X2, TCG_REG_X3, diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index 7e96495392..56c1ac4586 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -30,7 +30,6 @@ extern int arm_arch; =20 #define use_armv7_instructions (__ARM_ARCH >=3D 7 || arm_arch >=3D 7) =20 -#undef TCG_TARGET_STACK_GROWSUP #define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 16 #define MAX_CODE_GEN_BUFFER_SIZE UINT32_MAX diff --git a/tcg/tcg.c b/tcg/tcg.c index 215ddf2db5..05d2b70ab7 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1552,25 +1552,8 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int nar= gs, TCGTemp **args) } =20 if (TCG_TARGET_REG_BITS < 64 && is_64bit) { - /* - * If stack grows up, then we will be placing successive - * arguments at lower addresses, which means we need to - * reverse the order compared to how we would normally - * treat either big or little-endian. For those arguments - * that will wind up in registers, this still works for - * HPPA (the only current STACK_GROWSUP target) since the - * argument registers are *also* allocated in decreasing - * order. If another such target is added, this logic may - * have to get more complicated to differentiate between - * stack arguments and register arguments. - */ -#if HOST_BIG_ENDIAN !=3D defined(TCG_TARGET_STACK_GROWSUP) - op->args[pi++] =3D temp_arg(args[i] + 1); - op->args[pi++] =3D temp_arg(args[i]); -#else - op->args[pi++] =3D temp_arg(args[i]); - op->args[pi++] =3D temp_arg(args[i] + 1); -#endif + op->args[pi++] =3D temp_arg(args[i] + HOST_BIG_ENDIAN); + op->args[pi++] =3D temp_arg(args[i] + !HOST_BIG_ENDIAN); real_args +=3D 2; continue; } @@ -3854,12 +3837,6 @@ static bool tcg_reg_alloc_dup2(TCGContext *s, const = TCGOp *op) return true; } =20 -#ifdef TCG_TARGET_STACK_GROWSUP -#define STACK_DIR(x) (-(x)) -#else -#define STACK_DIR(x) (x) -#endif - static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op) { const int nb_oargs =3D TCGOP_CALLO(op); @@ -3899,18 +3876,13 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp= *op) stack_offset =3D TCG_TARGET_CALL_STACK_OFFSET; for (i =3D nb_regs; i < nb_iargs; i++) { arg =3D op->args[nb_oargs + i]; -#ifdef TCG_TARGET_STACK_GROWSUP - stack_offset -=3D sizeof(tcg_target_long); -#endif if (arg !=3D TCG_CALL_DUMMY_ARG) { ts =3D arg_temp(arg); temp_load(s, ts, tcg_target_available_regs[ts->type], s->reserved_regs, 0); tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_off= set); } -#ifndef TCG_TARGET_STACK_GROWSUP stack_offset +=3D sizeof(tcg_target_long); -#endif } =20 /* assign input registers */ --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359497; cv=none; d=zohomail.com; s=zohoarc; b=dTfjhJJ4GYMjlQm9dlFT6yW27shpMS+Mz/pz8p+AgzRNATVmFVAyDHBPYzq4/dRMzkMPiJMtx64OAdm3tNEUUalAJ16oNw1tDVNR+N+VK0BwiSzUaoS65uNOxU2oqxs54gcnQEftFq1Wdfl67Sfx9NwlkByXcJKSCoyVHQQfDBo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359497; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=D8QfQ1uDgH78xLrd7SQL4h0WAoUU3UOZ3RoOlmiv5EM=; b=GIPjJKa5k47C4htv2/utEZ7K8lVTAVNKsWUEdAFu5IzAUUtwayVWiQxq3SP3D4NinHDikIGf3ZCce1cblM6HjPzxM7kwviIPV4BKSjjudPW5bWzao8jJNJIxtZU8bkMn/uRxTxDa6k3mgaITN9Hf8vzypUrFfQt3FvgSsuqaUP0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672359497498426.8509758633087; Thu, 29 Dec 2022 16:18:17 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2rA-00031m-3s; Thu, 29 Dec 2022 19:02:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2r8-00031D-Gq for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:38 -0500 Received: from mail-pj1-x102f.google.com ([2607:f8b0:4864:20::102f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2r6-0002g0-To for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:38 -0500 Received: by mail-pj1-x102f.google.com with SMTP id o8-20020a17090a9f8800b00223de0364beso24358816pjp.4 for ; Thu, 29 Dec 2022 16:02:36 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=D8QfQ1uDgH78xLrd7SQL4h0WAoUU3UOZ3RoOlmiv5EM=; b=XDvLP2D4sbHY9NDu/KvrVhYeB2GOX4knxUYlKvLRGZjXhRHdUK30YpqvQ2Fas5/WGm zBh95vQMfSOTxco1aIk6FzAilcBFIFJYBEZG8Fl/BTf2Q2MnWvNwktkiob28QYjs3RBT wS2tJ583tmnuQ0WWhIq9AYU2FRyhAD8rI4du2a2eq6ECMdym75GCFPcUMyxfzNaAUXMI xmyQaa3WBZlUzvPU6PN6eqo7e9OnJStNcwG0Y92RyVuXcg0NLZkN98R90LgCw4GrZya4 9viS6DM1o68IiGspa5d4RlvSB2zYyj2GTXdCMHtw50iYWVVLoGw64zvrfSbzaG6loQhS hWbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=D8QfQ1uDgH78xLrd7SQL4h0WAoUU3UOZ3RoOlmiv5EM=; b=vNP5R/HUNC5GTdzdPQBNOSoUP1QDb70C1XCKR6DtmOdMgJHHqtSrSpdnJQrJMSWclg YTbKzlgQMYLa/ixKy7qc0rKsUqPHB1+z0uiK1SPGdBqwjnPwXL6NPnSdRcFpy2VD/Hzu t/WRPiEWOaFXk7rzBUPNLDnwRH0fZBwkmxsiR0B8eesat7DbquozmkT4m8PQBsbtXmfC 6bxAg4+V4JMSca1J0xzksF4PvTGMulDylauG9RdJno2SZjCKld47K+O1RiU3YqhTeajM YYhCIcQGuGmOFCEcdlqMSS9LphYF0V87l6+sjX/0axrufUqTw8CQkbUCZ5oluTtvZV+r Xc7g== X-Gm-Message-State: AFqh2kqEoBtZdK9Eu3I51dDd4FlfCq/jamYTRSOYhOBfKp7T61wzQUBt io2Gj2zZarJ/g+jJhBMC/CqVhh+GowmUlWyn X-Google-Smtp-Source: AMrXdXu+oRPFYHXtAXaiQWc/JClwyHBSWL2/CszSRZHfd+NnaLD9Ja4nX2kb7mB2AO6cXPQBHAjwXQ== X-Received: by 2002:a17:902:ea0a:b0:192:6b73:ccee with SMTP id s10-20020a170902ea0a00b001926b73cceemr30844831plg.18.1672358556097; Thu, 29 Dec 2022 16:02:36 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 14/47] tci: MAX_OPC_PARAM_IARGS is no longer used Date: Thu, 29 Dec 2022 16:01:48 -0800 Message-Id: <20221230000221.2764875-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359498100000005 Unused since commit 7b7d8b2d9a ("tcg/tci: Use ffi for calls"). Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/tci.c | 1 - tcg/tci/tcg-target.c.inc | 4 ---- 2 files changed, 5 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index bdfac83492..05a24163d3 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -18,7 +18,6 @@ */ =20 #include "qemu/osdep.h" -#include "tcg/tcg.h" /* MAX_OPC_PARAM_IARGS */ #include "exec/cpu_ldst.h" #include "tcg/tcg-op.h" #include "tcg/tcg-ldst.h" diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index f3d7441e06..c1acaa943e 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -197,10 +197,6 @@ static const int tcg_target_reg_alloc_order[] =3D { TCG_REG_R0, }; =20 -#if MAX_OPC_PARAM_IARGS !=3D 7 -# error Fix needed, number of supported input arguments changed! -#endif - /* No call arguments via registers. All will be stored on the "stack". */ static const int tcg_target_call_iarg_regs[] =3D { }; =20 --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359278; cv=none; d=zohomail.com; s=zohoarc; b=lzGbawp5YvtRVOGi44EE2SLvCbsjc/Axqt2t1lMFjSf1P1dy3NpAf9XIttqpYt8WnnM4+rviCE7a1eWGhTJR/ar6Ye4AadrzwZgJg5JyBh88WkhMdMQSP7wxdYU9jeNSkGcFMPSwp/HSHZ8YwWDU4Dqy5VBEADeUuXn4MGCInNc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359278; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=14I+QLaNg6Y9e4H/8QMxuuyCzHk2ngznUAbtAPjHaRo=; b=hYUkCC3YAj0uDNeffXwqbAH1+i45FcYPeo/jhOz/dcc+FondJA6q00mkd3mW4CayzXh6Srd9fiXT1+Q7Qq4Z1YrELazmTq684jnOEjbA2cWvu5fAb76/ChSRQeFyLYQkXxGT0gayFU0vxR7B39TYiOiAcJdP/c6DpMv8yanZ1g0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672359277952429.5955181271547; Thu, 29 Dec 2022 16:14:37 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2rA-000322-Uz; Thu, 29 Dec 2022 19:02:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2r9-00031n-Vt for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:40 -0500 Received: from mail-pl1-x630.google.com ([2607:f8b0:4864:20::630]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2r8-0002hW-Ac for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:39 -0500 Received: by mail-pl1-x630.google.com with SMTP id d9so3610128pll.9 for ; Thu, 29 Dec 2022 16:02:37 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.36 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=14I+QLaNg6Y9e4H/8QMxuuyCzHk2ngznUAbtAPjHaRo=; b=YXDY7Gnc2LNTkdXFDVwU0n9aaJIVsDn2nVtGQiBNASSBBJKzRZMFWhXIYcoZBiSeHP laP/qxK9gFNhdqE1TrTz0xDRxn0rHqczYlUqzVPvRG3y4cYFy7E43z0BjWUNwJTQgNhm ZSxiBSdClMDQ/Mrd32+4dPsaUY1IZQo2O+Zoq/ZEqDz7TCfwjot5qYydrHhBe5Wkf7v2 /8UJ/mt7Amf1Jl1NQje1lGYZ/DCWYRXxboOz9yRXiTlEjKC1PU1zmoFr6UNd1oDEfPLO cAVEXtScYj8jgUaSVFWjCdMoRJN5PkUhdayNhzXlRibrUttmMX+1+5pix1ynmRN6wEfL crRw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=14I+QLaNg6Y9e4H/8QMxuuyCzHk2ngznUAbtAPjHaRo=; b=CFBlFGXGHQVRZIzYqdN8BEzMBK+kG10OecrSt5BAYys9VfETYfRj/ppqh4Qb80pMAF 6uJdhDDYnFsNj8VHzceDzSGM9lDj9VfMOEHaaIavQEo6KW+yTL1QRbTCDpBiURS6PyVE v+huRJ6plRrLLQ0T6JdkjpOWjlCjpI9Kls8WpVD2CsxzJYEbvq52AIDNT5xeYX0tC4FH KWQvh/Rqn4w9HGPf0idKwh8c012aCBsNWXRiMJv4FfZ8cDhHF1fWXU0n8AujEPj2AmZy Z+MhljZPZVKIITr49JsdYWVAtLs6hPoTVcQQAeFns2JKF7+wlAomFD5M4JJNrdaajcUI mjCw== X-Gm-Message-State: AFqh2kqYW3Ut9HD2ikqkfMJPOzIQM/qWXncYSs+VZCMPJaelwtJh8IO/ eU5fEYI+xApPc/4yuVYiX14bf+j/bi+Se2UA X-Google-Smtp-Source: AMrXdXuqpHSwdDPl5a/EveBJCtKoCeXj6zp9ak2BLFPapaKXtAqL+9WXAKbjvmuykCbvU/LmWhfqCw== X-Received: by 2002:a17:902:904b:b0:186:95c9:ddc9 with SMTP id w11-20020a170902904b00b0018695c9ddc9mr37846166plz.55.1672358556934; Thu, 29 Dec 2022 16:02:36 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 15/47] tcg: Fix tcg_reg_alloc_dup* Date: Thu, 29 Dec 2022 16:01:49 -0800 Message-Id: <20221230000221.2764875-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359279315000001 Content-Type: text/plain; charset="utf-8" The assignment to mem_coherent should be done with any modification, not simply with a newly allocated register. Signed-off-by: Richard Henderson --- tcg/tcg.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 05d2b70ab7..371908b34b 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -3498,7 +3498,6 @@ static void tcg_reg_alloc_dup(TCGContext *s, const TC= GOp *op) ots->reg =3D tcg_reg_alloc(s, dup_out_regs, allocated_regs, op->output_pref[0], ots->indirect_base); ots->val_type =3D TEMP_VAL_REG; - ots->mem_coherent =3D 0; s->reg_to_temp[ots->reg] =3D ots; } =20 @@ -3552,6 +3551,7 @@ static void tcg_reg_alloc_dup(TCGContext *s, const TC= GOp *op) tcg_debug_assert(ok); =20 done: + ots->mem_coherent =3D 0; if (IS_DEAD_ARG(1)) { temp_dead(s, its); } @@ -3779,7 +3779,6 @@ static bool tcg_reg_alloc_dup2(TCGContext *s, const T= CGOp *op) ots->reg =3D tcg_reg_alloc(s, dup_out_regs, allocated_regs, op->output_pref[0], ots->indirect_base); ots->val_type =3D TEMP_VAL_REG; - ots->mem_coherent =3D 0; s->reg_to_temp[ots->reg] =3D ots; } =20 @@ -3823,6 +3822,7 @@ static bool tcg_reg_alloc_dup2(TCGContext *s, const T= CGOp *op) return false; =20 done: + ots->mem_coherent =3D 0; if (IS_DEAD_ARG(1)) { temp_dead(s, itsl); } --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359129; cv=none; d=zohomail.com; s=zohoarc; b=VEdE7NsBhFle4rnteM1br4n+Z7JyikWkq6GmN5kgo7lDCgh09joE9j4WenHom50n6UbrmBsucCJWUU/qobOHEFb6+rKz6kqmGuvLEg+jORLLTlQEp6JN9SioTRUvIQlo9YkjzrPSPDonzpHuNuhe8UyZukH8ZrUNMXmI7XAPk/4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359129; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=TaUbg1x+8VKhL26yQHWY99Zf9utpt/oiF3l4PqR5eGE=; b=mxt00XNSZtppzzbpqruvgY0ljLEIztwqzdyY9XKzt6baYjcdBU8AZ40DNps0LG98OGSrLBmnqRBVi/0V9AHc2hvGjQU3BsEZ/adwLHcPxQAmeEUx9sdWn9w26a6xyVwX/4XzsXsLxl5f5p43MM2uViW92mjf+b7Eg3Wu9lBz4ug= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16723591296127.7218763223633005; Thu, 29 Dec 2022 16:12:09 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2rD-00033c-LB; Thu, 29 Dec 2022 19:02:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2rB-00032F-Og for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:41 -0500 Received: from mail-pj1-x1034.google.com ([2607:f8b0:4864:20::1034]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2r9-0002hk-6U for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:41 -0500 Received: by mail-pj1-x1034.google.com with SMTP id n12so7889568pjp.1 for ; Thu, 29 Dec 2022 16:02:38 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=TaUbg1x+8VKhL26yQHWY99Zf9utpt/oiF3l4PqR5eGE=; b=AvookDSg9zCfMKGOjqgHJVo84XieDoMO+UZerYxg1GhFjF67Wt4U1VIICAkH28YM+W rc82iQ8OQsJp7wjPSycLo0YPYZ0pAO7h93u5d47Egf42ex4NbS+I6pSk/k9G/Q1/r+iT JPAZ7Voq1OtgFpYKZiCxkq8nyNMkeKuioTQllauNifez46X8dQBFWSn71iNZUBPkEq35 6UHR/MBtyQzRNLgGfi6Tg8hyap3HhqlzPJDkuOB7fGP5lVNbTixBDki/Fui8JavioBzH lHaZIJ6jJYNzEGWccVAuftBh5FoxUh/6YFb4srGOyHKbtl51Qffho/nUMq1WOIiZJ1XQ imVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TaUbg1x+8VKhL26yQHWY99Zf9utpt/oiF3l4PqR5eGE=; b=MeBcyGKYO8/3+QpGVJR3dQOcL0q3uUjHnX6pyK5mFTLj2h3Ud5HuFDf6N6/rGeBog5 MlIiryW98Bbc11aHJAn+NEN8J3BPMby4WdCqKh/eHBjTJrpQA+GnM5Ek7vC0dSbpQvzj lr8W0lP8FOTRNw76OUXEv+IHRQY54OpSy34h4041DMDTgSZOPz7xv4aA95U4X3kI/Ncw +zkgjinEDjfwg+BEh5uCsRRaNIgCkl6/LZ+PP7PuFDD+wh/dVulyXU6vVRRfGb0Bn7rl iDWYo3K+LC3C800x8ib19ABxh+NNPCKuW22XbG/D9cHnq7u0pSTMHjVk/sHA+VVY4f3k 2s1w== X-Gm-Message-State: AFqh2koPxL03Og7QvG0NSetONNOPOOPViisSUOmUXItE3A37Rts0VwdX 3/ZQ+Fu3r3VJX8y9VSNDeHbCHPfp0/35cIZX X-Google-Smtp-Source: AMrXdXvF3t+aUGIzbBgUMQY47Af3g1JRlsrVIjCc/8u92ppiK/CiD59gsULZM4GPI3hOJ4oFVIn98A== X-Received: by 2002:a17:902:cf41:b0:192:82d4:f9b2 with SMTP id e1-20020a170902cf4100b0019282d4f9b2mr14664185plg.7.1672358557756; Thu, 29 Dec 2022 16:02:37 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [PULL 16/47] tcg: Centralize updates to reg_to_temp Date: Thu, 29 Dec 2022 16:01:50 -0800 Message-Id: <20221230000221.2764875-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1034.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359130768000001 Create two new functions, set_temp_val_{reg,nonreg}. Assert that the reg_to_temp mapping is correct before any changes are made. Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- tcg/tcg.c | 159 +++++++++++++++++++++++++++++------------------------- 1 file changed, 85 insertions(+), 74 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 371908b34b..a1ae761a58 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -3019,6 +3019,35 @@ static void temp_allocate_frame(TCGContext *s, TCGTe= mp *ts) ts->mem_allocated =3D 1; } =20 +/* Assign @reg to @ts, and update reg_to_temp[]. */ +static void set_temp_val_reg(TCGContext *s, TCGTemp *ts, TCGReg reg) +{ + if (ts->val_type =3D=3D TEMP_VAL_REG) { + TCGReg old =3D ts->reg; + tcg_debug_assert(s->reg_to_temp[old] =3D=3D ts); + if (old =3D=3D reg) { + return; + } + s->reg_to_temp[old] =3D NULL; + } + tcg_debug_assert(s->reg_to_temp[reg] =3D=3D NULL); + s->reg_to_temp[reg] =3D ts; + ts->val_type =3D TEMP_VAL_REG; + ts->reg =3D reg; +} + +/* Assign a non-register value type to @ts, and update reg_to_temp[]. */ +static void set_temp_val_nonreg(TCGContext *s, TCGTemp *ts, TCGTempVal typ= e) +{ + tcg_debug_assert(type !=3D TEMP_VAL_REG); + if (ts->val_type =3D=3D TEMP_VAL_REG) { + TCGReg reg =3D ts->reg; + tcg_debug_assert(s->reg_to_temp[reg] =3D=3D ts); + s->reg_to_temp[reg] =3D NULL; + } + ts->val_type =3D type; +} + static void temp_load(TCGContext *, TCGTemp *, TCGRegSet, TCGRegSet, TCGRe= gSet); =20 /* Mark a temporary as free or dead. If 'free_or_dead' is negative, @@ -3044,10 +3073,7 @@ static void temp_free_or_dead(TCGContext *s, TCGTemp= *ts, int free_or_dead) default: g_assert_not_reached(); } - if (ts->val_type =3D=3D TEMP_VAL_REG) { - s->reg_to_temp[ts->reg] =3D NULL; - } - ts->val_type =3D new_type; + set_temp_val_nonreg(s, ts, new_type); } =20 /* Mark a temporary as dead. */ @@ -3227,9 +3253,7 @@ static void temp_load(TCGContext *s, TCGTemp *ts, TCG= RegSet desired_regs, default: tcg_abort(); } - ts->reg =3D reg; - ts->val_type =3D TEMP_VAL_REG; - s->reg_to_temp[reg] =3D ts; + set_temp_val_reg(s, ts, reg); } =20 /* Save a temporary to memory. 'allocated_regs' is used in case a @@ -3341,10 +3365,7 @@ static void tcg_reg_alloc_do_movi(TCGContext *s, TCG= Temp *ots, tcg_debug_assert(!temp_readonly(ots)); =20 /* The movi is not explicitly generated here. */ - if (ots->val_type =3D=3D TEMP_VAL_REG) { - s->reg_to_temp[ots->reg] =3D NULL; - } - ots->val_type =3D TEMP_VAL_CONST; + set_temp_val_nonreg(s, ots, TEMP_VAL_CONST); ots->val =3D val; ots->mem_coherent =3D 0; if (NEED_SYNC_ARG(0)) { @@ -3363,6 +3384,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TC= GOp *op) TCGRegSet allocated_regs, preferred_regs; TCGTemp *ts, *ots; TCGType otype, itype; + TCGReg oreg, ireg; =20 allocated_regs =3D s->reserved_regs; preferred_regs =3D op->output_pref[0]; @@ -3394,8 +3416,9 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TC= GOp *op) temp_load(s, ts, tcg_target_available_regs[itype], allocated_regs, preferred_regs); } - tcg_debug_assert(ts->val_type =3D=3D TEMP_VAL_REG); + ireg =3D ts->reg; + if (IS_DEAD_ARG(0)) { /* mov to a non-saved dead register makes no sense (even with liveness analysis disabled). */ @@ -3403,52 +3426,53 @@ static void tcg_reg_alloc_mov(TCGContext *s, const = TCGOp *op) if (!ots->mem_allocated) { temp_allocate_frame(s, ots); } - tcg_out_st(s, otype, ts->reg, ots->mem_base->reg, ots->mem_offset); + tcg_out_st(s, otype, ireg, ots->mem_base->reg, ots->mem_offset); if (IS_DEAD_ARG(1)) { temp_dead(s, ts); } temp_dead(s, ots); + return; + } + + if (IS_DEAD_ARG(1) && ts->kind !=3D TEMP_FIXED) { + /* + * The mov can be suppressed. Kill input first, so that it + * is unlinked from reg_to_temp, then set the output to the + * reg that we saved from the input. + */ + temp_dead(s, ts); + oreg =3D ireg; } else { - if (IS_DEAD_ARG(1) && ts->kind !=3D TEMP_FIXED) { - /* the mov can be suppressed */ - if (ots->val_type =3D=3D TEMP_VAL_REG) { - s->reg_to_temp[ots->reg] =3D NULL; - } - ots->reg =3D ts->reg; - temp_dead(s, ts); + if (ots->val_type =3D=3D TEMP_VAL_REG) { + oreg =3D ots->reg; } else { - if (ots->val_type !=3D TEMP_VAL_REG) { - /* When allocating a new register, make sure to not spill = the - input one. */ - tcg_regset_set_reg(allocated_regs, ts->reg); - ots->reg =3D tcg_reg_alloc(s, tcg_target_available_regs[ot= ype], - allocated_regs, preferred_regs, - ots->indirect_base); - } - if (!tcg_out_mov(s, otype, ots->reg, ts->reg)) { - /* - * Cross register class move not supported. - * Store the source register into the destination slot - * and leave the destination temp as TEMP_VAL_MEM. - */ - assert(!temp_readonly(ots)); - if (!ts->mem_allocated) { - temp_allocate_frame(s, ots); - } - tcg_out_st(s, ts->type, ts->reg, - ots->mem_base->reg, ots->mem_offset); - ots->mem_coherent =3D 1; - temp_free_or_dead(s, ots, -1); - return; - } + /* Make sure to not spill the input register during allocation= . */ + oreg =3D tcg_reg_alloc(s, tcg_target_available_regs[otype], + allocated_regs | ((TCGRegSet)1 << ireg), + preferred_regs, ots->indirect_base); } - ots->val_type =3D TEMP_VAL_REG; - ots->mem_coherent =3D 0; - s->reg_to_temp[ots->reg] =3D ots; - if (NEED_SYNC_ARG(0)) { - temp_sync(s, ots, allocated_regs, 0, 0); + if (!tcg_out_mov(s, otype, oreg, ireg)) { + /* + * Cross register class move not supported. + * Store the source register into the destination slot + * and leave the destination temp as TEMP_VAL_MEM. + */ + assert(!temp_readonly(ots)); + if (!ts->mem_allocated) { + temp_allocate_frame(s, ots); + } + tcg_out_st(s, ts->type, ireg, ots->mem_base->reg, ots->mem_off= set); + set_temp_val_nonreg(s, ts, TEMP_VAL_MEM); + ots->mem_coherent =3D 1; + return; } } + set_temp_val_reg(s, ots, oreg); + ots->mem_coherent =3D 0; + + if (NEED_SYNC_ARG(0)) { + temp_sync(s, ots, allocated_regs, 0, 0); + } } =20 /* @@ -3490,15 +3514,15 @@ static void tcg_reg_alloc_dup(TCGContext *s, const = TCGOp *op) /* Allocate the output register now. */ if (ots->val_type !=3D TEMP_VAL_REG) { TCGRegSet allocated_regs =3D s->reserved_regs; + TCGReg oreg; =20 if (!IS_DEAD_ARG(1) && its->val_type =3D=3D TEMP_VAL_REG) { /* Make sure to not spill the input register. */ tcg_regset_set_reg(allocated_regs, its->reg); } - ots->reg =3D tcg_reg_alloc(s, dup_out_regs, allocated_regs, - op->output_pref[0], ots->indirect_base); - ots->val_type =3D TEMP_VAL_REG; - s->reg_to_temp[ots->reg] =3D ots; + oreg =3D tcg_reg_alloc(s, dup_out_regs, allocated_regs, + op->output_pref[0], ots->indirect_base); + set_temp_val_reg(s, ots, oreg); } =20 switch (its->val_type) { @@ -3535,10 +3559,12 @@ static void tcg_reg_alloc_dup(TCGContext *s, const = TCGOp *op) #else endian_fixup =3D 0; #endif + /* Attempt to dup directly from the input memory slot. */ if (tcg_out_dupm_vec(s, vtype, vece, ots->reg, its->mem_base->reg, its->mem_offset + endian_fixup)) { goto done; } + /* Load the input into the destination vector register. */ tcg_out_ld(s, itype, ots->reg, its->mem_base->reg, its->mem_offset= ); break; =20 @@ -3707,17 +3733,8 @@ static void tcg_reg_alloc_op(TCGContext *s, const TC= GOp *op) op->output_pref[k], ts->indirect_base); } tcg_regset_set_reg(o_allocated_regs, reg); - if (ts->val_type =3D=3D TEMP_VAL_REG) { - s->reg_to_temp[ts->reg] =3D NULL; - } - ts->val_type =3D TEMP_VAL_REG; - ts->reg =3D reg; - /* - * Temp value is modified, so the value kept in memory is - * potentially not the same. - */ + set_temp_val_reg(s, ts, reg); ts->mem_coherent =3D 0; - s->reg_to_temp[reg] =3D ts; new_args[i] =3D reg; } } @@ -3767,6 +3784,7 @@ static bool tcg_reg_alloc_dup2(TCGContext *s, const T= CGOp *op) TCGRegSet allocated_regs =3D s->reserved_regs; TCGRegSet dup_out_regs =3D tcg_op_defs[INDEX_op_dup_vec].args_ct[0].regs; + TCGReg oreg; =20 /* Make sure to not spill the input registers. */ if (!IS_DEAD_ARG(1) && itsl->val_type =3D=3D TEMP_VAL_REG) { @@ -3776,10 +3794,9 @@ static bool tcg_reg_alloc_dup2(TCGContext *s, const = TCGOp *op) tcg_regset_set_reg(allocated_regs, itsh->reg); } =20 - ots->reg =3D tcg_reg_alloc(s, dup_out_regs, allocated_regs, - op->output_pref[0], ots->indirect_base); - ots->val_type =3D TEMP_VAL_REG; - s->reg_to_temp[ots->reg] =3D ots; + oreg =3D tcg_reg_alloc(s, dup_out_regs, allocated_regs, + op->output_pref[0], ots->indirect_base); + set_temp_val_reg(s, ots, oreg); } =20 /* Promote dup2 of immediates to dupi_vec. */ @@ -3962,14 +3979,8 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp = *op) tcg_debug_assert(!temp_readonly(ts)); =20 reg =3D tcg_target_call_oarg_regs[i]; - tcg_debug_assert(s->reg_to_temp[reg] =3D=3D NULL); - if (ts->val_type =3D=3D TEMP_VAL_REG) { - s->reg_to_temp[ts->reg] =3D NULL; - } - ts->val_type =3D TEMP_VAL_REG; - ts->reg =3D reg; + set_temp_val_reg(s, ts, reg); ts->mem_coherent =3D 0; - s->reg_to_temp[reg] =3D ts; if (NEED_SYNC_ARG(i)) { temp_sync(s, ts, allocated_regs, 0, IS_DEAD_ARG(i)); } else if (IS_DEAD_ARG(i)) { --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359083; cv=none; d=zohomail.com; s=zohoarc; b=Koc4OQ8i92vN2NwwmpeRs6/HDkMqTjHJSKxZOalqTHQH+vfEDkGUjajqNGirITmxjAJc8WiWYslJnp+ucDaNynuTUFKjX59k+o4h722x5sYkB0RYcmt8IIwiZIEDdOIGiDYPPDjmfhrnKOniW7GMxUqFs0/n47rgEslIobDP6BI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359083; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=YysLimCJ4D81VkYcj5AOVk4+aaIq43s9xyiLUf2Ez/I=; b=PbcXKhfrjTsaaWzpbSo9BMYIneCH59FvPIX0/mSP2NPDW79W+ndziAl5ypeBZ+gv4y AF2RwRpA/kTsm+7zRlDTOQjVbOPBWhbkDauuR5fBsTn5u5HqtZ+D/qI6gYdsrUsbzZfy W9vQ2nejIGumvGC5WRovWUV8Tw0EbhK2qe7eJvd6JXjzAbZdTLG1A+vZ2n3JCKMqrkB4 fWPUMRf8wKwcwa8Mc5ZUKuCzAs2kZ90m0izHsAM3cxYnqU7GmtXxH9axD+EbNDUw0iPv HSw6xl5L0njL+nhwW8ClOu6o2HlGUIhek2F92ueD/qqcF/t9tNtLlDYWk0FGIKgKDmRh vjpg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=YysLimCJ4D81VkYcj5AOVk4+aaIq43s9xyiLUf2Ez/I=; b=XyVk9OisHS6gPaq/VTt5ofGc+cD/RNC7YnernSp/IrxvFd/J8IP3nfn4cBKsyY59Ze NfibGJE/7mW5E8SLXAmmbUoVymw6MtPlLxDWxayQZJnaSeHfVwvge5uyZ2wBCRU5lwsu Z2Z+b/Wph8j+zPQiooNGHHkvY0j4Pcrn+oUXpWydhqCi19PEzKz3uRb/6hktnaRwK5Xy /onKAF9wNH4+rzjbnx6p0M2vo3H2u0FYxZ2SJXJNutTLAnlSOGVOX7BG2p5+KfAEzxGU MVh31g59eZEdchQAXmE8eeyxlDOFWEf4Scmdr6r7SifoxzT97EgyFYL/amav8eD5Se6b 4ilQ== X-Gm-Message-State: AFqh2koU0aT6Wy/3cDI/lcpdAS0lAnHlr0exF1+pBXobBlHYB9p58/uh 71EjoQv1O5XQCV2d9jvT2lCzj+7f12PJColN X-Google-Smtp-Source: AMrXdXv8fbejrbJNzXeCdTC2wVoIVQ22FKKfn9D8956PdujT7o9N12Tz01XYoF7g3ZMnz7xVC60DUA== X-Received: by 2002:a05:6a20:cf62:b0:b2:3dc7:9b31 with SMTP id hz34-20020a056a20cf6200b000b23dc79b31mr28522995pzb.18.1672358558562; Thu, 29 Dec 2022 16:02:38 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [PULL 17/47] tcg: Remove check_regs Date: Thu, 29 Dec 2022 16:01:51 -0800 Message-Id: <20221230000221.2764875-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1031.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359084894000003 We now check the consistency of reg_to_temp[] with each update, so the utility of checking consistency at the end of each opcode is minimal. In addition, the form of this check is quite expensive, consuming 10% of a checking-enabled build. Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- tcg/tcg.c | 76 ------------------------------------------------------- 1 file changed, 76 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index a1ae761a58..c330d114bc 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -2900,79 +2900,6 @@ static bool liveness_pass_2(TCGContext *s) return changes; } =20 -#ifdef CONFIG_DEBUG_TCG -static void dump_regs(TCGContext *s) -{ - TCGTemp *ts; - int i; - char buf[64]; - - for(i =3D 0; i < s->nb_temps; i++) { - ts =3D &s->temps[i]; - printf(" %10s: ", tcg_get_arg_str_ptr(s, buf, sizeof(buf), ts)); - switch(ts->val_type) { - case TEMP_VAL_REG: - printf("%s", tcg_target_reg_names[ts->reg]); - break; - case TEMP_VAL_MEM: - printf("%d(%s)", (int)ts->mem_offset, - tcg_target_reg_names[ts->mem_base->reg]); - break; - case TEMP_VAL_CONST: - printf("$0x%" PRIx64, ts->val); - break; - case TEMP_VAL_DEAD: - printf("D"); - break; - default: - printf("???"); - break; - } - printf("\n"); - } - - for(i =3D 0; i < TCG_TARGET_NB_REGS; i++) { - if (s->reg_to_temp[i] !=3D NULL) { - printf("%s: %s\n", - tcg_target_reg_names[i], - tcg_get_arg_str_ptr(s, buf, sizeof(buf), s->reg_to_temp= [i])); - } - } -} - -static void check_regs(TCGContext *s) -{ - int reg; - int k; - TCGTemp *ts; - char buf[64]; - - for (reg =3D 0; reg < TCG_TARGET_NB_REGS; reg++) { - ts =3D s->reg_to_temp[reg]; - if (ts !=3D NULL) { - if (ts->val_type !=3D TEMP_VAL_REG || ts->reg !=3D reg) { - printf("Inconsistency for register %s:\n", - tcg_target_reg_names[reg]); - goto fail; - } - } - } - for (k =3D 0; k < s->nb_temps; k++) { - ts =3D &s->temps[k]; - if (ts->val_type =3D=3D TEMP_VAL_REG - && ts->kind !=3D TEMP_FIXED - && s->reg_to_temp[ts->reg] !=3D ts) { - printf("Inconsistency for temp %s:\n", - tcg_get_arg_str_ptr(s, buf, sizeof(buf), ts)); - fail: - printf("reg state:\n"); - dump_regs(s); - tcg_abort(); - } - } -} -#endif - static void temp_allocate_frame(TCGContext *s, TCGTemp *ts) { intptr_t off, size, align; @@ -4297,9 +4224,6 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb,= target_ulong pc_start) tcg_reg_alloc_op(s, op); break; } -#ifdef CONFIG_DEBUG_TCG - check_regs(s); -#endif /* Test for (pending) buffer overflow. The assumption is that any one operation beginning below the high water mark cannot overrun the buffer completely. Thus we can test for overflow after --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359182; cv=none; d=zohomail.com; s=zohoarc; b=Wpp3PJDV3rX5pHmDPT7G/BDADZaoGtc7ozLQkz7HtHMh/Vo+kyWJ5Tyi3RZUHwgxNQIcbPiRs6DwL6fQwX7kZBSxAkWmaX+OwyidU4H2I7+u/GX8cQ2n0JdHkTnAV+y68wpmwKEro0zGaElEAOCiIcIQQgLGEErZpSzMSfR+RW0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359182; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=82jdObgJZFzER9GFo6NlXKKdjvOyLg4xyhd1mr3KndA=; b=CDCYj3loNKoyX6PDcpM25rlXX16/TCKJHF73RyPczawbVtvWhLMUXXA0BMeQd/qSKDya5VAeHrtkzHBVlwOfOE2RHKYTbwiBKKmJ6JHGOFrZw9nCD0wBmXzz4+liyMmCH9AoDOZU4rbS6gs9aLRhC0rMhvgQ5p8GrnNnGIttn78= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672359181997400.5567321523923; Thu, 29 Dec 2022 16:13:01 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2rF-00034r-Sx; Thu, 29 Dec 2022 19:02:46 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2rD-00033H-2g for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:43 -0500 Received: from mail-pl1-x62f.google.com ([2607:f8b0:4864:20::62f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2rB-0002i3-1l for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:42 -0500 Received: by mail-pl1-x62f.google.com with SMTP id y19so1329045plb.2 for ; Thu, 29 Dec 2022 16:02:40 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=82jdObgJZFzER9GFo6NlXKKdjvOyLg4xyhd1mr3KndA=; b=XJf+VZAOLyuNddIwf8h9zj6PsowiPHklT03oai+bQGH6QKYDb1AXDCijInv/bSLQPE L+miI5baeGHa0XlIgX7sF6ub+gC59hG0z6Ia3hsIbK80hd2F7mVISMSlglJd+F2IE4X0 b556TvFRNsNZdNgqcqOhyOLCMF0ZyYVhJ6gRfT6CrfBO+qHcS48n0iVQYYRo6rgyNDgR Czg8fCE/rV7cUmtYdD+QA4duwMCm1Eyoc+1HLLbZBHKTJSGh/olYm5aP7SQ5U3mYMC3F QoIzKDjjeWwheoFrGPOfCsC47bB2dmJ3RhOykCRbvgNxKpdzu6NyIOPwRjJPcCeIfMiS PnHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=82jdObgJZFzER9GFo6NlXKKdjvOyLg4xyhd1mr3KndA=; b=ONT71OY9h3S1lLAqJTiMrIQ3AHshJlJgjk1mz3pRbcKocVa9McTnR9NrB/IfpCtlNJ 7R70VSEwZjpI9ZfC0Necb0zSwaKPjnf9cxJ0HC7ISX2S4nKb0U1fL+7ocAdQCZ2/iWTC 2mvPEAEFEs/z7MTXIHejWE5TWR0QPo4XQb9++z+FFgYZrBTQ4neAhyMISwlIQVFuzaVK A34rjF0rYjuJ1285F49GBbtDxiGsF2rdKz+Adbwmd/1zFXh0u80XcjakMhkw3k79UsHp 7LmGE6hoveHALbZYbwz0sjgTm7uvxEwXHuIBjeSREpS8hg7tHiItdiYMAaOjojYtFauR 4H+g== X-Gm-Message-State: AFqh2kr5d0XPJzpHnmllQ41qUIAwcWOGE+MOw2PGMcR1nxb6nIzUjIDa XCIWxDp0kmpc8h5MYevBmB12YIrj3FVy8q9h X-Google-Smtp-Source: AMrXdXt+8Y8EHNYN0yBkirYELftJngJJqNv/uKFsft0DRgIjjzb094dzSEcFyOl0XAYnOCuhuFXemg== X-Received: by 2002:a17:902:ebca:b0:191:117a:414f with SMTP id p10-20020a170902ebca00b00191117a414fmr36301761plg.27.1672358559438; Thu, 29 Dec 2022 16:02:39 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 18/47] tcg: Massage process_op_defs() Date: Thu, 29 Dec 2022 16:01:52 -0800 Message-Id: <20221230000221.2764875-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359183780000002 From: Philippe Mathieu-Daud=C3=A9 In preparation of introducing paired registers, massage a bit process_op_defs()'s switch case. Signed-off-by: Richard Henderson [PMD: Split from bigger patch, 1/3] Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20221219220925.79218-2-philmd@linaro.org> --- tcg/tcg.c | 61 +++++++++++++++++++++++++++++++------------------------ 1 file changed, 34 insertions(+), 27 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index c330d114bc..92141bd79a 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -2012,7 +2012,7 @@ static void process_op_defs(TCGContext *s) for (op =3D 0; op < NB_OPS; op++) { TCGOpDef *def =3D &tcg_op_defs[op]; const TCGTargetOpDef *tdefs; - int i, nb_args; + int i, o, nb_args; =20 if (def->flags & TCG_OPF_NOT_PRESENT) { continue; @@ -2034,53 +2034,60 @@ static void process_op_defs(TCGContext *s) =20 for (i =3D 0; i < nb_args; i++) { const char *ct_str =3D tdefs->args_ct_str[i]; + bool input_p =3D i >=3D def->nb_oargs; + /* Incomplete TCGTargetOpDef entry. */ tcg_debug_assert(ct_str !=3D NULL); =20 - while (*ct_str !=3D '\0') { - switch(*ct_str) { - case '0' ... '9': - { - int oarg =3D *ct_str - '0'; - tcg_debug_assert(ct_str =3D=3D tdefs->args_ct_str[= i]); - tcg_debug_assert(oarg < def->nb_oargs); - tcg_debug_assert(def->args_ct[oarg].regs !=3D 0); - def->args_ct[i] =3D def->args_ct[oarg]; - /* The output sets oalias. */ - def->args_ct[oarg].oalias =3D true; - def->args_ct[oarg].alias_index =3D i; - /* The input sets ialias. */ - def->args_ct[i].ialias =3D true; - def->args_ct[i].alias_index =3D oarg; - } - ct_str++; - break; - case '&': - def->args_ct[i].newreg =3D true; - ct_str++; - break; + switch (*ct_str) { + case '0' ... '9': + o =3D *ct_str - '0'; + tcg_debug_assert(input_p); + tcg_debug_assert(o < def->nb_oargs); + tcg_debug_assert(def->args_ct[o].regs !=3D 0); + tcg_debug_assert(!def->args_ct[o].oalias); + def->args_ct[i] =3D def->args_ct[o]; + /* The output sets oalias. */ + def->args_ct[o].oalias =3D 1; + def->args_ct[o].alias_index =3D i; + /* The input sets ialias. */ + def->args_ct[i].ialias =3D 1; + def->args_ct[i].alias_index =3D o; + tcg_debug_assert(ct_str[1] =3D=3D '\0'); + continue; + + case '&': + tcg_debug_assert(!input_p); + def->args_ct[i].newreg =3D true; + ct_str++; + break; + } + + do { + switch (*ct_str) { case 'i': def->args_ct[i].ct |=3D TCG_CT_CONST; - ct_str++; break; =20 /* Include all of the target-specific constraints. */ =20 #undef CONST #define CONST(CASE, MASK) \ - case CASE: def->args_ct[i].ct |=3D MASK; ct_str++; break; + case CASE: def->args_ct[i].ct |=3D MASK; break; #define REGS(CASE, MASK) \ - case CASE: def->args_ct[i].regs |=3D MASK; ct_str++; break; + case CASE: def->args_ct[i].regs |=3D MASK; break; =20 #include "tcg-target-con-str.h" =20 #undef REGS #undef CONST default: + case '0' ... '9': + case '&': /* Typo in TCGTargetOpDef constraint. */ g_assert_not_reached(); } - } + } while (*++ct_str !=3D '\0'); } =20 /* TCGTargetOpDef entry with too much information? */ --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359279; cv=none; d=zohomail.com; s=zohoarc; b=DR9/nG4VXsMq/BARPu7NZHZvPrbxS/tM8fEFZ+9JIgx5hmKU9SXOgRtI+uxV4JBxMZBm/t5FHr29aFCoKlBHyhOEZ4vmb9C5qW3+A3qLeQpYo2gz1j1GO9JfFWUfYNlpPQu0cvjWMPeLXiwEyxmfVq33c2pnCiCFqVOchh3CW64= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359279; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=/ZnmrQYh5lPqNDd6nIjEmLxLWOodOPTCOD2Tnh7/rwM=; b=B30MQa8n2fI3ChkqdoUE02Z3ur/AjULp4XYr/6qSsBzWrNzxw0A0GjKfv+wZORlu6Xm7tF9yLxaWP8/asBRE3oUtARuBLIrmhDx3GaLpfrC84bdREMWzIwekOYTJRSOa4SDM0rXQnPT0474o34vw9CkDQlP+b6uRQ7jbunq6coM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672359279510239.90305734904325; Thu, 29 Dec 2022 16:14:39 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2rH-00036S-0r; Thu, 29 Dec 2022 19:02:47 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2rE-00034M-Jk for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:44 -0500 Received: from mail-pl1-x62e.google.com ([2607:f8b0:4864:20::62e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2rB-0002iQ-Uc for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:44 -0500 Received: by mail-pl1-x62e.google.com with SMTP id u7so20339260plq.11 for ; Thu, 29 Dec 2022 16:02:41 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.39 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=/ZnmrQYh5lPqNDd6nIjEmLxLWOodOPTCOD2Tnh7/rwM=; b=giZQeO5x+7z4sOc/sAdhcHKrYQlBmF4eA/4atOAwDoQzvZ9VwoWRIITq/0TvsK4WdV my+/6jhMNIMdoW94RBAaFF2NoUIc+gNo2ejeo7hAOaF2mSZB2jMe2dYtNQwfBbljI012 tCQ2p69bv8dxv4Mgk1yDUTbgCWdCl2U/YH/LhlZp0UU0VDYLpWjd8LGGr6mzj4Dxd8Uk 6unoQXJxNGq3RwfzxBQlfsC/c4z9iufw1j0ttXNylWKfPhabbsY8zaKlyEtGK2hqMJ2m 9E3J+Vk2/sdT92PK1LGWU0nIK1MhIqzduFjqYSAG9AgLAz/qo7aIZ/bTr7k8rceqrq/Y YHXw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/ZnmrQYh5lPqNDd6nIjEmLxLWOodOPTCOD2Tnh7/rwM=; b=JrUs+YKGdJlLEvX413a1CW9S8qNbmEX5a4Yj/lz2MtbNjhuqJZiT87/dWkkRCB84Tv tbuBqPkBGK791qm+utGlxxa4OrrEt44d4pRyKGioS2Zcik5toRV6+ruNz4NqmGeJ6/uq IOyvA9EdI2BY+32V27itIq0L3mkCPKMLHX2rwaUfj4HI7IleTM8CMs0bMIC0g1UeQKQO v0rqoypI2xXeFNTlNOWOM7nAf/gYeX9wSLeyzc53Bg8ODNMsAdjwEm+9vdMrlZg+OqM6 +rnefzpwssc8MguWjYGHZVxE/hn8OLEPRy49UKomr7etYaUTpS5TYEz9ZE22ENO9cN6R bihQ== X-Gm-Message-State: AFqh2kqWBZvkqerUcs/q4HOfrimbmqQDyC/Jpy6QHKEFX+TbvOImUkNe t4zjYA93s3uaUpyvDI2lxLZl+hmhcWV5SJdD X-Google-Smtp-Source: AMrXdXs4R0Z8xar9Ne7zHehGv0guoGZVSuJeoRcq7LcBQS6gujmrZs4v1gjfs9rGIyurntWJzhj1fQ== X-Received: by 2002:a17:902:a984:b0:192:9a7d:c38a with SMTP id bh4-20020a170902a98400b001929a7dc38amr5642832plb.9.1672358560228; Thu, 29 Dec 2022 16:02:40 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 19/47] tcg: Introduce paired register allocation Date: Thu, 29 Dec 2022 16:01:53 -0800 Message-Id: <20221230000221.2764875-20-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359281362000007 Content-Type: text/plain; charset="utf-8" There are several instances where we need to be able to allocate a pair of registers to related inputs/outputs. Add 'p' and 'm' register constraints for this, in order to be able to allocate the even/odd register first or second. Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 2 + tcg/tcg.c | 419 ++++++++++++++++++++++++++++++++++++++++------ 2 files changed, 373 insertions(+), 48 deletions(-) diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index d84bae6e3f..5c2254ce9f 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -951,6 +951,8 @@ typedef struct TCGArgConstraint { unsigned ct : 16; unsigned alias_index : 4; unsigned sort_index : 4; + unsigned pair_index : 4; + unsigned pair : 2; /* 0: none, 1: first, 2: second, 3: second alias */ bool oalias : 1; bool ialias : 1; bool newreg : 1; diff --git a/tcg/tcg.c b/tcg/tcg.c index 92141bd79a..e7570ecb4a 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1969,15 +1969,32 @@ static void tcg_dump_ops(TCGContext *s, FILE *f, bo= ol have_prefs) static int get_constraint_priority(const TCGOpDef *def, int k) { const TCGArgConstraint *arg_ct =3D &def->args_ct[k]; - int n; + int n =3D ctpop64(arg_ct->regs); =20 - if (arg_ct->oalias) { - /* an alias is equivalent to a single register */ - n =3D 1; - } else { - n =3D ctpop64(arg_ct->regs); + /* + * Sort constraints of a single register first, which includes output + * aliases (which must exactly match the input already allocated). + */ + if (n =3D=3D 1 || arg_ct->oalias) { + return INT_MAX; } - return TCG_TARGET_NB_REGS - n + 1; + + /* + * Sort register pairs next, first then second immediately after. + * Arbitrarily sort multiple pairs by the index of the first reg; + * there shouldn't be many pairs. + */ + switch (arg_ct->pair) { + case 1: + case 3: + return (k + 1) * 2; + case 2: + return (arg_ct->pair_index + 1) * 2 - 1; + } + + /* Finally, sort by decreasing register count. */ + assert(n > 1); + return -n; } =20 /* sort from highest priority to lowest */ @@ -2012,7 +2029,8 @@ static void process_op_defs(TCGContext *s) for (op =3D 0; op < NB_OPS; op++) { TCGOpDef *def =3D &tcg_op_defs[op]; const TCGTargetOpDef *tdefs; - int i, o, nb_args; + bool saw_alias_pair =3D false; + int i, o, i2, o2, nb_args; =20 if (def->flags & TCG_OPF_NOT_PRESENT) { continue; @@ -2053,6 +2071,9 @@ static void process_op_defs(TCGContext *s) /* The input sets ialias. */ def->args_ct[i].ialias =3D 1; def->args_ct[i].alias_index =3D o; + if (def->args_ct[i].pair) { + saw_alias_pair =3D true; + } tcg_debug_assert(ct_str[1] =3D=3D '\0'); continue; =20 @@ -2061,6 +2082,38 @@ static void process_op_defs(TCGContext *s) def->args_ct[i].newreg =3D true; ct_str++; break; + + case 'p': /* plus */ + /* Allocate to the register after the previous. */ + tcg_debug_assert(i > (input_p ? def->nb_oargs : 0)); + o =3D i - 1; + tcg_debug_assert(!def->args_ct[o].pair); + tcg_debug_assert(!def->args_ct[o].ct); + def->args_ct[i] =3D (TCGArgConstraint){ + .pair =3D 2, + .pair_index =3D o, + .regs =3D def->args_ct[o].regs << 1, + }; + def->args_ct[o].pair =3D 1; + def->args_ct[o].pair_index =3D i; + tcg_debug_assert(ct_str[1] =3D=3D '\0'); + continue; + + case 'm': /* minus */ + /* Allocate to the register before the previous. */ + tcg_debug_assert(i > (input_p ? def->nb_oargs : 0)); + o =3D i - 1; + tcg_debug_assert(!def->args_ct[o].pair); + tcg_debug_assert(!def->args_ct[o].ct); + def->args_ct[i] =3D (TCGArgConstraint){ + .pair =3D 1, + .pair_index =3D o, + .regs =3D def->args_ct[o].regs >> 1, + }; + def->args_ct[o].pair =3D 2; + def->args_ct[o].pair_index =3D i; + tcg_debug_assert(ct_str[1] =3D=3D '\0'); + continue; } =20 do { @@ -2084,6 +2137,8 @@ static void process_op_defs(TCGContext *s) default: case '0' ... '9': case '&': + case 'p': + case 'm': /* Typo in TCGTargetOpDef constraint. */ g_assert_not_reached(); } @@ -2093,6 +2148,79 @@ static void process_op_defs(TCGContext *s) /* TCGTargetOpDef entry with too much information? */ tcg_debug_assert(i =3D=3D TCG_MAX_OP_ARGS || tdefs->args_ct_str[i]= =3D=3D NULL); =20 + /* + * Fix up output pairs that are aliased with inputs. + * When we created the alias, we copied pair from the output. + * There are three cases: + * (1a) Pairs of inputs alias pairs of outputs. + * (1b) One input aliases the first of a pair of outputs. + * (2) One input aliases the second of a pair of outputs. + * + * Case 1a is handled by making sure that the pair_index'es are + * properly updated so that they appear the same as a pair of inpu= ts. + * + * Case 1b is handled by setting the pair_index of the input to + * itself, simply so it doesn't point to an unrelated argument. + * Since we don't encounter the "second" during the input allocati= on + * phase, nothing happens with the second half of the input pair. + * + * Case 2 is handled by setting the second input to pair=3D3, the + * first output to pair=3D3, and the pair_index'es to match. + */ + if (saw_alias_pair) { + for (i =3D def->nb_oargs; i < nb_args; i++) { + /* + * Since [0-9pm] must be alone in the constraint string, + * the only way they can both be set is if the pair comes + * from the output alias. + */ + if (!def->args_ct[i].ialias) { + continue; + } + switch (def->args_ct[i].pair) { + case 0: + break; + case 1: + o =3D def->args_ct[i].alias_index; + o2 =3D def->args_ct[o].pair_index; + tcg_debug_assert(def->args_ct[o].pair =3D=3D 1); + tcg_debug_assert(def->args_ct[o2].pair =3D=3D 2); + if (def->args_ct[o2].oalias) { + /* Case 1a */ + i2 =3D def->args_ct[o2].alias_index; + tcg_debug_assert(def->args_ct[i2].pair =3D=3D 2); + def->args_ct[i2].pair_index =3D i; + def->args_ct[i].pair_index =3D i2; + } else { + /* Case 1b */ + def->args_ct[i].pair_index =3D i; + } + break; + case 2: + o =3D def->args_ct[i].alias_index; + o2 =3D def->args_ct[o].pair_index; + tcg_debug_assert(def->args_ct[o].pair =3D=3D 2); + tcg_debug_assert(def->args_ct[o2].pair =3D=3D 1); + if (def->args_ct[o2].oalias) { + /* Case 1a */ + i2 =3D def->args_ct[o2].alias_index; + tcg_debug_assert(def->args_ct[i2].pair =3D=3D 1); + def->args_ct[i2].pair_index =3D i; + def->args_ct[i].pair_index =3D i2; + } else { + /* Case 2 */ + def->args_ct[i].pair =3D 3; + def->args_ct[o2].pair =3D 3; + def->args_ct[i].pair_index =3D o2; + def->args_ct[o2].pair_index =3D i; + } + break; + default: + g_assert_not_reached(); + } + } + } + /* sort the constraints (XXX: this is just an heuristic) */ sort_constraints(def, 0, def->nb_oargs); sort_constraints(def, def->nb_oargs, def->nb_iargs); @@ -3141,6 +3269,52 @@ static TCGReg tcg_reg_alloc(TCGContext *s, TCGRegSet= required_regs, tcg_abort(); } =20 +static TCGReg tcg_reg_alloc_pair(TCGContext *s, TCGRegSet required_regs, + TCGRegSet allocated_regs, + TCGRegSet preferred_regs, bool rev) +{ + int i, j, k, fmin, n =3D ARRAY_SIZE(tcg_target_reg_alloc_order); + TCGRegSet reg_ct[2]; + const int *order; + + /* Ensure that if I is not in allocated_regs, I+1 is not either. */ + reg_ct[1] =3D required_regs & ~(allocated_regs | (allocated_regs >> 1)= ); + tcg_debug_assert(reg_ct[1] !=3D 0); + reg_ct[0] =3D reg_ct[1] & preferred_regs; + + order =3D rev ? indirect_reg_alloc_order : tcg_target_reg_alloc_order; + + /* + * Skip the preferred_regs option if it cannot be satisfied, + * or if the preference made no difference. + */ + k =3D reg_ct[0] =3D=3D 0 || reg_ct[0] =3D=3D reg_ct[1]; + + /* + * Minimize the number of flushes by looking for 2 free registers firs= t, + * then a single flush, then two flushes. + */ + for (fmin =3D 2; fmin >=3D 0; fmin--) { + for (j =3D k; j < 2; j++) { + TCGRegSet set =3D reg_ct[j]; + + for (i =3D 0; i < n; i++) { + TCGReg reg =3D order[i]; + + if (tcg_regset_test_reg(set, reg)) { + int f =3D !s->reg_to_temp[reg] + !s->reg_to_temp[reg += 1]; + if (f >=3D fmin) { + tcg_reg_free(s, reg, allocated_regs); + tcg_reg_free(s, reg + 1, allocated_regs); + return reg; + } + } + } + } + } + tcg_abort(); +} + /* Make sure the temporary is in a register. If needed, allocate the regi= ster from DESIRED while avoiding ALLOCATED. */ static void temp_load(TCGContext *s, TCGTemp *ts, TCGRegSet desired_regs, @@ -3550,8 +3724,10 @@ static void tcg_reg_alloc_op(TCGContext *s, const TC= GOp *op) =20 /* satisfy input constraints */ for (k =3D 0; k < nb_iargs; k++) { - TCGRegSet i_preferred_regs; - bool allocate_new_reg; + TCGRegSet i_preferred_regs, i_required_regs; + bool allocate_new_reg, copyto_new_reg; + TCGTemp *ts2; + int i1, i2; =20 i =3D def->args_ct[nb_oargs + k].sort_index; arg =3D op->args[i]; @@ -3568,43 +3744,159 @@ static void tcg_reg_alloc_op(TCGContext *s, const = TCGOp *op) =20 reg =3D ts->reg; i_preferred_regs =3D 0; + i_required_regs =3D arg_ct->regs; allocate_new_reg =3D false; + copyto_new_reg =3D false; =20 - if (arg_ct->ialias) { + switch (arg_ct->pair) { + case 0: /* not paired */ + if (arg_ct->ialias) { + i_preferred_regs =3D op->output_pref[arg_ct->alias_index]; + + /* + * If the input is not dead after the instruction, + * we must allocate a new register and move it. + */ + if (!IS_DEAD_ARG(i)) { + allocate_new_reg =3D true; + } else if (ts->val_type =3D=3D TEMP_VAL_REG) { + /* + * Check if the current register has already been + * allocated for another input. + */ + allocate_new_reg =3D + tcg_regset_test_reg(i_allocated_regs, reg); + } + } + if (!allocate_new_reg) { + temp_load(s, ts, i_required_regs, i_allocated_regs, + i_preferred_regs); + reg =3D ts->reg; + allocate_new_reg =3D !tcg_regset_test_reg(i_required_regs,= reg); + } + if (allocate_new_reg) { + /* + * Allocate a new register matching the constraint + * and move the temporary register into it. + */ + temp_load(s, ts, tcg_target_available_regs[ts->type], + i_allocated_regs, 0); + reg =3D tcg_reg_alloc(s, i_required_regs, i_allocated_regs, + i_preferred_regs, ts->indirect_base); + copyto_new_reg =3D true; + } + break; + + case 1: + /* First of an input pair; if i1 =3D=3D i2, the second is an o= utput. */ + i1 =3D i; + i2 =3D arg_ct->pair_index; + ts2 =3D i1 !=3D i2 ? arg_temp(op->args[i2]) : NULL; + + /* + * It is easier to default to allocating a new pair + * and to identify a few cases where it's not required. + */ + if (arg_ct->ialias) { + i_preferred_regs =3D op->output_pref[arg_ct->alias_index]; + if (IS_DEAD_ARG(i1) && + IS_DEAD_ARG(i2) && + ts->val_type =3D=3D TEMP_VAL_REG && + ts->reg < TCG_TARGET_NB_REGS - 1 && + tcg_regset_test_reg(i_required_regs, reg) && + !tcg_regset_test_reg(i_allocated_regs, reg) && + !tcg_regset_test_reg(i_allocated_regs, reg + 1) && + (ts2 + ? ts2->val_type =3D=3D TEMP_VAL_REG && + ts2->reg =3D=3D reg + 1 + : s->reg_to_temp[reg + 1] =3D=3D NULL)) { + break; + } + } else { + /* Without aliasing, the pair must also be an input. */ + tcg_debug_assert(ts2); + if (ts->val_type =3D=3D TEMP_VAL_REG && + ts2->val_type =3D=3D TEMP_VAL_REG && + ts2->reg =3D=3D reg + 1 && + tcg_regset_test_reg(i_required_regs, reg)) { + break; + } + } + reg =3D tcg_reg_alloc_pair(s, i_required_regs, i_allocated_reg= s, + 0, ts->indirect_base); + goto do_pair; + + case 2: /* pair second */ + reg =3D new_args[arg_ct->pair_index] + 1; + goto do_pair; + + case 3: /* ialias with second output, no first input */ + tcg_debug_assert(arg_ct->ialias); i_preferred_regs =3D op->output_pref[arg_ct->alias_index]; =20 - /* - * If the input is readonly, then it cannot also be an - * output and aliased to itself. If the input is not - * dead after the instruction, we must allocate a new - * register and move it. - */ - if (temp_readonly(ts) || !IS_DEAD_ARG(i)) { - allocate_new_reg =3D true; - } else if (ts->val_type =3D=3D TEMP_VAL_REG) { - /* - * Check if the current register has already been - * allocated for another input. - */ - allocate_new_reg =3D tcg_regset_test_reg(i_allocated_regs,= reg); + if (IS_DEAD_ARG(i) && + ts->val_type =3D=3D TEMP_VAL_REG && + reg > 0 && + s->reg_to_temp[reg - 1] =3D=3D NULL && + tcg_regset_test_reg(i_required_regs, reg) && + !tcg_regset_test_reg(i_allocated_regs, reg) && + !tcg_regset_test_reg(i_allocated_regs, reg - 1)) { + tcg_regset_set_reg(i_allocated_regs, reg - 1); + break; } - } + reg =3D tcg_reg_alloc_pair(s, i_required_regs >> 1, + i_allocated_regs, 0, + ts->indirect_base); + tcg_regset_set_reg(i_allocated_regs, reg); + reg +=3D 1; + goto do_pair; =20 - if (!allocate_new_reg) { - temp_load(s, ts, arg_ct->regs, i_allocated_regs, i_preferred_r= egs); - reg =3D ts->reg; - allocate_new_reg =3D !tcg_regset_test_reg(arg_ct->regs, reg); - } - - if (allocate_new_reg) { + do_pair: /* - * Allocate a new register matching the constraint - * and move the temporary register into it. + * If an aliased input is not dead after the instruction, + * we must allocate a new register and move it. */ - temp_load(s, ts, tcg_target_available_regs[ts->type], - i_allocated_regs, 0); - reg =3D tcg_reg_alloc(s, arg_ct->regs, i_allocated_regs, - i_preferred_regs, ts->indirect_base); + if (arg_ct->ialias && !IS_DEAD_ARG(i)) { + TCGRegSet t_allocated_regs =3D i_allocated_regs; + + /* + * Because of the alias, and the continued life, make sure + * that the temp is somewhere *other* than the reg pair, + * and we get a copy in reg. + */ + tcg_regset_set_reg(t_allocated_regs, reg); + tcg_regset_set_reg(t_allocated_regs, reg + 1); + if (ts->val_type =3D=3D TEMP_VAL_REG && ts->reg =3D=3D reg= ) { + /* If ts was already in reg, copy it somewhere else. */ + TCGReg nr; + bool ok; + + tcg_debug_assert(ts->kind !=3D TEMP_FIXED); + nr =3D tcg_reg_alloc(s, tcg_target_available_regs[ts->= type], + t_allocated_regs, 0, ts->indirect_b= ase); + ok =3D tcg_out_mov(s, ts->type, nr, reg); + tcg_debug_assert(ok); + + set_temp_val_reg(s, ts, nr); + } else { + temp_load(s, ts, tcg_target_available_regs[ts->type], + t_allocated_regs, 0); + copyto_new_reg =3D true; + } + } else { + /* Preferably allocate to reg, otherwise copy. */ + i_required_regs =3D (TCGRegSet)1 << reg; + temp_load(s, ts, i_required_regs, i_allocated_regs, + i_preferred_regs); + copyto_new_reg =3D ts->reg !=3D reg; + } + break; + + default: + g_assert_not_reached(); + } + + if (copyto_new_reg) { if (!tcg_out_mov(s, ts->type, reg, ts->reg)) { /* * Cross register class move not supported. Sync the @@ -3656,15 +3948,46 @@ static void tcg_reg_alloc_op(TCGContext *s, const T= CGOp *op) /* ENV should not be modified. */ tcg_debug_assert(!temp_readonly(ts)); =20 - if (arg_ct->oalias && !const_args[arg_ct->alias_index]) { - reg =3D new_args[arg_ct->alias_index]; - } else if (arg_ct->newreg) { - reg =3D tcg_reg_alloc(s, arg_ct->regs, - i_allocated_regs | o_allocated_regs, - op->output_pref[k], ts->indirect_base); - } else { - reg =3D tcg_reg_alloc(s, arg_ct->regs, o_allocated_regs, - op->output_pref[k], ts->indirect_base); + switch (arg_ct->pair) { + case 0: /* not paired */ + if (arg_ct->oalias && !const_args[arg_ct->alias_index]) { + reg =3D new_args[arg_ct->alias_index]; + } else if (arg_ct->newreg) { + reg =3D tcg_reg_alloc(s, arg_ct->regs, + i_allocated_regs | o_allocated_reg= s, + op->output_pref[k], ts->indirect_b= ase); + } else { + reg =3D tcg_reg_alloc(s, arg_ct->regs, o_allocated_reg= s, + op->output_pref[k], ts->indirect_b= ase); + } + break; + + case 1: /* first of pair */ + tcg_debug_assert(!arg_ct->newreg); + if (arg_ct->oalias) { + reg =3D new_args[arg_ct->alias_index]; + break; + } + reg =3D tcg_reg_alloc_pair(s, arg_ct->regs, o_allocated_re= gs, + op->output_pref[k], ts->indirect_= base); + break; + + case 2: /* second of pair */ + tcg_debug_assert(!arg_ct->newreg); + if (arg_ct->oalias) { + reg =3D new_args[arg_ct->alias_index]; + } else { + reg =3D new_args[arg_ct->pair_index] + 1; + } + break; + + case 3: /* first of pair, aliasing with a second input */ + tcg_debug_assert(!arg_ct->newreg); + reg =3D new_args[arg_ct->pair_index] - 1; + break; + + default: + g_assert_not_reached(); } tcg_regset_set_reg(o_allocated_regs, reg); set_temp_val_reg(s, ts, reg); --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359494; cv=none; d=zohomail.com; s=zohoarc; b=C2y8djw0YJpw4gVl1aG0a1vC4dmhXZg2VVcDcdcCoQaJgVaoeRvEiVU9CqzxR+8ULmHfb9JmckUHsJhhUvga75sgwBmRoyhvz8TaRdAjoIjMmQxTD5+ZGrv6NyTYhmpLVTBmO/6T+DXYZ8gZPXkJHWrgKZ2NOqKM9wfJRSWYCxg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359494; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=0A7BGyHqAN6alhYKfJ9E1yLwyik0pT3tSjb2m0LkGsk=; b=gqw8LbRVy08m5EiI4rL3fDgVzYNCuwXzDA9nuUvbnHaK8GkW9/EMFgElM6jvC+kgmsX9v6ey2Yn+ufYbPpVYt0+rMRjWjjgyELuDwsS3CM4W/CA5cFMhZZrNCvtxSGa6qGc6S7Xz7+AsbW6+61WzGH895NFvixDvzQaY2nE1B44= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 167235949468180.79685986974437; Thu, 29 Dec 2022 16:18:14 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2rE-00034O-Pn; Thu, 29 Dec 2022 19:02:44 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2rD-00033g-SV for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:43 -0500 Received: from mail-pj1-x1034.google.com ([2607:f8b0:4864:20::1034]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2rC-0002hk-6a for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:43 -0500 Received: by mail-pj1-x1034.google.com with SMTP id n12so7889704pjp.1 for ; Thu, 29 Dec 2022 16:02:41 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0A7BGyHqAN6alhYKfJ9E1yLwyik0pT3tSjb2m0LkGsk=; b=VI7UhUvEZDHWqYD5ERMz9FgVAKOPMz7RTN3SpfU7hq9yxsPA2L9AjwJ1OLssbcJ6dz GvSsQGdeKs+HnBop3EDFvtmKhlgthEn2cnMLl7s9KYxYM8tkeRdIotLiMseNaCBUPw3Y xlZfHHJ5wRhkbLBTMadikHFljKlCwfUZwQKyh5Hlj7mdVKdVnx5ZpF9o8Zhif+2p2REZ whGaYynLOQshrugchZbk0yhIckWr66EewmXAWNs3qx16/+q5y1CyEF8rwaitLUMPzs/+ EEAegjWNsDmuwnFkaRYXxk2siIndV2uke8VwBXCp8RR52gC1ySEsFM/gMhVb04qQZHl1 t7xw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0A7BGyHqAN6alhYKfJ9E1yLwyik0pT3tSjb2m0LkGsk=; b=DmBBlCPJnTK2wHBZbr9KSdhQWO0pYMeQat+uI/fEobGksFt/VZKoER+iOUp45nGLiE 9G4jtQOrtVMwvu0IYfnOojOaNmBDRsy8Zya/S78kaeKg+QfZsYH2ITevHJoRSXz5Z//H qtB4sj5obfrV7bt4weUh9WzuTKvrVVnCX8PMjdpcO7+EPiy6czh+xI8JZN5vm5iOf0Zs dRwTlC/bhVBrw638rKxZPbCYCL31X7iYBpIuovoHax2fmt3Dh3x+RgKyt5VyKMxRBxkH RchXoWjuRGTmcBhzdrgqeoyZwDrFF9Q/kbh2RXCoCh4ldJMsXI2T+wwl70+A57kBYewA MErA== X-Gm-Message-State: AFqh2kr0yMdPHngWsPlbZGchTHWczd1rTzGBEP5sZZHa59FvKqhYif2g A4Bh7D1oM+QQcXjvrK6fvvsRMkWJ7ixFUW2B X-Google-Smtp-Source: AMrXdXt1V6rJAzK65jVteq4WAwlBkRgyYNYce3vs+Flk482MHRLptJ0qOSeYjE86ww49skxuTDYqiA== X-Received: by 2002:a05:6a20:e613:b0:ad:aaac:d3fe with SMTP id my19-20020a056a20e61300b000adaaacd3femr31399933pzb.47.1672358561413; Thu, 29 Dec 2022 16:02:41 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [PULL 20/47] accel/tcg: Set cflags_next_tb in cpu_common_initfn Date: Thu, 29 Dec 2022 16:01:54 -0800 Message-Id: <20221230000221.2764875-21-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1034.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359496128000001 While we initialize this value in cpu_common_reset, that isn't called during startup, so set it as well in init. This fixes -singlestep versus the very first TB. Fixes: 04f5b647ed07 ("accel/tcg: Handle -singlestep in curr_cflags") Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- hw/core/cpu-common.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index 78b5f350a0..b177e761f0 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -235,6 +235,7 @@ static void cpu_common_initfn(Object *obj) /* the default value is changed by qemu_init_vcpu() for softmmu */ cpu->nr_cores =3D 1; cpu->nr_threads =3D 1; + cpu->cflags_next_tb =3D -1; =20 qemu_mutex_init(&cpu->work_mutex); QSIMPLEQ_INIT(&cpu->work_list); --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359501; cv=none; d=zohomail.com; s=zohoarc; b=AvHen1pTLKV573fj0OoWNh9Q/IPwmCrKg0oJvKIXUV3SlRSIZL9Wq/KwViR9gBvpY9UTo1APVmw9cQ/JH2uAszp9jaRueZrR/lIFkSGNZ8R3adG5i/E4UyUXgLTVE/hTESHRS4hyYHBOVao522hzHGcswpj9x4WteA4lw3a4Xu4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359501; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=kWUlisroi1Ap5EswxjI+i9O+kMNxYO+3kWUIW10W2to=; b=PYHPG4uhKmMG/w+8xQUBVuTzzdHRWfvqr+ZqwLC4HK0DCb0Uo4qtksj6LaOngfhhkur5Sc7kADfkQBKYMEmGELLMLi1p8bQJ55heGtBRY+sS82UbFypmeCd6aUe/pR1PKaM5kc6z+X2sMT7lZEUVCC1FhpTbFXFLcH0MxBdRCoU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672359501294308.0464006462869; Thu, 29 Dec 2022 16:18:21 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2rI-00036a-W5; Thu, 29 Dec 2022 19:02:49 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2rF-00034b-6x for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:45 -0500 Received: from mail-pj1-x1034.google.com ([2607:f8b0:4864:20::1034]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2rD-0002ih-IB for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:44 -0500 Received: by mail-pj1-x1034.google.com with SMTP id h7-20020a17090aa88700b00225f3e4c992so11733466pjq.1 for ; Thu, 29 Dec 2022 16:02:43 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=kWUlisroi1Ap5EswxjI+i9O+kMNxYO+3kWUIW10W2to=; b=MyljtFO70CWLYUz475+SyA76dVgSH3RCDgOBr11yB5OgnW2gqvtsOVzYmDG7QELfvf P0EbOq1QGIFIVcyZBeRQZkTSRQDJudHjKiIZ1ZokEie6ewiB84v/TwJDqz03ZJOwgLSS e2DZ+zCB09LXRWecTzhBFyd2pUmZP+vLkK5vRHmgfglvO/+M/U1uUkDygulKAETUj5fe FoccjPojIgnhDFIDC/PaeSO17s25Wjug1d72HPLnxzvpa0RftDbQsk18Jm1RAE+kugKt 7WlD28NKJwE+ySh820DuX+OEgPLvsQBNPpICy/Abc20uz1+ofOtRxVP6K/Xp6DjzduRi u9RQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kWUlisroi1Ap5EswxjI+i9O+kMNxYO+3kWUIW10W2to=; b=28FnQGwciWD6zXoYq97v92HPQoHjKjFCKuwcI/Z0MSyZ4iSyLc/UdOVutStjl9yzn6 1Q33ytmnN0L2+9P24D1vdAvn1DuhCxxygL4HaopnyJSzCvtoEjSjvTAerfQjIy/DRti4 QF41wCfgtD+p8RMs5v5tSigyo4Y8MDwtT1vJzgPWYEYVOgCaZYQgm6368cz6d8N593+H YEAr295DQOoGHEDnq5k1xpB3DNBas8FNbwwIG2LLmWJqzYpzvjTRGmN1y9R8BMxiteQq GgnJxY+Q9vt0rg6Pxo/xGnq9PnapkYMjIFq9XMbS0yjIXqBrrS2c4FLW8YI6qVpAhxNI onjA== X-Gm-Message-State: AFqh2kpskcjInfSe3UenA5BSoCHRTwO1NIlAM1UrL0jn+3KLuIhtaVb4 hX/IqFi0xTsZ+3zbXfPIiNKVRTOoDTBTp5aV X-Google-Smtp-Source: AMrXdXv3KysQqbl36XDOCoF2RCXrHFreCUxunh9g8t6s53y47fJAjVvuAHgWy7IB2yJzUy2KVTs8jw== X-Received: by 2002:a17:902:7247:b0:192:8f2c:dd23 with SMTP id c7-20020a170902724700b001928f2cdd23mr9866112pll.13.1672358562342; Thu, 29 Dec 2022 16:02:42 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Mark Cave-Ayland , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 21/47] target/sparc: Avoid TCGV_{LOW,HIGH} Date: Thu, 29 Dec 2022 16:01:55 -0800 Message-Id: <20221230000221.2764875-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1034.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359502097000001 Use the official extend/extract functions instead of routines that will shortly be internal to tcg. Cc: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- target/sparc/translate.c | 21 ++++----------------- 1 file changed, 4 insertions(+), 17 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 34858eb95f..150aeecd14 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -163,13 +163,6 @@ static inline void gen_update_fprs_dirty(DisasContext = *dc, int rd) /* floating point registers moves */ static TCGv_i32 gen_load_fpr_F(DisasContext *dc, unsigned int src) { -#if TCG_TARGET_REG_BITS =3D=3D 32 - if (src & 1) { - return TCGV_LOW(cpu_fpr[src / 2]); - } else { - return TCGV_HIGH(cpu_fpr[src / 2]); - } -#else TCGv_i32 ret =3D get_temp_i32(dc); if (src & 1) { tcg_gen_extrl_i64_i32(ret, cpu_fpr[src / 2]); @@ -177,22 +170,16 @@ static TCGv_i32 gen_load_fpr_F(DisasContext *dc, unsi= gned int src) tcg_gen_extrh_i64_i32(ret, cpu_fpr[src / 2]); } return ret; -#endif } =20 static void gen_store_fpr_F(DisasContext *dc, unsigned int dst, TCGv_i32 v) { -#if TCG_TARGET_REG_BITS =3D=3D 32 - if (dst & 1) { - tcg_gen_mov_i32(TCGV_LOW(cpu_fpr[dst / 2]), v); - } else { - tcg_gen_mov_i32(TCGV_HIGH(cpu_fpr[dst / 2]), v); - } -#else - TCGv_i64 t =3D (TCGv_i64)v; + TCGv_i64 t =3D tcg_temp_new_i64(); + + tcg_gen_extu_i32_i64(t, v); tcg_gen_deposit_i64(cpu_fpr[dst / 2], cpu_fpr[dst / 2], t, (dst & 1 ? 0 : 32), 32); -#endif + tcg_temp_free_i64(t); gen_update_fprs_dirty(dc, dst); } =20 --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672358651; cv=none; d=zohomail.com; s=zohoarc; b=BjqH3WM51Ru3vdW1WWnioVbpD4BCPWuD1xwwCTW09yAXqPE9RljuUKVxoGp/PRL7R9FKSDzqC+BYlu9Q8jgPgi0+oN3EOROY3FsykxtqHF2ZkBCQT4wijOZAusamaR6PCW290XEx/e2P1I/EiRAuW7tMdWSr8DRED3n/3EiQOyM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672358651; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=vcQlxYY7mFIcT5pvKb1eZPHlZnAn92mI9Ka1689AM7M=; b=EfecLcOBXB7L/uO4bERMUtk+TOfxj2t4enX5Ids2x7wwH5uH4yyyU5OaiJfc/RyuD2+5MgdfGqz8PZLohokqArwsKUn3r2agJjF3mUtGzUGOZL04AwBFA6iHd2QNn+6YAIwy65mJx8vA1L/CmZ9L9ySTA+9lQpQERw0ezW0GtBs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672358651018700.3753587291097; Thu, 29 Dec 2022 16:04:11 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2re-0003Bx-T6; Thu, 29 Dec 2022 19:03:10 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2rQ-00038Y-Dw for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:58 -0500 Received: from mail-pl1-x62e.google.com ([2607:f8b0:4864:20::62e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2rE-0002ix-ME for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:46 -0500 Received: by mail-pl1-x62e.google.com with SMTP id d3so20345016plr.10 for ; Thu, 29 Dec 2022 16:02:44 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vcQlxYY7mFIcT5pvKb1eZPHlZnAn92mI9Ka1689AM7M=; b=X0v/TJYctQXXG0Cu98Yk4viD/tm2h73/CNBeJvVpcGmDg4j1eiWgPoZFvwDTqRQzye dOgxpnsRaCdICl2F+b5+T6KWaXkxf0p1NQ/6KafkZJojYKOrAjQqyru8tA6B6u7T2qpG kTBInIS3HNaFX4gEoV5Y2avOocEyQuffEYigIfTIAHn3Z0WiAOVSFvL7rHdfnN0bGAPm vJTjHKgOjr4q27ugGVcuGbMsH8vMcVYNQ0aTV9Pa9fuzuZAMotXQaqVy3J6Za33OEemN jM5o/lARWzQPkKhuWFF+Q8V+nQb+Jn9gGlSPnEcci6+w7583VbJma69pSnpjRf9gRpCW zMUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vcQlxYY7mFIcT5pvKb1eZPHlZnAn92mI9Ka1689AM7M=; b=G6dedqSGgsDh6OdpbxXFFI9F2QSpvAJ2LJptbpPnJc/rX+j+H6c3842ODYvDhuXFAO rw2nMDYKZ3ubCaL6kiYVHwIOlA4Ne0BWm8HnfcSN3+vxrD8pnYFiA+QiI+DtERQn39Mn hRiC8qdtexWTeu/E6fDvME6NXl02mNAJIFBgrKsm7jQfhGpQa7BjMEvhYOJxQfQo9gDt I92OpvRg9LcaLS1EEvY40j/HNQsoNn1ZcU74AIBkDp7bhmo1vAN+1dfbSdNsNS10RDXW waWEKVDVPwh2gMFWiWSXP79LXZzMi8xlF2hDWEgGKWcLQ5XwXUb69jNtNHUbSNtr1ZH6 iwxQ== X-Gm-Message-State: AFqh2krww5MIWEWF1WF9HNFlVPMlNwV+ZNu5MjM5HGOqLqJ6N05O+zEO jCqViD0NKzZtbUlEa2ak6oOvqkcPRF06nyLV X-Google-Smtp-Source: AMrXdXtxnq0ussU3xrIfsrvaxIkHF/+A/XH0eiau4crjHYsG6mrkkYvjcILVoV7w/hrLO2ZJMI+tBQ== X-Received: by 2002:a17:903:264a:b0:189:ed57:9b0d with SMTP id je10-20020a170903264a00b00189ed579b0dmr22100839plb.44.1672358563227; Thu, 29 Dec 2022 16:02:43 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 22/47] tcg: Move TCG_{LOW,HIGH} to tcg-internal.h Date: Thu, 29 Dec 2022 16:01:56 -0800 Message-Id: <20221230000221.2764875-23-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672358651631000004 Move the error-generating fallback from tcg-op.c, and replace "_link_error" with modern QEMU_ERROR markup. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- include/tcg/tcg-op.h | 33 +++++---------------------------- include/tcg/tcg.h | 12 ------------ tcg/tcg-internal.h | 14 ++++++++++++++ tcg/tcg-op-vec.c | 2 ++ tcg/tcg-op.c | 37 ++++++++++++++++++++++++++++--------- 5 files changed, 49 insertions(+), 49 deletions(-) diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h index 209e168305..8176f194cb 100644 --- a/include/tcg/tcg-op.h +++ b/include/tcg/tcg-op.h @@ -667,35 +667,12 @@ static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv= _i64 arg1, TCGv_i64 arg2) tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2); } #else /* TCG_TARGET_REG_BITS =3D=3D 32 */ -static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2, - tcg_target_long offset) -{ - tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset); -} +void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset); +void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset= ); +void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset= ); =20 -static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2, - tcg_target_long offset) -{ - tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset); -} - -static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2, - tcg_target_long offset) -{ - tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset); -} - -static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 a= rg2) -{ - tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1), - TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2)); -} - -static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 a= rg2) -{ - tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1), - TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2)); -} +void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); +void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); =20 void tcg_gen_discard_i64(TCGv_i64 arg); void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg); diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 5c2254ce9f..d207bc47be 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -737,18 +737,6 @@ static inline TCGv_vec temp_tcgv_vec(TCGTemp *t) return (TCGv_vec)temp_tcgv_i32(t); } =20 -#if TCG_TARGET_REG_BITS =3D=3D 32 -static inline TCGv_i32 TCGV_LOW(TCGv_i64 t) -{ - return temp_tcgv_i32(tcgv_i64_temp(t)); -} - -static inline TCGv_i32 TCGV_HIGH(TCGv_i64 t) -{ - return temp_tcgv_i32(tcgv_i64_temp(t) + 1); -} -#endif - static inline TCGArg tcg_get_insn_param(TCGOp *op, int arg) { return op->args[arg]; diff --git a/tcg/tcg-internal.h b/tcg/tcg-internal.h index cc82088d52..a9ea27f67a 100644 --- a/tcg/tcg-internal.h +++ b/tcg/tcg-internal.h @@ -59,4 +59,18 @@ static inline unsigned tcg_call_flags(TCGOp *op) return tcg_call_info(op)->flags; } =20 +#if TCG_TARGET_REG_BITS =3D=3D 32 +static inline TCGv_i32 TCGV_LOW(TCGv_i64 t) +{ + return temp_tcgv_i32(tcgv_i64_temp(t)); +} +static inline TCGv_i32 TCGV_HIGH(TCGv_i64 t) +{ + return temp_tcgv_i32(tcgv_i64_temp(t) + 1); +} +#else +extern TCGv_i32 TCGV_LOW(TCGv_i64) QEMU_ERROR("32-bit code path is reachab= le"); +extern TCGv_i32 TCGV_HIGH(TCGv_i64) QEMU_ERROR("32-bit code path is reacha= ble"); +#endif + #endif /* TCG_INTERNAL_H */ diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c index 463dabf515..5bf100ea7d 100644 --- a/tcg/tcg-op-vec.c +++ b/tcg/tcg-op-vec.c @@ -21,6 +21,8 @@ #include "tcg/tcg.h" #include "tcg/tcg-op.h" #include "tcg/tcg-mo.h" +#include "tcg-internal.h" + =20 /* Reduce the number of ifdefs below. This assumes that all uses of TCGV_HIGH and TCGV_LOW are properly protected by a conditional that diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 019fab00cc..6168327030 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -28,16 +28,8 @@ #include "tcg/tcg-op.h" #include "tcg/tcg-mo.h" #include "exec/plugin-gen.h" +#include "tcg-internal.h" =20 -/* Reduce the number of ifdefs below. This assumes that all uses of - TCGV_HIGH and TCGV_LOW are properly protected by a conditional that - the compiler can eliminate. */ -#if TCG_TARGET_REG_BITS =3D=3D 64 -extern TCGv_i32 TCGV_LOW_link_error(TCGv_i64); -extern TCGv_i32 TCGV_HIGH_link_error(TCGv_i64); -#define TCGV_LOW TCGV_LOW_link_error -#define TCGV_HIGH TCGV_HIGH_link_error -#endif =20 void tcg_gen_op1(TCGOpcode opc, TCGArg a1) { @@ -1171,6 +1163,21 @@ void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg= _target_long offset) #endif } =20 +void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset) +{ + tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset); +} + +void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset) +{ + tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset); +} + +void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset) +{ + tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset); +} + void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset) { #if HOST_BIG_ENDIAN @@ -1182,6 +1189,18 @@ void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, tc= g_target_long offset) #endif } =20 +void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) +{ + tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1), + TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2)); +} + +void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) +{ + tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1), + TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2)); +} + void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) { tcg_gen_and_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2)); --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672358894; cv=none; d=zohomail.com; s=zohoarc; b=PBFkoZ7TKEqwopX6oij5Z7LECKeXwAou4AEQL7JRecX7fPkud+GF0URzh5+e2JPT7SPeranCvvrhHkSJSyR74lGBSCYr8xW2KNzCqCWSfLa/RMXhTOZJbw/rjlMyOWSDfVG5CInaS4Mnomy+m5zWeZSPkFJE6gYwaHcoXoYaDP8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672358894; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=4mfBOAV47I9uDw1GwX1iov09oIqhGRSjo/+SK90rAOA=; b=bWnGMaei4A+VJJ035My7+wo1l6gG03YgihKXsYEpVwypJoOWA10a8+Yft9/PgEYm5qgteJ8G9YEYzyEkAQSb99TEoV5dpBfL14OaO2TJmEJDcZjuqYmnYyCrkIIx6lPNd15kDTequXvKGtr0kwLuxeEq/fzyh7QlxuUcsc+dvU8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672358894154626.2023025034046; Thu, 29 Dec 2022 16:08:14 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2re-0003BG-2a; Thu, 29 Dec 2022 19:03:10 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2rQ-00038X-Da for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:58 -0500 Received: from mail-pl1-x630.google.com ([2607:f8b0:4864:20::630]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2rE-0002hW-RG for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:46 -0500 Received: by mail-pl1-x630.google.com with SMTP id d9so3610320pll.9 for ; Thu, 29 Dec 2022 16:02:44 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4mfBOAV47I9uDw1GwX1iov09oIqhGRSjo/+SK90rAOA=; b=gA4Reg9aljPMHew++LsgaVhcrWXzrMcffDzRz/8FszHAySzSnqyV8Z6O/VOHHtWE+B R3+BArYUfIRPjii4FJG2EKt5XGw64XFsFNx5g5Xf2mW9XfVNr0FeRje4cs+7GMrtgUAF YjzfbLfRVkosDPqycsoTEHmKGlcS9mQac8SIuxn/QJSiPDkVBno+v5O3CZFIkSKaHdpA AMoznYmt46uzhupUFbwEgcJnr/L+g7C2HA3w2OkKRF+3TjuFC2z8JoBWBY5WZvGUMLgO o+OFtIqLJ4+nEW9a+YFmZFEcbOKjP3pwdDUiJ1yBEMEYAHZwatY15pKJAHIDlCBj/WXA 6j1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4mfBOAV47I9uDw1GwX1iov09oIqhGRSjo/+SK90rAOA=; b=uB3amRcampyZoJjax0iMIMfTiKqFJw5A9k7wrIVgrokTb6AhwRSuQ0NjVEAaNIXIA5 e1j92UnfK1HQNHJ6fZgzG9ZDL0NtDsRMyIcLz+j9H/Z9+5fXZWFQ1K19uZKN1Sg6oRjv 9vl4laYMtNnfjakTw7SW5dIgZb910IG3/KdjwrabtbAjupNbT7a4C7qShzWeB+MqcFXi 0A2oX7zZiESH4I/XDqPSuFhcl5/A7bsXCIGvn7tu7F1jyir+S+0ek+UYDafMK50LuzQe KsPstTC9ZyiFDDShPk0f//+eC9hhYSPkgaJgkLFKzpZZGonje6xjkVbfteCQTVQXRfv4 3/xA== X-Gm-Message-State: AFqh2kpScgQ9fVyJp+qSqfy8Jf1j4yG0FuE2hi2atOcWiSoUVgCYg/cQ uyzkcsAlb9UJ9ftqmPDbMePVvFUPS3wV+n9Y X-Google-Smtp-Source: AMrXdXsNn71ypMxg+lUWXgfDZX3r2UJ0tL1ItPcP60HfNiJ6Az69zjLyQsuPaHvzjHjXNAqRbEQMaw== X-Received: by 2002:a17:902:f609:b0:18d:dd85:303c with SMTP id n9-20020a170902f60900b0018ddd85303cmr54180049plg.8.1672358564031; Thu, 29 Dec 2022 16:02:44 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 23/47] tcg: Add temp_subindex to TCGTemp Date: Thu, 29 Dec 2022 16:01:57 -0800 Message-Id: <20221230000221.2764875-24-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672358896929000003 Record the location of a TCGTemp within a larger object. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 1 + tcg/tcg.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index d207bc47be..afa18986b1 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -456,6 +456,7 @@ typedef struct TCGTemp { unsigned int mem_coherent:1; unsigned int mem_allocated:1; unsigned int temp_allocated:1; + unsigned int temp_subindex:1; =20 int64_t val; struct TCGTemp *mem_base; diff --git a/tcg/tcg.c b/tcg/tcg.c index e7570ecb4a..4f2e05c69e 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -928,6 +928,7 @@ TCGTemp *tcg_global_mem_new_internal(TCGType type, TCGv= _ptr base, ts2->mem_allocated =3D 1; ts2->mem_base =3D base_ts; ts2->mem_offset =3D offset + (1 - bigendian) * 4; + ts2->temp_subindex =3D 1; pstrcpy(buf, sizeof(buf), name); pstrcat(buf, sizeof(buf), "_1"); ts2->name =3D strdup(buf); @@ -974,6 +975,7 @@ TCGTemp *tcg_temp_new_internal(TCGType type, bool temp_= local) ts2->base_type =3D TCG_TYPE_I64; ts2->type =3D TCG_TYPE_I32; ts2->temp_allocated =3D 1; + ts2->temp_subindex =3D 1; ts2->kind =3D kind; } else { ts->base_type =3D type; @@ -1092,6 +1094,7 @@ TCGTemp *tcg_constant_internal(TCGType type, int64_t = val) ts2->type =3D TCG_TYPE_I32; ts2->kind =3D TEMP_CONST; ts2->temp_allocated =3D 1; + ts2->temp_subindex =3D 1; ts2->val =3D val >> 32; } else { ts->base_type =3D type; --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359522; cv=none; d=zohomail.com; s=zohoarc; b=OYf1G1LNswjbO2wjYT9DOlSzyODrm4QRICztBIrJmvdriQcqNq96sQu7dRmpA6RDpDdCH80ECdYDMkmzV7E/Di6mhy994iSspowiUqKF9e8zG2k9qDKCTvJn+zNVf3Xk66uUvEkJijsnSAeaVYdxjnd0Dv252nz+5Pkg2JchiiU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359522; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=U5s77/HOJU835mIfYuf5JfxpCLvovCeIACqQpnTsn4Q=; b=YIcGYoP1vhK+xW8GhKcw8WDOH5gF4+H+cSuvRTHghkyoJjHm6CSa2oXOOExbDxa5Kaq2H91YYcMG8uqRgV5aNma9L3f9WDoB+0cfC6m8UR6lI4CuAgADDhFPJvJZpP72o5fnX75/c1HOV0z1+cKVA2FIxFD17hzyr4NPc0Qo7qQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 167235952299024.564781804978224; Thu, 29 Dec 2022 16:18:42 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2sQ-0003vH-VM; Thu, 29 Dec 2022 19:03:59 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2rX-00039J-0l for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:03:05 -0500 Received: from mail-pj1-x102b.google.com ([2607:f8b0:4864:20::102b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2rN-0002jI-Kz for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:03:01 -0500 Received: by mail-pj1-x102b.google.com with SMTP id gv5-20020a17090b11c500b00223f01c73c3so19378037pjb.0 for ; Thu, 29 Dec 2022 16:02:45 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=U5s77/HOJU835mIfYuf5JfxpCLvovCeIACqQpnTsn4Q=; b=WpW/d/cTIDQTjQO+HxI6YyhWQtBtpGlz0unyBbptOV1sWNAEOlsfe9np0I9m/F9z2V GhN9RlFDdx4zyz25q14vQY1W1jbXaGMx1YVLKWUYtAsXdGFPtwdAJzkaopNjtgxTAzEe BAxeGAGa+GH4OcaIcxq4hUgE+aGcThH7nIBUkui2CCqsuTlDdQgjAmjJl7jSQ5FF81RH S2DKIeprfmEmuVzLjA2phlMZw2nV8hiFE/0YGsFD1kaXa+HaCCJaW39+FnRa8UPVNT2t KJDaOh5DG7HlAMibLZsigTQg7EN6WaAq2BUrY8bhZijAzqUX9GRAkOlSpvO3PQdBXsor BTKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=U5s77/HOJU835mIfYuf5JfxpCLvovCeIACqQpnTsn4Q=; b=Z5mcikzjFlijnlsADZMr7EA8lQiJ8/u8VAiyd4TRHtETA5XMgVDhK97ALvs07kj12t WhnPMWHFGBJarCoNg0QX/Nj+gOMGZGtGZJRxoS3LbYK0y/vtFU4apLBJPWRGlteYxvRF 0Zr7e8OH9It4AGehsjMHq0WX11jKrbIts7VwePZ8jo3EVeCUxoJessqTLR0YqvDT0xXU 6qOJd2FDmTZyaQGWimIN+8d0+bm3Fpvd1jzD9npu4e84nM1Wx70rv08QvgQE2FpoZbCS 0gjUh8rthpxo5TwdUN7iOK+YhbQnA1W0rgM62cFetV8sTGRCq1Q0X5VS0rlmGEYA5aSE /+3g== X-Gm-Message-State: AFqh2kq6ag8WQ94P+9ZCJZtGqMpgs7KN4kwis6QIpsxrJ5GNuKRe83c9 vlIZ0LaBlfTrKnmQSffFXnWYH3HWr//DIAZR X-Google-Smtp-Source: AMrXdXurpqhd8tFncLYtFoCoDyhYpEY3tT4rGqngs8JA3nCMSDfRAlkLTz2MiGp8ebOLyPcduCM3aw== X-Received: by 2002:a17:902:7610:b0:192:751d:b2e4 with SMTP id k16-20020a170902761000b00192751db2e4mr15135728pll.48.1672358564913; Thu, 29 Dec 2022 16:02:44 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 24/47] tcg: Simplify calls to temp_sync vs mem_coherent Date: Thu, 29 Dec 2022 16:01:58 -0800 Message-Id: <20221230000221.2764875-25-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102b; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359524214000001 The first thing that temp_sync does is check mem_coherent, so there's no need for the caller to do so. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/tcg.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 4f2e05c69e..28ab174f1b 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -4078,12 +4078,8 @@ static bool tcg_reg_alloc_dup2(TCGContext *s, const = TCGOp *op) =20 /* If the two inputs form one 64-bit value, try dupm_vec. */ if (itsl + 1 =3D=3D itsh && itsl->base_type =3D=3D TCG_TYPE_I64) { - if (!itsl->mem_coherent) { - temp_sync(s, itsl, s->reserved_regs, 0, 0); - } - if (!itsh->mem_coherent) { - temp_sync(s, itsh, s->reserved_regs, 0, 0); - } + temp_sync(s, itsl, s->reserved_regs, 0, 0); + temp_sync(s, itsh, s->reserved_regs, 0, 0); #if HOST_BIG_ENDIAN TCGTemp *its =3D itsh; #else --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359089; cv=none; d=zohomail.com; s=zohoarc; b=f/pqWwO+9+qlAKnm2ZcC88xcjdw4Rz2Burm6cs9qXdkfsE+jsmRRFykzIDZeNX6QxuY1cuRBdSaBgBgmFQ0cOoUnobxPh9v+wfclGAmU3pjpZh/5qJILf2nZIVhOI60KPeEHtQti/nABLWJsgY6Cu3MiOKcgAkwTDtWU+n/o9Fc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359089; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=h02fHLgGdkElnqLtU641SqBxa4HCL3+Zlk8MhIy4nmY=; b=D5wuwnTGcR3+4qfTQyml8yR3TufNByzW2UttmKIw3LxZiK4TaY9ENhbTX6EiJ/ypF+nB7Qj/iKxF0xGelexwid/2emGw5b6mFnrkBBIweGkBiS4W5d8bO3YEFtZ8gLs4t4RdchGr9u9qwP3wfRoPgYQsNpzRCfRKEd4jZQyh6Ho= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672359089232487.490786319142; Thu, 29 Dec 2022 16:11:29 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2sO-0003tg-EU; Thu, 29 Dec 2022 19:03:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2rX-00039L-1N for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:03:05 -0500 Received: from mail-pj1-x102f.google.com ([2607:f8b0:4864:20::102f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2rR-0002g0-UW for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:03:02 -0500 Received: by mail-pj1-x102f.google.com with SMTP id o8-20020a17090a9f8800b00223de0364beso24359135pjp.4 for ; Thu, 29 Dec 2022 16:02:46 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=h02fHLgGdkElnqLtU641SqBxa4HCL3+Zlk8MhIy4nmY=; b=riueenV0BXRuRBtr59nSfBLagDfRF5zklEY5dP5wDfoRd4KO6z/XK9vAt6FeGzNBZE JmcDWEj8ZD54RXeQ7/BChZ20+LN6A3hg9k9DDffE/VnjIlUsGsFqCYl7YIit3TxRv5Hw RLrMTNOuwM1xGPmcfs/Ln/Va/UALrQAkuYpZxxF81CBDca1M1Lv8Kp5DzPVBfn6XhRkQ TtLkZabh2kHHEuP4zHcklqBTipUBt/YY83IhtrP1RL462FhzZ9iNArRsojzJLxP0RaK/ rGBxd0s2H+QTKtAPWXsoZ05C7eSABorWj5Kw2xxyna+7COq1QVkByoo20Hk99+1XaY6N Gp0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=h02fHLgGdkElnqLtU641SqBxa4HCL3+Zlk8MhIy4nmY=; b=CkfUhJr6Wttu6wgy96Z/MeQ7hDJpCYqs39G/ymc02NJoU7ChhGqrQmiJQqUBwYPfq8 rI0XRpHpgHNFNJe95nfrmev1BGb10zNOOAUb1UR7NWC+zgX+RaeCqD3USnAGSGi9RZjb iLIg0Ic25URWtrstOnmNnN0sSbA5lwP8r3EH1/eyhq+9M83tX9ktqO8lgBnNCUntwhDK upkUjWuBCMGdsCaZegVFmsdKO+LGBYrcgKTewvIC9Q8z9F2ecHmpIeL26sEtyT/dZphv mlrvI2RnMx9RL/JRCuwtAo+pENMZb/uI/ps9GfSLJb9uQzIR4Cqx7QUd8euHbMNZBZb/ GgxQ== X-Gm-Message-State: AFqh2ko++1obajCswc7XlDU9Zfed9Eflo1FIQw8LY4tcsHbGGWBXKeUg F5T0DWLSc22K3/yGu6xH3rW/XYvkXbtqwDSa X-Google-Smtp-Source: AMrXdXs8O8RHQHar+z2QC2JIOQQNftggiMsVWgwgmAIPA2F+DCPTY7F2lFvM9xotrDKzl3F32vVlQA== X-Received: by 2002:a17:902:e04b:b0:192:6b23:e38b with SMTP id x11-20020a170902e04b00b001926b23e38bmr20618490plx.24.1672358565934; Thu, 29 Dec 2022 16:02:45 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 25/47] tcg: Allocate TCGTemp pairs in host memory order Date: Thu, 29 Dec 2022 16:01:59 -0800 Message-Id: <20221230000221.2764875-26-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359090848000003 Allocate the first of a pair at the lower address, and the second of a pair at the higher address. This will make it easier to find the beginning of the larger memory block. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/tcg-internal.h | 4 ++-- tcg/tcg.c | 58 ++++++++++++++++++++++------------------------ 2 files changed, 30 insertions(+), 32 deletions(-) diff --git a/tcg/tcg-internal.h b/tcg/tcg-internal.h index a9ea27f67a..2c06b5116a 100644 --- a/tcg/tcg-internal.h +++ b/tcg/tcg-internal.h @@ -62,11 +62,11 @@ static inline unsigned tcg_call_flags(TCGOp *op) #if TCG_TARGET_REG_BITS =3D=3D 32 static inline TCGv_i32 TCGV_LOW(TCGv_i64 t) { - return temp_tcgv_i32(tcgv_i64_temp(t)); + return temp_tcgv_i32(tcgv_i64_temp(t) + HOST_BIG_ENDIAN); } static inline TCGv_i32 TCGV_HIGH(TCGv_i64 t) { - return temp_tcgv_i32(tcgv_i64_temp(t) + 1); + return temp_tcgv_i32(tcgv_i64_temp(t) + !HOST_BIG_ENDIAN); } #else extern TCGv_i32 TCGV_LOW(TCGv_i64) QEMU_ERROR("32-bit code path is reachab= le"); diff --git a/tcg/tcg.c b/tcg/tcg.c index 28ab174f1b..c830b3756d 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -887,10 +887,7 @@ TCGTemp *tcg_global_mem_new_internal(TCGType type, TCG= v_ptr base, TCGContext *s =3D tcg_ctx; TCGTemp *base_ts =3D tcgv_ptr_temp(base); TCGTemp *ts =3D tcg_global_alloc(s); - int indirect_reg =3D 0, bigendian =3D 0; -#if HOST_BIG_ENDIAN - bigendian =3D 1; -#endif + int indirect_reg =3D 0; =20 switch (base_ts->kind) { case TEMP_FIXED: @@ -916,7 +913,7 @@ TCGTemp *tcg_global_mem_new_internal(TCGType type, TCGv= _ptr base, ts->indirect_reg =3D indirect_reg; ts->mem_allocated =3D 1; ts->mem_base =3D base_ts; - ts->mem_offset =3D offset + bigendian * 4; + ts->mem_offset =3D offset; pstrcpy(buf, sizeof(buf), name); pstrcat(buf, sizeof(buf), "_0"); ts->name =3D strdup(buf); @@ -927,7 +924,7 @@ TCGTemp *tcg_global_mem_new_internal(TCGType type, TCGv= _ptr base, ts2->indirect_reg =3D indirect_reg; ts2->mem_allocated =3D 1; ts2->mem_base =3D base_ts; - ts2->mem_offset =3D offset + (1 - bigendian) * 4; + ts2->mem_offset =3D offset + 4; ts2->temp_subindex =3D 1; pstrcpy(buf, sizeof(buf), name); pstrcat(buf, sizeof(buf), "_1"); @@ -1073,37 +1070,43 @@ TCGTemp *tcg_constant_internal(TCGType type, int64_= t val) =20 ts =3D g_hash_table_lookup(h, &val); if (ts =3D=3D NULL) { + int64_t *val_ptr; + ts =3D tcg_temp_alloc(s); =20 if (TCG_TARGET_REG_BITS =3D=3D 32 && type =3D=3D TCG_TYPE_I64) { TCGTemp *ts2 =3D tcg_temp_alloc(s); =20 + tcg_debug_assert(ts2 =3D=3D ts + 1); + ts->base_type =3D TCG_TYPE_I64; ts->type =3D TCG_TYPE_I32; ts->kind =3D TEMP_CONST; ts->temp_allocated =3D 1; - /* - * Retain the full value of the 64-bit constant in the low - * part, so that the hash table works. Actual uses will - * truncate the value to the low part. - */ - ts->val =3D val; =20 - tcg_debug_assert(ts2 =3D=3D ts + 1); ts2->base_type =3D TCG_TYPE_I64; ts2->type =3D TCG_TYPE_I32; ts2->kind =3D TEMP_CONST; ts2->temp_allocated =3D 1; ts2->temp_subindex =3D 1; - ts2->val =3D val >> 32; + + /* + * Retain the full value of the 64-bit constant in the low + * part, so that the hash table works. Actual uses will + * truncate the value to the low part. + */ + ts[HOST_BIG_ENDIAN].val =3D val; + ts[!HOST_BIG_ENDIAN].val =3D val >> 32; + val_ptr =3D &ts[HOST_BIG_ENDIAN].val; } else { ts->base_type =3D type; ts->type =3D type; ts->kind =3D TEMP_CONST; ts->temp_allocated =3D 1; ts->val =3D val; + val_ptr =3D &ts->val; } - g_hash_table_insert(h, &ts->val, ts); + g_hash_table_insert(h, val_ptr, ts); } =20 return ts; @@ -1515,13 +1518,8 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int nar= gs, TCGTemp **args) pi =3D 0; if (ret !=3D NULL) { if (TCG_TARGET_REG_BITS < 64 && (typemask & 6) =3D=3D dh_typecode_= i64) { -#if HOST_BIG_ENDIAN - op->args[pi++] =3D temp_arg(ret + 1); - op->args[pi++] =3D temp_arg(ret); -#else op->args[pi++] =3D temp_arg(ret); op->args[pi++] =3D temp_arg(ret + 1); -#endif nb_rets =3D 2; } else { op->args[pi++] =3D temp_arg(ret); @@ -1555,8 +1553,8 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int narg= s, TCGTemp **args) } =20 if (TCG_TARGET_REG_BITS < 64 && is_64bit) { - op->args[pi++] =3D temp_arg(args[i] + HOST_BIG_ENDIAN); - op->args[pi++] =3D temp_arg(args[i] + !HOST_BIG_ENDIAN); + op->args[pi++] =3D temp_arg(args[i]); + op->args[pi++] =3D temp_arg(args[i] + 1); real_args +=3D 2; continue; } @@ -4077,14 +4075,14 @@ static bool tcg_reg_alloc_dup2(TCGContext *s, const= TCGOp *op) } =20 /* If the two inputs form one 64-bit value, try dupm_vec. */ - if (itsl + 1 =3D=3D itsh && itsl->base_type =3D=3D TCG_TYPE_I64) { - temp_sync(s, itsl, s->reserved_regs, 0, 0); - temp_sync(s, itsh, s->reserved_regs, 0, 0); -#if HOST_BIG_ENDIAN - TCGTemp *its =3D itsh; -#else - TCGTemp *its =3D itsl; -#endif + if (itsl->temp_subindex =3D=3D HOST_BIG_ENDIAN && + itsh->temp_subindex =3D=3D !HOST_BIG_ENDIAN && + itsl =3D=3D itsh + (HOST_BIG_ENDIAN ? 1 : -1)) { + TCGTemp *its =3D itsl - HOST_BIG_ENDIAN; + + temp_sync(s, its + 0, s->reserved_regs, 0, 0); + temp_sync(s, its + 1, s->reserved_regs, 0, 0); + if (tcg_out_dupm_vec(s, vtype, MO_64, ots->reg, its->mem_base->reg, its->mem_offset)) { goto done; --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359059; cv=none; d=zohomail.com; s=zohoarc; b=UI7UmhpjpACZ6qJkSXXiO/u51Lyu7BZkzSh52Q+lWlGtOebQgN4VrfJHmeuFtgHFILrYyt7lzLqWq8nEzznp+18blYx45jf4UsdsOG+D/mV4VW5vSt0K7/Ire4/bZjzAwVhOayZww3SLeQxR3ivofAmjGf2XkgLrXmx+jEu1lwI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359059; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=g+8yoDAKtbWcn6kd6zbMcipsZN6xB1eyyko6EmQwVd4=; b=OaYh0QWN1hS4PFQ4R8LCwkF3Uu9rpeyWrxWk4XsIx3WkLG3TP+vLXWJRDm58XCvQlkxFj1idK15to1axwXnFkoB8WFfXkZKMxV0d0iNl8xV3i66Taxrt0T9gPY72cWSyJQiD1ftJany77ZdaLTivPR2JIUXyLFvhd8Wcj1YNdCw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672359059141621.9605417381907; Thu, 29 Dec 2022 16:10:59 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2sC-0003LV-GY; Thu, 29 Dec 2022 19:03:47 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2rX-00039N-2y for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:03:05 -0500 Received: from mail-pl1-x629.google.com ([2607:f8b0:4864:20::629]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2rR-0002fG-UG for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:03:00 -0500 Received: by mail-pl1-x629.google.com with SMTP id g16so10694960plq.12 for ; Thu, 29 Dec 2022 16:02:47 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=g+8yoDAKtbWcn6kd6zbMcipsZN6xB1eyyko6EmQwVd4=; b=WOoRfVyQTjqZkMg1T8esrWnGgkOt0/+1E+Xu0U1kHFE9wHeg3BdOX1wTPbIhIJsFGh dcdPGjuWso3NfICWkuHxcKooRcdmDGIk+30SrKLpdxW4bpN1OVeHzwSVJ2Lj3ZOBmfOD pfqzKXdMVpyB9GCMMAyebYaFK0bihjOxjdKIa0OoB7EtsWx969K9/STFQAu5CUx8wgzP jZ689PuMj2DyWh6JSsaWgi9ZzX51AHq/bLXwGek1w2R39YUSie516/W3C2FR9Z1rLCeA B4wVDGQZN/dJTB3nZpclgLCYUSN1yDyXtJlngM0W4XxOfUbgRSLbTaGExQs9KSiKRzLh 6rEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=g+8yoDAKtbWcn6kd6zbMcipsZN6xB1eyyko6EmQwVd4=; b=4i2NE4dxgZhz6IA+lx/MveiMdNkxE5aKRg/SoBxEY5wfBhBPBF5JGRzQK2s9aVpQMp z0OKx2fsWefmcqERfEzw+Aeq1eQwEwZ2Z+T+3jZgKueMiWs0l0LIfON6aOJVPoR92EXw CI/TVVe30QpZF48pq4zAwtyYA3q+duFCyvSmS3gLfHOzNOhSbJml4VU2+lPd/r2hYe7C pB7VXKz35ymNgjk6imXQBCmNvMMqUPnRM1HsMVHkulSffpzE9zAeIvuSxtU+reaplSaI +/cg9R93v4Yf7F3/jSWhUXFXQplXc0elxDxPswqE5fbzOO7rqckuVMh65Tx+KE3dMW+x pOTA== X-Gm-Message-State: AFqh2kr52FGjJLzR6nYUggoUeIWPM9JtIvGG9J36zyikPJtZDzkf434f 4lWnWdvTbSvF3D/dLapyC5BefzwhfFZG1Tcd X-Google-Smtp-Source: AMrXdXsuZTAHKLxoS73NTYDi/rZLbTm3da7w/DDEOLCUliltizAqqTiZG6RVPA/2dwqVR4cs1ojpTw== X-Received: by 2002:a17:902:f786:b0:192:9d79:d3d6 with SMTP id q6-20020a170902f78600b001929d79d3d6mr6293450pln.69.1672358566868; Thu, 29 Dec 2022 16:02:46 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 26/47] tcg: Move TCG_TYPE_COUNT outside enum Date: Thu, 29 Dec 2022 16:02:00 -0800 Message-Id: <20221230000221.2764875-27-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359060816000002 The count is not itself an enumerator. Move it outside to prevent the compiler from considering it with -Wswitch-enum. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index afa18986b1..f2da340bb9 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -294,7 +294,8 @@ typedef enum TCGType { TCG_TYPE_V128, TCG_TYPE_V256, =20 - TCG_TYPE_COUNT, /* number of different types */ + /* Number of different types (integer not enum) */ +#define TCG_TYPE_COUNT (TCG_TYPE_V256 + 1) =20 /* An alias for the size of the host register. */ #if TCG_TARGET_REG_BITS =3D=3D 32 --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359404; cv=none; d=zohomail.com; s=zohoarc; b=Xekz10/VcZ89Nvm3gb0iR23ONR9GK7sclOoayS4BiPkqE54KIzqoh+CsSZAiHX3tOdWydmDYS+PM0m2BO0Cy9HvwdpEOH/NzMTqpnQck8a9bKM0aR5EcTy1WjsLnZ2gOs8bBcqC+vV1zsCPY+PS707ub/s/kp0qDqwIhMhPIyCk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359404; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=2o2XDAJHkByCPpkF/Lmz5Vj1kOnPZRYyLt/A96h6Ftc=; b=EGPpROT4PJA+Ic4haQnByrnmD3wYresYxHxUcB7Mk6+kGK1CU3Unw1XyzfJtpw7FJKn7U5j5jggcru2tCPivfWQtZlIDrzp2Lg1Kgf6t0MedOLhcyvMgaKHpkItxxVd+QH6XZmgQWZHLKdFxC52LFgZrJVgyLXQzFsDDuUy9aiE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672359404834846.4381172830683; Thu, 29 Dec 2022 16:16:44 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2sI-0003jp-82; Thu, 29 Dec 2022 19:03:52 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2rY-00039U-7d for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:03:05 -0500 Received: from mail-pl1-x632.google.com ([2607:f8b0:4864:20::632]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2rS-0002jX-6h for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:03:03 -0500 Received: by mail-pl1-x632.google.com with SMTP id s7so20361635plk.5 for ; Thu, 29 Dec 2022 16:02:48 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2o2XDAJHkByCPpkF/Lmz5Vj1kOnPZRYyLt/A96h6Ftc=; b=WOzC4oBUrSOpQ5ZnNDi1URQ60QzwVqDv/isINYLe1QLIx2UutNdUC1y+EGYkSfeUQK 9joChL8Qpv5fvsa9oVpA1TBjqI5Pkc+1l+cNXkkb6cNUqxjeOVVgXABMMo30C7q4ERyL JTjkeOcBdVOpKZhtnV91zw8HkusgFj0zqNWml42vTnlfv2yCaq4Gmz80e6hgrJtbyidH qgq+zoQdtkwChn+8iwQoChAjdGFYHQbjuj19n86S5PZfDGfRyw9SBehWz9RKwnp8dzSE isSH5FJCZEGuA3glS7Kyxiil0Itb4j9TqpbaG5bvR2Tii2yWSlCWgxxeezVCowcyZOyS yi0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2o2XDAJHkByCPpkF/Lmz5Vj1kOnPZRYyLt/A96h6Ftc=; b=1XGyga2eDwm7YBV/+/UCw3CJ1GLPrQjjNaC63yE1+v4CJ4I6DIhB8lIo092zSK0sbh cLNlSidfgQJhpQBlQ424CEsKBEBjDza1r3Z2CwCsQmGmIIPPTOJUmJys9vByDQgeXDrS iM6RI1H0KWM/vM6NbwO5ZM7LgaZ0aSuUMS0OnQx96rsXh1GjLnMspUi+P38Dr27BDWbV 6w8avgj9uYbLyLyXz2j7UIyYtpnAsqCwp/B1M5m1Ja2adX8Nv7my2wNsVbSsnUNWqQIR 7rFZATyEOsqQexntLWt0EGn5eqhWdVyO+7/x6gHA0IPH6nlexkCyY3h3VxhUhl9TqNS1 Zg7w== X-Gm-Message-State: AFqh2kpUIW6cn2G62w0chZhGBokZ3STxiIU6MLt+72fJNhyu/UglwiOo 5SuYxmuGW3G8zvJKPPIpth09idXdKlA+Aq29 X-Google-Smtp-Source: AMrXdXv5hGHx04rOx61qaE99Y5ZDmEN6qF8GU0wz3Za2r+0zct+/mPAcrUbhtQvxgtTnA/v1k21LUA== X-Received: by 2002:a17:902:eb8a:b0:192:9dc5:54b6 with SMTP id q10-20020a170902eb8a00b001929dc554b6mr5371327plg.48.1672358567831; Thu, 29 Dec 2022 16:02:47 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 27/47] tcg: Introduce tcg_type_size Date: Thu, 29 Dec 2022 16:02:01 -0800 Message-Id: <20221230000221.2764875-28-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359405767000001 Add a helper function for computing the size of a type. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 16 ++++++++++++++++ tcg/tcg.c | 27 ++++++++++++--------------- 2 files changed, 28 insertions(+), 15 deletions(-) diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index f2da340bb9..8bcd60d0ed 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -319,6 +319,22 @@ typedef enum TCGType { #endif } TCGType; =20 +/** + * tcg_type_size + * @t: type + * + * Return the size of the type in bytes. + */ +static inline int tcg_type_size(TCGType t) +{ + unsigned i =3D t; + if (i >=3D TCG_TYPE_V64) { + tcg_debug_assert(i < TCG_TYPE_COUNT); + i -=3D TCG_TYPE_V64 - 1; + } + return 4 << i; +} + /** * get_alignment_bits * @memop: MemOp value diff --git a/tcg/tcg.c b/tcg/tcg.c index c830b3756d..02b2103daf 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -3038,22 +3038,22 @@ static bool liveness_pass_2(TCGContext *s) =20 static void temp_allocate_frame(TCGContext *s, TCGTemp *ts) { - intptr_t off, size, align; + int size =3D tcg_type_size(ts->type); + int align; + intptr_t off; =20 switch (ts->type) { case TCG_TYPE_I32: - size =3D align =3D 4; + align =3D 4; break; case TCG_TYPE_I64: case TCG_TYPE_V64: - size =3D align =3D 8; + align =3D 8; break; case TCG_TYPE_V128: - size =3D align =3D 16; - break; case TCG_TYPE_V256: /* Note that we do not require aligned storage for V256. */ - size =3D 32, align =3D 16; + align =3D 16; break; default: g_assert_not_reached(); @@ -3593,8 +3593,8 @@ static void tcg_reg_alloc_dup(TCGContext *s, const TC= GOp *op) TCGRegSet dup_out_regs, dup_in_regs; TCGTemp *its, *ots; TCGType itype, vtype; - intptr_t endian_fixup; unsigned vece; + int lowpart_ofs; bool ok; =20 ots =3D arg_temp(op->args[0]); @@ -3662,15 +3662,12 @@ static void tcg_reg_alloc_dup(TCGContext *s, const = TCGOp *op) /* fall through */ =20 case TEMP_VAL_MEM: -#if HOST_BIG_ENDIAN - endian_fixup =3D itype =3D=3D TCG_TYPE_I32 ? 4 : 8; - endian_fixup -=3D 1 << vece; -#else - endian_fixup =3D 0; -#endif - /* Attempt to dup directly from the input memory slot. */ + lowpart_ofs =3D 0; + if (HOST_BIG_ENDIAN) { + lowpart_ofs =3D tcg_type_size(itype) - (1 << vece); + } if (tcg_out_dupm_vec(s, vtype, vece, ots->reg, its->mem_base->reg, - its->mem_offset + endian_fixup)) { + its->mem_offset + lowpart_ofs)) { goto done; } /* Load the input into the destination vector register. */ --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359838; cv=none; d=zohomail.com; s=zohoarc; b=kk+2JQtXq3zE/PCfVcy9NMhE6DRGYOwFuo4PNoSdMqAZEpdgioJBKcJMB1ck3wIj4CeoIAyybg2qLBQsXy2C0aj973qLC4LWYHB9H+ZWB+uCgRrIp3M81MYX5Mpw+sZOaigXuE7b2EYX//MKk+KXOfPm76gaGHjF4e0+MpEyjXI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359838; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=tz8pxyjZBQm1+qEjyv1TGYW3iZ6MjviUhbwrA5+bw+s=; b=PZ+XxIqXHfyuviMlMQqTYk/z986MzI1EKNbdudlXZzQ3Svyi9OUNqOlPQ/SZ4G9TIUROI9G7Dk3bQAVf46p+GgRPSf4FXXsWvBPJ1a2S41fI/jWNxrlnx2UAAlQwtbzhw7U+solc5g96XpNmhTR34HazbOcQ8pG6T1zH4XpfyPg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672359838340689.3190557459717; Thu, 29 Dec 2022 16:23:58 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2sP-0003uT-Nb; Thu, 29 Dec 2022 19:03:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2rU-00039C-Gz for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:03:05 -0500 Received: from mail-pl1-x62d.google.com ([2607:f8b0:4864:20::62d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2rQ-0002hC-75 for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:02:59 -0500 Received: by mail-pl1-x62d.google.com with SMTP id m4so20371210pls.4 for ; Thu, 29 Dec 2022 16:02:49 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tz8pxyjZBQm1+qEjyv1TGYW3iZ6MjviUhbwrA5+bw+s=; b=jtjyBhhYno77HM+F5eUBjZ1SuFTej2CgJ2OxswNr/q3OM0VwdYq6OViQLsSvh5Sxoy xCUHZHUDQ6d69Cqi4ob4aM6qoLtXQeuKZD/mxuVtcBwmK13u4OYalfXQKZTbY4Y34+jF bwFbBC30kj+Wowrz4EdS2HXBj2JdH2GXi7DSo3/EJX509If63sRObPREkImSaKfVj2Jf 0sLQsQg4FA9vECcG8xcEvsax0+zNtL4OMU6ejn5EG1O9CvZ/RoRZJCwYerpII9EQ8sxt TVgvQIESgHAYi/LPy+ylbgwQf5pyYgiLSw+bOpXK38QVkwNtPf//bLh17150hnpf3ML7 bpWw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tz8pxyjZBQm1+qEjyv1TGYW3iZ6MjviUhbwrA5+bw+s=; b=bwdgdapTQAWwenu/3mCfQPQYNKKFHnq/Dl5dm20w3h4gOW2wtYjmOtUPSZvhAQkBrD Iq5Ke6udLy9y7N8Wp07yJjRku4a2UrQC7eSu/UWs6dKK5hjq/8Xyvii2Zeux2+g76zYc 4IETnz76pIVHRaN4Xkng5VnPyVrPKy/BuvTHsggemqkSnqeT5Xc4+PgECslsUYaj5NV7 JeV+X7KNsQzz5nXd072dgWpKJUxJGshuTvIGBwNuuLPoDqvKiewGJku12DP2WQf81FU7 jlZHp7cndql6hiH0CgdcZuzsWtJgMzZa3Jg2M3j3PN5ZrzGvdMH1QpQIAFv+mK4EKiUk Pzcg== X-Gm-Message-State: AFqh2krIrXWMHbDkSnI9ROeX3ix9aG0xHNelwlrrfBAANigWDLAkekMx tMCIFB9mDGxd6MffnlxofBWG/TjKc7SsLwpE X-Google-Smtp-Source: AMrXdXs5MsB2H+uAcUraUcyKRA88soZtNM9EHYFysw1bXfc4DjFMF3AFqXTmw/JnynW/SnworiwBNw== X-Received: by 2002:a17:902:7805:b0:191:bb:c207 with SMTP id p5-20020a170902780500b0019100bbc207mr29946525pll.37.1672358568802; Thu, 29 Dec 2022 16:02:48 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 28/47] tcg: Introduce TCGCallReturnKind and TCGCallArgumentKind Date: Thu, 29 Dec 2022 16:02:02 -0800 Message-Id: <20221230000221.2764875-29-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359839396000001 Prepare to replace a bunch of separate ifdefs with a consistent way to describe the ABI of a function call. Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/tcg-internal.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/tcg/tcg-internal.h b/tcg/tcg-internal.h index 2c06b5116a..f574743ff8 100644 --- a/tcg/tcg-internal.h +++ b/tcg/tcg-internal.h @@ -27,6 +27,21 @@ =20 #define TCG_HIGHWATER 1024 =20 +/* + * Describe the calling convention of a given argument type. + */ +typedef enum { + TCG_CALL_RET_NORMAL, /* by registers */ +} TCGCallReturnKind; + +typedef enum { + TCG_CALL_ARG_NORMAL, /* by registers (continuing onto stack) */ + TCG_CALL_ARG_EVEN, /* like normal, but skipping odd slots */ + TCG_CALL_ARG_EXTEND, /* for i32, as a sign/zero-extended i64 */ + TCG_CALL_ARG_EXTEND_U, /* ... as a zero-extended i64 */ + TCG_CALL_ARG_EXTEND_S, /* ... as a sign-extended i64 */ +} TCGCallArgumentKind; + typedef struct TCGHelperInfo { void *func; const char *name; --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359807; cv=none; d=zohomail.com; s=zohoarc; b=Fmd+0GfwUSCLpQoPljeigYSEk4/VdpCtd9CVxxlwE29hlx5Vjmmlq8zvd9xHTGLTTGf84UvfWFeTMZv/BC8jHfJpVVMTC28bUmnIGcRTd6JfEiPxfuILYf74Qm5R6nuzj5dmjLPz86r0G9LcqybMN7vPnBN5blxiozARUd726eE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359807; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=9zIJdev9f6FqNrYV6nh9URYnonADnNgl0AKCoCziF+c=; b=i+pEaQ31nh1viEa3pOfBYl0fWTTvPm3e+Burp5W2ymEE45PN82rlVE0vy44Q+mPdwSdU0oS9ynFWveuBKNneL5qtprtL79DYTjVBq5qbwGpyjNHn7XucWwxmtNujEHejiyEYN3bo1jPyjjvkmDzHwI2Lir43mkV/Bnf3VccgQfU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672359807479311.3331414012964; Thu, 29 Dec 2022 16:23:27 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2sM-0003of-1b; Thu, 29 Dec 2022 19:03:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2rW-00039F-Us for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:03:05 -0500 Received: from mail-pj1-x1030.google.com ([2607:f8b0:4864:20::1030]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2rQ-0002jd-7G for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:03:00 -0500 Received: by mail-pj1-x1030.google.com with SMTP id ge16so17131479pjb.5 for ; Thu, 29 Dec 2022 16:02:50 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9zIJdev9f6FqNrYV6nh9URYnonADnNgl0AKCoCziF+c=; b=IXf3xApUCcIj7OFpCd39io3RX1q+6/ydzTFZJR6RwDH+Ir+eW4UCMIXLidcLCk5hMx PqhNK71HvyvKeFvqm9aheVUC24M3YYXgMrkhMFF2Um8jlr5Bf2i554a9cafgK9VNsA5b kpZjFzCM+47pKA0p6ZAFiBS0Q20AXi/MuEPMUhdrAUxnN+DXJ4IDkr2Pc9tyiZJl+3kF EemrNOZW6RwmhAZvDFnCba8/1MiMGbvVmGZB/3nMmiHPeAMsbwjYMJoCoCDwTMOaOtLm ov36xdNMPSEYOTR75hGeA643ANL+inc3A4/A3EH85uXrSTE1ZBPVE75ztoftaFG6kpCI Tj1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9zIJdev9f6FqNrYV6nh9URYnonADnNgl0AKCoCziF+c=; b=7Nrr8X1YFmWeSOVuLx+iSHXSq347Pxo6im5KiqMAsCP+5h8rWTAii4qbAseCWU8dM1 eylPcYzTk/4N0tMvHfrfZU8tDhC7yuze63XxvkY7U54M2wVd3OX/rZDUrdzWWCXpxsi8 BV5adjAif+gh4kDj57NhuwgifzgvI6iWY17M0uX8aCxhuQYNPSKp7lxJaHyqpne2E6Pw hXeYUAmg6DSQStXQ6cQYMbciePPyCCqDSmJla3bSCdkYpv040wrz/1LrKanh9vckdrdJ AsuRX0kOBxfkhUZi7dQjnCwL8LvjCvmJ1k6sEzHxVIOvvcRDaO3ElQW+iS9ZsYPq5rsa 8wNQ== X-Gm-Message-State: AFqh2kplQlWCdm7DOUJAv5WlmENpcYBcYTzsK7Qc3O6nE8JhibNxqGzE pNXWQmgAqc9dsRCBZoLvrnNFaEyEJgGMmD4n X-Google-Smtp-Source: AMrXdXuci454aNR/yfFaa/9/NSMR0hxOf+M0/MD2DHcTe1oEHAsb/jHeOY0CmFAb812vxlai5Vj98g== X-Received: by 2002:a17:902:b493:b0:191:1fbf:cd4b with SMTP id y19-20020a170902b49300b001911fbfcd4bmr29047327plr.38.1672358569722; Thu, 29 Dec 2022 16:02:49 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 29/47] tcg: Replace TCG_TARGET_CALL_ALIGN_ARGS with TCG_TARGET_CALL_ARG_I64 Date: Thu, 29 Dec 2022 16:02:03 -0800 Message-Id: <20221230000221.2764875-30-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1030.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359809337000003 For 32-bit hosts when TCG_TARGET_CALL_ALIGN_ARGS was set, use TCG_CALL_ARG_EVEN. For 64-bit hosts, TCG_TARGET_CALL_ALIGN_ARGS was silently ignored, so always use TCG_CALL_ARG_NORMAL. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.h | 2 +- tcg/arm/tcg-target.h | 2 +- tcg/i386/tcg-target.h | 1 + tcg/loongarch64/tcg-target.h | 2 +- tcg/mips/tcg-target.h | 3 ++- tcg/riscv/tcg-target.h | 6 +++++- tcg/s390x/tcg-target.h | 1 + tcg/sparc64/tcg-target.h | 1 + tcg/tci/tcg-target.h | 5 +++++ tcg/tcg.c | 6 ++++-- tcg/ppc/tcg-target.c.inc | 21 ++++++++------------- 11 files changed, 30 insertions(+), 20 deletions(-) diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h index e145d50fef..d9dd777caa 100644 --- a/tcg/aarch64/tcg-target.h +++ b/tcg/aarch64/tcg-target.h @@ -51,8 +51,8 @@ typedef enum { /* used for function call generation */ #define TCG_REG_CALL_STACK TCG_REG_SP #define TCG_TARGET_STACK_ALIGN 16 -#define TCG_TARGET_CALL_ALIGN_ARGS 1 #define TCG_TARGET_CALL_STACK_OFFSET 0 +#define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL =20 /* optional instructions */ #define TCG_TARGET_HAS_div_i32 1 diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index 56c1ac4586..09dd0550aa 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -88,8 +88,8 @@ extern bool use_neon_instructions; =20 /* used for function call generation */ #define TCG_TARGET_STACK_ALIGN 8 -#define TCG_TARGET_CALL_ALIGN_ARGS 1 #define TCG_TARGET_CALL_STACK_OFFSET 0 +#define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_EVEN =20 /* optional instructions */ #define TCG_TARGET_HAS_ext8s_i32 1 diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index 00fcbe297d..42628a2791 100644 --- a/tcg/i386/tcg-target.h +++ b/tcg/i386/tcg-target.h @@ -98,6 +98,7 @@ typedef enum { #else #define TCG_TARGET_CALL_STACK_OFFSET 0 #endif +#define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL =20 extern bool have_bmi1; extern bool have_popcnt; diff --git a/tcg/loongarch64/tcg-target.h b/tcg/loongarch64/tcg-target.h index a659c8d6fd..19d4c07170 100644 --- a/tcg/loongarch64/tcg-target.h +++ b/tcg/loongarch64/tcg-target.h @@ -92,8 +92,8 @@ typedef enum { /* used for function call generation */ #define TCG_REG_CALL_STACK TCG_REG_SP #define TCG_TARGET_STACK_ALIGN 16 -#define TCG_TARGET_CALL_ALIGN_ARGS 1 #define TCG_TARGET_CALL_STACK_OFFSET 0 +#define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL =20 /* optional instructions */ #define TCG_TARGET_HAS_movcond_i32 0 diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index 7669213175..bb7312aed4 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -83,10 +83,11 @@ typedef enum { #define TCG_TARGET_STACK_ALIGN 16 #if _MIPS_SIM =3D=3D _ABIO32 # define TCG_TARGET_CALL_STACK_OFFSET 16 +# define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_EVEN #else # define TCG_TARGET_CALL_STACK_OFFSET 0 +# define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL #endif -#define TCG_TARGET_CALL_ALIGN_ARGS 1 =20 /* MOVN/MOVZ instructions detection */ #if (defined(__mips_isa_rev) && (__mips_isa_rev >=3D 1)) || \ diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h index 11c9b3e4f4..2ab4b8d04a 100644 --- a/tcg/riscv/tcg-target.h +++ b/tcg/riscv/tcg-target.h @@ -81,8 +81,12 @@ typedef enum { /* used for function call generation */ #define TCG_REG_CALL_STACK TCG_REG_SP #define TCG_TARGET_STACK_ALIGN 16 -#define TCG_TARGET_CALL_ALIGN_ARGS 1 #define TCG_TARGET_CALL_STACK_OFFSET 0 +#if TCG_TARGET_REG_BITS =3D=3D 32 +#define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_EVEN +#else +#define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL +#endif =20 /* optional instructions */ #define TCG_TARGET_HAS_movcond_i32 0 diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h index 23e2063667..3f77fcf5b3 100644 --- a/tcg/s390x/tcg-target.h +++ b/tcg/s390x/tcg-target.h @@ -166,6 +166,7 @@ extern uint64_t s390_facilities[3]; /* used for function call generation */ #define TCG_TARGET_STACK_ALIGN 8 #define TCG_TARGET_CALL_STACK_OFFSET 160 +#define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL =20 #define TCG_TARGET_EXTEND_ARGS 1 #define TCG_TARGET_HAS_MEMORY_BSWAP 1 diff --git a/tcg/sparc64/tcg-target.h b/tcg/sparc64/tcg-target.h index 8655acdbe5..44ac164b31 100644 --- a/tcg/sparc64/tcg-target.h +++ b/tcg/sparc64/tcg-target.h @@ -72,6 +72,7 @@ typedef enum { #define TCG_TARGET_STACK_ALIGN 16 #define TCG_TARGET_CALL_STACK_OFFSET (128 + 6*8 + TCG_TARGET_STACK_BIAS) #define TCG_TARGET_EXTEND_ARGS 1 +#define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL =20 #if defined(__VIS__) && __VIS__ >=3D 0x300 #define use_vis3_instructions 1 diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index ceb36c4f7a..e11c293906 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -158,6 +158,11 @@ typedef enum { /* Used for function call generation. */ #define TCG_TARGET_CALL_STACK_OFFSET 0 #define TCG_TARGET_STACK_ALIGN 8 +#if TCG_TARGET_REG_BITS =3D=3D 32 +# define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_EVEN +#else +# define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL +#endif =20 #define HAVE_TCG_QEMU_TB_EXEC #define TCG_TARGET_NEED_POOL_LABELS diff --git a/tcg/tcg.c b/tcg/tcg.c index 02b2103daf..e4a6689bda 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1542,9 +1542,11 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int nar= gs, TCGTemp **args) * for passing off to ffi_call. */ want_align =3D true; -#elif defined(TCG_TARGET_CALL_ALIGN_ARGS) +#else /* Some targets want aligned 64 bit args */ - want_align =3D is_64bit; + if (is_64bit) { + want_align =3D TCG_TARGET_CALL_ARG_I64 =3D=3D TCG_CALL_ARG_EVE= N; + } #endif =20 if (TCG_TARGET_REG_BITS < 64 && want_align && (real_args & 1)) { diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index 9e34df94ba..c2e6bc3296 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -45,7 +45,9 @@ #endif =20 #ifdef _CALL_SYSV -# define TCG_TARGET_CALL_ALIGN_ARGS 1 +# define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_EVEN +#else +# define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL #endif =20 /* For some memory operations, we need a scratch that isn't R0. For the A= IX @@ -2202,9 +2204,7 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, = TCGLabelQemuLdst *lb) lo =3D lb->addrlo_reg; hi =3D lb->addrhi_reg; if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) { -#ifdef TCG_TARGET_CALL_ALIGN_ARGS - arg |=3D 1; -#endif + arg |=3D (TCG_TARGET_CALL_ARG_I64 =3D=3D TCG_CALL_ARG_EVEN); tcg_out_mov(s, TCG_TYPE_I32, arg++, hi); tcg_out_mov(s, TCG_TYPE_I32, arg++, lo); } else { @@ -2250,9 +2250,7 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s, = TCGLabelQemuLdst *lb) lo =3D lb->addrlo_reg; hi =3D lb->addrhi_reg; if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) { -#ifdef TCG_TARGET_CALL_ALIGN_ARGS - arg |=3D 1; -#endif + arg |=3D (TCG_TARGET_CALL_ARG_I64 =3D=3D TCG_CALL_ARG_EVEN); tcg_out_mov(s, TCG_TYPE_I32, arg++, hi); tcg_out_mov(s, TCG_TYPE_I32, arg++, lo); } else { @@ -2266,9 +2264,7 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s, = TCGLabelQemuLdst *lb) if (TCG_TARGET_REG_BITS =3D=3D 32) { switch (s_bits) { case MO_64: -#ifdef TCG_TARGET_CALL_ALIGN_ARGS - arg |=3D 1; -#endif + arg |=3D (TCG_TARGET_CALL_ARG_I64 =3D=3D TCG_CALL_ARG_EVEN); tcg_out_mov(s, TCG_TYPE_I32, arg++, hi); /* FALLTHRU */ case MO_32: @@ -2324,9 +2320,8 @@ static bool tcg_out_fail_alignment(TCGContext *s, TCG= LabelQemuLdst *l) =20 if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) { TCGReg arg =3D TCG_REG_R4; -#ifdef TCG_TARGET_CALL_ALIGN_ARGS - arg |=3D 1; -#endif + + arg |=3D (TCG_TARGET_CALL_ARG_I64 =3D=3D TCG_CALL_ARG_EVEN); if (l->addrlo_reg !=3D arg) { tcg_out_mov(s, TCG_TYPE_I32, arg, l->addrhi_reg); tcg_out_mov(s, TCG_TYPE_I32, arg + 1, l->addrlo_reg); --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359428; cv=none; d=zohomail.com; s=zohoarc; b=g8iv54V6r3S2O5UkKKJy2fPOmJFY49n+2Gfz/fM3rrtWNkdh7SkoAXol2AdXi4oaVAtdcymy4sAKOwJ/crqLWBgoTrIN+M1eYJFje4yuoGgpODhoUxWBVObOQ6q3D0S1xXKjUsJ1gG761aE4abvNrfPqIdB0KC4OU+zh2McJTss= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359428; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=3Z89sqy4upNeQoaRu7pc/5DI6tSXc04xQiTqbrm+8q4=; b=lfr4IZquV4swZbyJRzH7Da3B/5eiNTwwS1KUSK2/FPsDqgqYPHsOQVYGeTEaS/b9nP3MALPxKCnFJzFf1BpDxYo+kSfwB4upZ/ZvIXCEiZVcMYgAN/WN2o4858eZOUT0IyXYmy9rOFSJXyiZb7YM69/meoh50ptVWQ1+CMQNKuE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672359428049316.8504947258439; Thu, 29 Dec 2022 16:17:08 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2sT-0003yb-Sm; Thu, 29 Dec 2022 19:04:01 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2rX-00039I-15 for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:03:05 -0500 Received: from mail-pl1-x62a.google.com ([2607:f8b0:4864:20::62a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2rR-0002jh-Tq for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:03:02 -0500 Received: by mail-pl1-x62a.google.com with SMTP id s7so20361707plk.5 for ; Thu, 29 Dec 2022 16:02:51 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3Z89sqy4upNeQoaRu7pc/5DI6tSXc04xQiTqbrm+8q4=; b=xJdexMuUJw1P8zocKYM67aEHGBEqoTj6XrPz5MNVQY89UibHWN1KiHOF8mnwT2uff3 jyxkd5GCyzK27g9AbfBnJ5IvqG/fqhCPQFV/M8zN4IBzBPOxMXEYt7PPx9hVuEvW8Xgq fGbNqkiSNx7c5JOtPfddBsibvoyP6J4LSjggliYeFjP5IfhdBwbWf0R7I2RkVKlhqdr/ whZhbQ7UnJXaoj4pGwTtzqwZ1TN1M39R3GyRtL5GnNWg5pQy2bUqVmn97sixmcMSqWTm alODPkqSp8IrJINyhkqyrVEyIe0DwfS3MHVKywtA0bYgmNTm9ST7GtwKuna/2GPDr2EV Cblg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3Z89sqy4upNeQoaRu7pc/5DI6tSXc04xQiTqbrm+8q4=; b=7jAU4I+SHIaPOsmgl1L/N0An4oLDNCAANk0Ib9JBDLRXGuQzF28W3fcokEuKOsITgz d/4tWm0yhB3hto9R3xY3p/lCDC/cnt9aFjfwvZlmKPNzhpb1QHSxqhqiIBx4OvD/Nw3j 2hgGQgDVq9ZbCHPDhsqtmy7qVjrkzcvoeWyzGy23eFPH5w0sjZV5j+anThV+zOxpdp8s WHL8pm2KYIe3xo2QDwuFAEY1RroN0HleK9atu1seJLxZlB+N8HatMiMRyyEXciQMaTRl Q0Utnxrkh0oqrCMhOOhcYmWiMFPYbOj1bk6PhhrJMSfz0b9tXvU/oUtn2EvTls0hdYt/ S7Bg== X-Gm-Message-State: AFqh2konNLmCNtivrTeZ8oxUrykYLfTPVDQItOKpG4f16o0Ay0iTh5GK 9gpAU2Dls7fJUWwzSpNoRpapjP5mw9zGvZtw X-Google-Smtp-Source: AMrXdXvvo+7T0UnP8Hc7hE84d3lBa06hCWXiwYhb/qOf/Ev03pgABptIKrXceQdaCUNu0ASTQDzCAA== X-Received: by 2002:a17:902:e951:b0:192:7845:e0cc with SMTP id b17-20020a170902e95100b001927845e0ccmr18236292pll.68.1672358570497; Thu, 29 Dec 2022 16:02:50 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 30/47] tcg: Replace TCG_TARGET_EXTEND_ARGS with TCG_TARGET_CALL_ARG_I32 Date: Thu, 29 Dec 2022 16:02:04 -0800 Message-Id: <20221230000221.2764875-31-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359429894000003 For 64-bit hosts that had TCG_TARGET_EXTEND_ARGS, set TCG_TARGET_CALL_ARG_I32 to TCG_CALL_ARG_EXTEND. Otherwise, use TCG_CALL_ARG_NORMAL. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.h | 1 + tcg/arm/tcg-target.h | 1 + tcg/i386/tcg-target.h | 1 + tcg/loongarch64/tcg-target.h | 1 + tcg/mips/tcg-target.h | 1 + tcg/riscv/tcg-target.h | 1 + tcg/s390x/tcg-target.h | 2 +- tcg/sparc64/tcg-target.h | 2 +- tcg/tci/tcg-target.h | 1 + tcg/tcg.c | 42 ++++++++++++++++++------------------ tcg/ppc/tcg-target.c.inc | 6 +++++- 11 files changed, 35 insertions(+), 24 deletions(-) diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h index d9dd777caa..413a5410c5 100644 --- a/tcg/aarch64/tcg-target.h +++ b/tcg/aarch64/tcg-target.h @@ -52,6 +52,7 @@ typedef enum { #define TCG_REG_CALL_STACK TCG_REG_SP #define TCG_TARGET_STACK_ALIGN 16 #define TCG_TARGET_CALL_STACK_OFFSET 0 +#define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL =20 /* optional instructions */ diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index 09dd0550aa..b7843d2d54 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -89,6 +89,7 @@ extern bool use_neon_instructions; /* used for function call generation */ #define TCG_TARGET_STACK_ALIGN 8 #define TCG_TARGET_CALL_STACK_OFFSET 0 +#define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_EVEN =20 /* optional instructions */ diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index 42628a2791..7edb7f1d9a 100644 --- a/tcg/i386/tcg-target.h +++ b/tcg/i386/tcg-target.h @@ -98,6 +98,7 @@ typedef enum { #else #define TCG_TARGET_CALL_STACK_OFFSET 0 #endif +#define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL =20 extern bool have_bmi1; diff --git a/tcg/loongarch64/tcg-target.h b/tcg/loongarch64/tcg-target.h index 19d4c07170..e5f7a1f09d 100644 --- a/tcg/loongarch64/tcg-target.h +++ b/tcg/loongarch64/tcg-target.h @@ -93,6 +93,7 @@ typedef enum { #define TCG_REG_CALL_STACK TCG_REG_SP #define TCG_TARGET_STACK_ALIGN 16 #define TCG_TARGET_CALL_STACK_OFFSET 0 +#define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL =20 /* optional instructions */ diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index bb7312aed4..15721c3e42 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -88,6 +88,7 @@ typedef enum { # define TCG_TARGET_CALL_STACK_OFFSET 0 # define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL #endif +#define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL =20 /* MOVN/MOVZ instructions detection */ #if (defined(__mips_isa_rev) && (__mips_isa_rev >=3D 1)) || \ diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h index 2ab4b8d04a..232537ccea 100644 --- a/tcg/riscv/tcg-target.h +++ b/tcg/riscv/tcg-target.h @@ -82,6 +82,7 @@ typedef enum { #define TCG_REG_CALL_STACK TCG_REG_SP #define TCG_TARGET_STACK_ALIGN 16 #define TCG_TARGET_CALL_STACK_OFFSET 0 +#define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL #if TCG_TARGET_REG_BITS =3D=3D 32 #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_EVEN #else diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h index 3f77fcf5b3..22d70d431b 100644 --- a/tcg/s390x/tcg-target.h +++ b/tcg/s390x/tcg-target.h @@ -166,9 +166,9 @@ extern uint64_t s390_facilities[3]; /* used for function call generation */ #define TCG_TARGET_STACK_ALIGN 8 #define TCG_TARGET_CALL_STACK_OFFSET 160 +#define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_EXTEND #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL =20 -#define TCG_TARGET_EXTEND_ARGS 1 #define TCG_TARGET_HAS_MEMORY_BSWAP 1 =20 #define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) diff --git a/tcg/sparc64/tcg-target.h b/tcg/sparc64/tcg-target.h index 44ac164b31..0044ac8d78 100644 --- a/tcg/sparc64/tcg-target.h +++ b/tcg/sparc64/tcg-target.h @@ -71,7 +71,7 @@ typedef enum { #define TCG_TARGET_STACK_BIAS 2047 #define TCG_TARGET_STACK_ALIGN 16 #define TCG_TARGET_CALL_STACK_OFFSET (128 + 6*8 + TCG_TARGET_STACK_BIAS) -#define TCG_TARGET_EXTEND_ARGS 1 +#define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_EXTEND #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL =20 #if defined(__VIS__) && __VIS__ >=3D 0x300 diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index e11c293906..d6e0450ed8 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -158,6 +158,7 @@ typedef enum { /* Used for function call generation. */ #define TCG_TARGET_CALL_STACK_OFFSET 0 #define TCG_TARGET_STACK_ALIGN 8 +#define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL #if TCG_TARGET_REG_BITS =3D=3D 32 # define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_EVEN #else diff --git a/tcg/tcg.c b/tcg/tcg.c index e4a6689bda..a6adc43f9f 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1494,24 +1494,24 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int na= rgs, TCGTemp **args) } #endif =20 -#if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS =3D=3D 64 - for (i =3D 0; i < nargs; ++i) { - int argtype =3D extract32(typemask, (i + 1) * 3, 3); - bool is_32bit =3D (argtype & ~1) =3D=3D dh_typecode_i32; - bool is_signed =3D argtype & 1; + if (TCG_TARGET_CALL_ARG_I32 =3D=3D TCG_CALL_ARG_EXTEND) { + for (i =3D 0; i < nargs; ++i) { + int argtype =3D extract32(typemask, (i + 1) * 3, 3); + bool is_32bit =3D (argtype & ~1) =3D=3D dh_typecode_i32; + bool is_signed =3D argtype & 1; =20 - if (is_32bit) { - TCGv_i64 temp =3D tcg_temp_new_i64(); - TCGv_i32 orig =3D temp_tcgv_i32(args[i]); - if (is_signed) { - tcg_gen_ext_i32_i64(temp, orig); - } else { - tcg_gen_extu_i32_i64(temp, orig); + if (is_32bit) { + TCGv_i64 temp =3D tcg_temp_new_i64(); + TCGv_i32 orig =3D temp_tcgv_i32(args[i]); + if (is_signed) { + tcg_gen_ext_i32_i64(temp, orig); + } else { + tcg_gen_extu_i32_i64(temp, orig); + } + args[i] =3D tcgv_i64_temp(temp); } - args[i] =3D tcgv_i64_temp(temp); } } -#endif /* TCG_TARGET_EXTEND_ARGS */ =20 op =3D tcg_emit_op(INDEX_op_call); =20 @@ -1572,16 +1572,16 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int na= rgs, TCGTemp **args) tcg_debug_assert(TCGOP_CALLI(op) =3D=3D real_args); tcg_debug_assert(pi <=3D ARRAY_SIZE(op->args)); =20 -#if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS =3D=3D 64 - for (i =3D 0; i < nargs; ++i) { - int argtype =3D extract32(typemask, (i + 1) * 3, 3); - bool is_32bit =3D (argtype & ~1) =3D=3D dh_typecode_i32; + if (TCG_TARGET_CALL_ARG_I32 =3D=3D TCG_CALL_ARG_EXTEND) { + for (i =3D 0; i < nargs; ++i) { + int argtype =3D extract32(typemask, (i + 1) * 3, 3); + bool is_32bit =3D (argtype & ~1) =3D=3D dh_typecode_i32; =20 - if (is_32bit) { - tcg_temp_free_internal(args[i]); + if (is_32bit) { + tcg_temp_free_internal(args[i]); + } } } -#endif /* TCG_TARGET_EXTEND_ARGS */ } =20 static void tcg_reg_alloc_start(TCGContext *s) diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index c2e6bc3296..38ee9974cd 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -44,6 +44,11 @@ # endif #endif =20 +#if TCG_TARGET_REG_BITS =3D=3D 64 +# define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_EXTEND +#else +# define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL +#endif #ifdef _CALL_SYSV # define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_EVEN #else @@ -2520,7 +2525,6 @@ static void tcg_out_nop_fill(tcg_insn_unit *p, int co= unt) =20 /* Parameters for function call generation, used in tcg.c. */ #define TCG_TARGET_STACK_ALIGN 16 -#define TCG_TARGET_EXTEND_ARGS 1 =20 #ifdef _CALL_AIX # define LINK_AREA_SIZE (6 * SZR) --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OIYBFdTpghAdpncoDoo3OM1Ll9TMAgl8x6x4b6Uo9Ew=; b=EKvqwtfKP9dJjTyvmMMx6OS06ZvGTWQd0JfpFiIquR5KQd9EjicepkYMwdY5iYqXwG UvdH6HkEFZflKNCh6+h42x7KFSrd428vQwR7YT+DD6hXsnoE7I2NI3WcAB80TmfS2Z1v Vq/NNlFz6ONqISW0BPly6GgFKCmYtQKPNqXOwngdZqgezWb2vV1SN7nvqn2m6XuuK/n0 5HQYK9s0RwMh7772DQ+4k5G/hchD69l2EL3aLhMcWlOLH5YvD+d+GnKhHeqhRwHStd/H gRKmYBEw47fh0xidqoFPJfdqHjljYbJOyBgU0OIibXF/hAgPBW3LUnzmaDLeSeITbtUU vkQg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OIYBFdTpghAdpncoDoo3OM1Ll9TMAgl8x6x4b6Uo9Ew=; b=J1+E3TKtXC6TJLpkrj7fCq8tIzPIE3fu9IyK6e566NglbNY12a7l7EQTHMJ9+Yd+QL kaD6Tu8rAtrPofylzxSi6wirllk7ObLkvxqgpAIu9oZ4SG1cjF25JV1rEE80TapbYN9x S//rdVvZ0W58TctdPsEqAbSpJOkqQ5pvYkVJmtOpg2QpEjB6tpO+zinty/R3UrAKrmvS sPa9YkzVOFw4UhMI1XiwO3omG2dFUji5v5+BKJ7/N7Hebk6G1nssBDxoquJPyqZ4BrCT NeJpZ8epxYz49Jhn2BRj040lgJr7MjW+Bx2d4tOaP5hEqGSS2aII1nK6qEyLXlg8puGN 4GDg== X-Gm-Message-State: AFqh2kpYRHLSYpqMlx5hTrXlsgPXWlK7mygWPpqpJIbt7rk0iFh31Mru RFizT8au8LREHROYdc3vOm+x+C+b/1t+bjee X-Google-Smtp-Source: AMrXdXt+alCxqTmqtAXtezKOyJhrlpbsg1m9bZkCwNzcJ4+G0826DAmTLU45gOfmKa0YHJCMHqzGuA== X-Received: by 2002:a17:902:82c4:b0:192:622a:ff9c with SMTP id u4-20020a17090282c400b00192622aff9cmr25528715plz.39.1672358571416; Thu, 29 Dec 2022 16:02:51 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 31/47] tcg: Use TCG_CALL_ARG_EVEN for TCI special case Date: Thu, 29 Dec 2022 16:02:05 -0800 Message-Id: <20221230000221.2764875-32-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359297531000001 Change 32-bit tci TCG_TARGET_CALL_ARG_I32 to TCG_CALL_ARG_EVEN, to force 32-bit values to be aligned to 64-bit. With a small reorg to the argument processing loop, this neatly replaces an ifdef for CONFIG_TCG_INTERPRETER. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/tci/tcg-target.h | 3 +- tcg/tcg.c | 70 ++++++++++++++++++++++++++++---------------- 2 files changed, 47 insertions(+), 26 deletions(-) diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index d6e0450ed8..94ec541b4e 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -158,10 +158,11 @@ typedef enum { /* Used for function call generation. */ #define TCG_TARGET_CALL_STACK_OFFSET 0 #define TCG_TARGET_STACK_ALIGN 8 -#define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL #if TCG_TARGET_REG_BITS =3D=3D 32 +# define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_EVEN # define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_EVEN #else +# define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL # define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL #endif =20 diff --git a/tcg/tcg.c b/tcg/tcg.c index a6adc43f9f..a5ecc92591 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1533,36 +1533,56 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int na= rgs, TCGTemp **args) real_args =3D 0; for (i =3D 0; i < nargs; i++) { int argtype =3D extract32(typemask, (i + 1) * 3, 3); - bool is_64bit =3D (argtype & ~1) =3D=3D dh_typecode_i64; - bool want_align =3D false; + TCGCallArgumentKind kind; + TCGType type; =20 -#if defined(CONFIG_TCG_INTERPRETER) - /* - * Align all arguments, so that they land in predictable places - * for passing off to ffi_call. - */ - want_align =3D true; -#else - /* Some targets want aligned 64 bit args */ - if (is_64bit) { - want_align =3D TCG_TARGET_CALL_ARG_I64 =3D=3D TCG_CALL_ARG_EVE= N; - } -#endif - - if (TCG_TARGET_REG_BITS < 64 && want_align && (real_args & 1)) { - op->args[pi++] =3D TCG_CALL_DUMMY_ARG; - real_args++; + switch (argtype) { + case dh_typecode_i32: + case dh_typecode_s32: + type =3D TCG_TYPE_I32; + break; + case dh_typecode_i64: + case dh_typecode_s64: + type =3D TCG_TYPE_I64; + break; + case dh_typecode_ptr: + type =3D TCG_TYPE_PTR; + break; + default: + g_assert_not_reached(); } =20 - if (TCG_TARGET_REG_BITS < 64 && is_64bit) { + switch (type) { + case TCG_TYPE_I32: + kind =3D TCG_TARGET_CALL_ARG_I32; + break; + case TCG_TYPE_I64: + kind =3D TCG_TARGET_CALL_ARG_I64; + break; + default: + g_assert_not_reached(); + } + + switch (kind) { + case TCG_CALL_ARG_EVEN: + if (real_args & 1) { + op->args[pi++] =3D TCG_CALL_DUMMY_ARG; + real_args++; + } + /* fall through */ + case TCG_CALL_ARG_NORMAL: + if (TCG_TARGET_REG_BITS =3D=3D 32 && type =3D=3D TCG_TYPE_I64)= { + op->args[pi++] =3D temp_arg(args[i]); + op->args[pi++] =3D temp_arg(args[i] + 1); + real_args +=3D 2; + break; + } op->args[pi++] =3D temp_arg(args[i]); - op->args[pi++] =3D temp_arg(args[i] + 1); - real_args +=3D 2; - continue; + real_args++; + break; + default: + g_assert_not_reached(); } - - op->args[pi++] =3D temp_arg(args[i]); - real_args++; } op->args[pi++] =3D (uintptr_t)func; op->args[pi++] =3D (uintptr_t)info; --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qmknChCT1BuzZEHCmViTBYnc57/Tlc2QwxNuPPER9qk=; b=eLO5hR9SBeXisYZtsyBZe7aR9QD2YLfKd1/NGEEMiE8XpCKaA6MhrT+23oO7Or/3GW sB7otR+RNpPefXpqOfy6f6mKMNBmNN0X0F8jEqqqYvS19bC7x61RBGsGo9nFaUyZ3ako KFa5c/V60jViEPS8rQI5OPFzLk7EzkIuhhaTE6WELiK744hI9yE8GVeVKKURS3cmNbc0 Hj70j6OLZKKGuE3bQXQTKix1A1XCyNKrMFr+gjrYEzQfr/+JTaX+PtZvN8ESq1/kkjRt urVqTzPII68dJjZpPY2B3BceyFrDIzTkXKwRPM9Sm89liE7zjiJFthOfJjTC3DP/Uv5E gzzA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qmknChCT1BuzZEHCmViTBYnc57/Tlc2QwxNuPPER9qk=; b=pL+Aw9d/3DvEF+POONjOZighqrpBBWkcy7VH/kRDu0LD17uMlDldiOpUMnCX8Bmw/4 6CCnPZmWGHsNQ7LBAU3EOkaQrhcKi3gd/kJye+vcvNqZvMilh+iaEtxF96sMWNW4bg3+ qASxWlXeAocbF7inCa0pl1EqpZafxvdq3fdb6uiF+ivZomrWWuVjPedYoJ5nGNybeEVC TPVf3psYJL9RIFHDM22jWuvFjBy3n+g6iKL1nyhcbhSPp1kHK2xLTCOa3wGHBMoNH8mm a3/PP/OvakZnisfsa3h/kIOJ5R1mrmXDgguehb5SsAuZjl9TODzBNTGHFemUx+FeuQxS Qv+w== X-Gm-Message-State: AFqh2kqn+yixnkppVkqygJdNBbQxxu5GxvZU46kVqRnG2s36yZjf0XHY kAw+I2ziK3oppOOW17Oz2WNTZOvL821QycyN X-Google-Smtp-Source: AMrXdXvyTeq2WUdXt4p2e3zYX9Vpo3DU8E6yRWbXULBuxu4OqUp4M5hqyWgPAKvKQ0WkX79uTjBheQ== X-Received: by 2002:a17:902:848d:b0:189:76ef:a1b9 with SMTP id c13-20020a170902848d00b0018976efa1b9mr29280273plo.5.1672358572241; Thu, 29 Dec 2022 16:02:52 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 32/47] accel/tcg/plugin: Don't search for the function pointer index Date: Thu, 29 Dec 2022 16:02:06 -0800 Message-Id: <20221230000221.2764875-33-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359761119000001 The function pointer is immediately after the output and input operands; no need to search. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- accel/tcg/plugin-gen.c | 29 +++++++++++------------------ 1 file changed, 11 insertions(+), 18 deletions(-) diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 80dff68934..9e359c006a 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -381,32 +381,25 @@ static TCGOp *copy_st_ptr(TCGOp **begin_op, TCGOp *op) static TCGOp *copy_call(TCGOp **begin_op, TCGOp *op, void *empty_func, void *func, int *cb_idx) { + TCGOp *old_op; + int func_idx; + /* copy all ops until the call */ do { op =3D copy_op_nocheck(begin_op, op); } while (op->opc !=3D INDEX_op_call); =20 /* fill in the op call */ - op->param1 =3D (*begin_op)->param1; - op->param2 =3D (*begin_op)->param2; + old_op =3D *begin_op; + TCGOP_CALLI(op) =3D TCGOP_CALLI(old_op); + TCGOP_CALLO(op) =3D TCGOP_CALLO(old_op); tcg_debug_assert(op->life =3D=3D 0); - if (*cb_idx =3D=3D -1) { - int i; =20 - /* - * Instead of working out the position of the callback in args[], = just - * look for @empty_func, since it should be a unique pointer. - */ - for (i =3D 0; i < MAX_OPC_PARAM_ARGS; i++) { - if ((uintptr_t)(*begin_op)->args[i] =3D=3D (uintptr_t)empty_fu= nc) { - *cb_idx =3D i; - break; - } - } - tcg_debug_assert(i < MAX_OPC_PARAM_ARGS); - } - op->args[*cb_idx] =3D (uintptr_t)func; - op->args[*cb_idx + 1] =3D (*begin_op)->args[*cb_idx + 1]; + func_idx =3D TCGOP_CALLO(op) + TCGOP_CALLI(op); + *cb_idx =3D func_idx; + + op->args[func_idx] =3D (uintptr_t)func; + op->args[func_idx + 1] =3D old_op->args[func_idx + 1]; =20 return op; } --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359131; cv=none; d=zohomail.com; s=zohoarc; b=JVSkD2xh1WNgccXQcoYe+USZoN3CK8QbBwe5pCMtr9Ol90b84laNyhrvxlgIQ9SaONVQsn7Yw8C2gbYzcjr3J9upj1/N4Op0hIXppaqKYaA+qvvBRQvMlktkgdiQ/U7hsGozBURqUp9dc67aQcT6WBB4sAH9pUFTvds5Mu15i+4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359131; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=WRnYCcPWX5BOQQf1a59sccPy8bi18QDF38eChoryi3g=; b=Xtb9130dh4no9sRUPLMeZ6v4Y8pTXcwUrve5F8FWK1QTq/Kf4BhIAydlzuSqBl0KkmWU7f6EmnqSMey3AL2NKueb4mftC67oldtVTlx89KBgNlWLz7gyV+qhV6HjasEznfDK+xz3P90RxHeVg9jX90ES5AohLvVvoODUnA0Z+Gk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672359131301332.5018253924709; Thu, 29 Dec 2022 16:12:11 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2sL-0003o0-AY; Thu, 29 Dec 2022 19:03:53 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2rX-00039H-04 for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:03:05 -0500 Received: from mail-pj1-x102f.google.com ([2607:f8b0:4864:20::102f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2rQ-0002f8-7P for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:03:00 -0500 Received: by mail-pj1-x102f.google.com with SMTP id v13-20020a17090a6b0d00b00219c3be9830so20260341pjj.4 for ; Thu, 29 Dec 2022 16:02:53 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WRnYCcPWX5BOQQf1a59sccPy8bi18QDF38eChoryi3g=; b=fddGhnrit6uLD0IY1PsgSgxr2j+Irtqe/mcmGcCeeIGqaST4bcThiIEJvcyFkY9lRf k81MFDIAaeLt+L68nJc3hoCNIe0X1u5j4Ut0qDaYbkJJAVTC4fqG42XBH204zR7wqSDL HpyTARBORX4tzCTzBQeohE5U/2nZHbt8s1PEy6q8oOSLUgXSzmmLrxE2Fe7H7OXl37fF VJg53oKfwyKVGc7RA0xnEPDHP8QrlQlP5agQBLpAoDdH9U6cajxcOnaw3zMevR4yq01P qcgmdvxIey2JBXSXAVcJKGDfhfX2vd4phOCMS+3g0HsquO95x9K3WdIgVpISf7JEp5lp WZow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WRnYCcPWX5BOQQf1a59sccPy8bi18QDF38eChoryi3g=; b=62saUgMYNbVZYMWaTeRlN9jSdOxGpF8CrRPuaGFj2x8EzdYQ3ADpxsNbQpNMH7YJu8 0SswmhN80p9sBXRwzlISBvcVmNOf4Oz2/wZ0Ilbpeegfzwyr6ALAvPz/zYIvjM3uYOGJ rbCyIcIl2RD6wwo3qZCjf0qJzX+KxihQCnwpOz5kCWjoKNAlKAIdfo4nrQpci4ndeKG6 KgfXRnxKHtTR3JGbVrSFNcWaFIVTPBMhlPJjZfRzVY8oKJB6/+KkemSwH25PTqN0v5v+ CVI1pUJSwMtRw1QDU+B1IE8wrFjuWTai2oTGiFIMB1m2qBlCqN+NqRJWovEYv44rzdFK BfLA== X-Gm-Message-State: AFqh2kq38neU3J6Aaju18HCky60kRjEYX0sYmJ41uW+d2NS/0hIhkPJ1 2kNsgXpDdFlcl05vkvexAr/F55Mr8vS0dwAS X-Google-Smtp-Source: AMrXdXtUQ9tDdgGYTXzp/VU2QhBugna4JCdN6KTKW2lRosbPNZpYyg9wuyVev8I3Zsm9tqYYxCaoeA== X-Received: by 2002:a17:902:ec89:b0:186:b063:32e with SMTP id x9-20020a170902ec8900b00186b063032emr45957411plg.62.1672358573167; Thu, 29 Dec 2022 16:02:53 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 33/47] accel/tcg/plugin: Avoid duplicate copy in copy_call Date: Thu, 29 Dec 2022 16:02:07 -0800 Message-Id: <20221230000221.2764875-34-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359132708000007 We copied all of the arguments in copy_op_nocheck. We only need to replace the one argument that we change. Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- accel/tcg/plugin-gen.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 9e359c006a..77e6823d6b 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -397,9 +397,7 @@ static TCGOp *copy_call(TCGOp **begin_op, TCGOp *op, vo= id *empty_func, =20 func_idx =3D TCGOP_CALLO(op) + TCGOP_CALLI(op); *cb_idx =3D func_idx; - op->args[func_idx] =3D (uintptr_t)func; - op->args[func_idx + 1] =3D old_op->args[func_idx + 1]; =20 return op; } --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359795; cv=none; d=zohomail.com; s=zohoarc; b=ibOgOJMGxd9XQIgkb/5xRDuFEGGXmHoDO9livsXs7iA2GZvULYkpSpTVh8XfBe8+ecG8xKPaPRqtGNu/LnbF4TmucrqWMZv8TsIVlx53DJ83pCBVxh96MT2tQzZ5g4pEMnzBKOCGk/UrvBNLGCVY3JDpjG4zS8qenR6oEqHnS+o= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359795; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=mg8MgGwO6jjwnW8nsumFgvs1cdVJMS+XlnPx9WvPnOA=; b=ZCf6FOSuVIB4LBrgU1GrLECZMdZeqMHAVUUof8Dk3KE/UYqVT2VkSOk6zE3cNRcf4lIMJ//NuG4QRHL17jUpt91jbc5P4xjoHnGaNdbu4ELpOLEk45UVvuFPwSKSz2Ya6HFo6SRhW4dKgloJ0ara6ZYLAEM6M0HOqb736rWdxmI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672359795096522.9709250255613; Thu, 29 Dec 2022 16:23:15 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2sM-0003rw-Qb; Thu, 29 Dec 2022 19:03:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2rX-00039O-4w for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:03:05 -0500 Received: from mail-pl1-x62d.google.com ([2607:f8b0:4864:20::62d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2rS-0002k6-68 for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:03:02 -0500 Received: by mail-pl1-x62d.google.com with SMTP id d15so20366259pls.6 for ; Thu, 29 Dec 2022 16:02:55 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mg8MgGwO6jjwnW8nsumFgvs1cdVJMS+XlnPx9WvPnOA=; b=pEOa2wPaBsS3NLwY8gsUY2XRYZ4dG/tsoWx5c3orahVx6Y7lejdgvBFdHKCFayk6cB Hj/NLOY8YEU1lRVQ2yOaBAxTxkvJEm8GC1k547Z0U2Fk7QHrZHllcW8KBI9mMDqTZK2K T+/LWriI9vw6/wynBbd1rHDizAy2oEgGUKRShO1V3wWZtwytnEdJaTxJXs1QdgB4ITGi KLf7QDHveGiaauoaxUZyN9U+4mRcRP/yJXieNrLbG9tCSlrzOdj3ijowLY7QEw0Otrtv 2qGpRRvezhQ3PYGZJ9e4fGj9rgawDvGScO4zbEHrWp/u2Ol4QHJKFvJTQdfpuuL287Cs 3GFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mg8MgGwO6jjwnW8nsumFgvs1cdVJMS+XlnPx9WvPnOA=; b=Wj/G1y63Czx0/h2QWqASKQFv7/9eaiqtlCl//7/CcaKXd3V1nrHvsLiSlMc/yERwN2 T0ZYceSwtvDIE4EdQvRxW2PXrMyF4ylvNh5/ZU/kCBYdXmRwRTX6h/BYH80nLTjjOWr6 10sRH+zQgjAnwd9uV0K16gXhbMZqtub4UFjULu29RZ9hwnfzXhdtkUjVgw68QKbZhAdV NWDxUf4vHJz0c7fEL2h/XdlIPG7PpLPznj50EbFR9HCOmVC/Bcv8dG+zevahCL621Ygs 5SGOu50/a4gz/M1bj8CFI0/nhfyqQovoco251v3G4tswQEtDuTwd0IjVNeB216/e9mBO fTtw== X-Gm-Message-State: AFqh2koJXPs+Vphdaz1frBrsEfuQnrQBREtTkWeRTIXbJK/uYO1FwZOg iB3l1Zl7M+grIq6X7EHbtvSrBeKr7lEl+Y1Z X-Google-Smtp-Source: AMrXdXvSxnnETyd8+GX2r8BG/0OcTOWyfYa+LBBRAF5/zIssDz2WEKUC7OSi0Q6fYzrVPvcGQWgBoQ== X-Received: by 2002:a17:902:da86:b0:188:f570:7bdf with SMTP id j6-20020a170902da8600b00188f5707bdfmr42104367plx.40.1672358574143; Thu, 29 Dec 2022 16:02:54 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 34/47] accel/tcg/plugin: Use copy_op in append_{udata,mem}_cb Date: Thu, 29 Dec 2022 16:02:08 -0800 Message-Id: <20221230000221.2764875-35-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359795253000001 Better to re-use the existing function for copying ops. Acked-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- accel/tcg/plugin-gen.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 77e6823d6b..a6aaacd053 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -415,11 +415,11 @@ static TCGOp *append_udata_cb(const struct qemu_plugi= n_dyn_cb *cb, op =3D copy_const_ptr(&begin_op, op, cb->userp); =20 /* copy the ld_i32, but note that we only have to copy it once */ - begin_op =3D QTAILQ_NEXT(begin_op, link); - tcg_debug_assert(begin_op && begin_op->opc =3D=3D INDEX_op_ld_i32); if (*cb_idx =3D=3D -1) { - op =3D tcg_op_insert_after(tcg_ctx, op, INDEX_op_ld_i32); - memcpy(op->args, begin_op->args, sizeof(op->args)); + op =3D copy_op(&begin_op, op, INDEX_op_ld_i32); + } else { + begin_op =3D QTAILQ_NEXT(begin_op, link); + tcg_debug_assert(begin_op && begin_op->opc =3D=3D INDEX_op_ld_i32); } =20 /* call */ @@ -462,11 +462,11 @@ static TCGOp *append_mem_cb(const struct qemu_plugin_= dyn_cb *cb, op =3D copy_const_ptr(&begin_op, op, cb->userp); =20 /* copy the ld_i32, but note that we only have to copy it once */ - begin_op =3D QTAILQ_NEXT(begin_op, link); - tcg_debug_assert(begin_op && begin_op->opc =3D=3D INDEX_op_ld_i32); if (*cb_idx =3D=3D -1) { - op =3D tcg_op_insert_after(tcg_ctx, op, INDEX_op_ld_i32); - memcpy(op->args, begin_op->args, sizeof(op->args)); + op =3D copy_op(&begin_op, op, INDEX_op_ld_i32); + } else { + begin_op =3D QTAILQ_NEXT(begin_op, link); + tcg_debug_assert(begin_op && begin_op->opc =3D=3D INDEX_op_ld_i32); } =20 /* extu_tl_i64 */ --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359144; cv=none; d=zohomail.com; s=zohoarc; b=boMjHER9UXBO4a1wNPLApO/SR/BA1Ebihxk+53smXnK40nCoxLCiO0Y8uWXeKnycCo4hKLwuul2rCq92IuypW8evuPNKiF5gNj216jWXtUY9t0c9a+yv6EgpWKETouzNMZSoRd4eKuRXU8MYRmG0vQj3k/X8eJz3guOst8RErPc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359144; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=CYhK4ojXwIJU9A+YUctfxLBE0VXin67Cl0AC2MvLIgU=; b=mg1fPCGR5scDQmb4vFbJMa0w8o+7r5Sui2gB915D/Rb1KuwXO5vYzZEBFAAwg/h3nM+AVLq9AZy9Sio84mEUVzzHR9M3NtygmivbdKVEhNEtXfQ9YB1BQUE63V6/mHY2NyYewkDpe+zBGRDUm+EHVQ/WTQQfberleoaFDXWKakc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672359144062996.8489660898339; Thu, 29 Dec 2022 16:12:24 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2re-0003By-T8; Thu, 29 Dec 2022 19:03:10 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2rX-00039M-2o for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:03:05 -0500 Received: from mail-pj1-x102e.google.com ([2607:f8b0:4864:20::102e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2rR-0002kA-U0 for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:03:02 -0500 Received: by mail-pj1-x102e.google.com with SMTP id w4-20020a17090ac98400b002186f5d7a4cso24408939pjt.0 for ; Thu, 29 Dec 2022 16:02:56 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CYhK4ojXwIJU9A+YUctfxLBE0VXin67Cl0AC2MvLIgU=; b=LHcqSbc5t/YjSs7lp/nxmz+S0qr6CtimWICXKT1xGRJLjkOyyhhyfy/yYH0jdOBWak XuXypT0uvZ4fqrz+AI+zX2vvsuAE8Sgf4iQoiLgX3g8oCvqc3DkOJB2dCif9Z+EKJeDH Lq0c/pEUYHRXPVZQ91Od3ZyKetJSUSysMzhBio3OnLPB1hwTTmubCDa/gWfS75Y5v3Ac mKbRItedGguxd7hCWpT/ma2AFmZx8ezC0bLbQcTDG8p1KjClsdxq7I3keamTueGfQJFH cs1tLN5g6/0iyDnZvVVjU8ZeLrkSQfOv+oaoVISBPoq5Tu82MRo11phYZj3aZHHQP5p/ EjEw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CYhK4ojXwIJU9A+YUctfxLBE0VXin67Cl0AC2MvLIgU=; b=aseMyY00nzEvhOazJqzgI3uXUynHCFCSPjpU8AtvcZtLnF3Wnlp8q5C1c5Eb5pJGRW M8332ob9oWOPydrSPBtC60jf422bWV7zyL4TJwyQQMJZwY6hTH3JJBf7C8J7YUWALET0 U9vrUV+hloBD1XNKmdMeGLE9mF8hDFO1SXiHVoolVD5Mdz+3nIvsApjvYl0woRYpCZC1 adrDW1M+NqTX6eF4FLsio5U3UmZBHcJw1VrJBuHT8hbHWd0/Swa0ypJVyKM4ON9u1WpP iQDcl/Ke4L7MeQImuaOZC9aPYWBf+365Ijczuph6wOPz9cyiu3L2+VTqL39DwFXDnFkL rosg== X-Gm-Message-State: AFqh2krgAZjnI7ve0qSZLKuezbNLMBWGW46rJGzhl2ZGG1ftMXfvfcXn F6iQ3+q9RPgXk8ki2J6pecutiQHErzShzkRF X-Google-Smtp-Source: AMrXdXuJ4yZfvLCbL3pZUpUC1TvryNeae1tBsGhYPJsYVEyKrxqbObqgxQ3tuknqVjV1I8r6nr8vEQ== X-Received: by 2002:a17:902:8f87:b0:189:b36a:5448 with SMTP id z7-20020a1709028f8700b00189b36a5448mr33279774plo.44.1672358574970; Thu, 29 Dec 2022 16:02:54 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 35/47] tcg: Pass number of arguments to tcg_emit_op() / tcg_op_insert_*() Date: Thu, 29 Dec 2022 16:02:09 -0800 Message-Id: <20221230000221.2764875-36-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359145639000003 From: Philippe Mathieu-Daud=C3=A9 In order to have variable size allocated TCGOp, pass the number of arguments we use (and would allocate) up to tcg_op_alloc(). This alters tcg_emit_op(), tcg_op_insert_before() and tcg_op_insert_after() prototypes. In tcg_op_alloc() ensure the number of arguments is in range. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson [PMD: Extracted from bigger patch] Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20221218211832.73312-2-philmd@linaro.org> --- include/tcg/tcg-op.h | 2 +- include/tcg/tcg.h | 8 +++++--- accel/tcg/plugin-gen.c | 5 ++++- tcg/optimize.c | 4 ++-- tcg/tcg-op-vec.c | 8 ++++---- tcg/tcg-op.c | 12 ++++++------ tcg/tcg.c | 30 +++++++++++++++++------------- 7 files changed, 39 insertions(+), 30 deletions(-) diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h index 8176f194cb..79b1cf786f 100644 --- a/include/tcg/tcg-op.h +++ b/include/tcg/tcg-op.h @@ -818,7 +818,7 @@ static inline void tcg_gen_plugin_cb_start(unsigned fro= m, unsigned type, =20 static inline void tcg_gen_plugin_cb_end(void) { - tcg_emit_op(INDEX_op_plugin_cb_end); + tcg_emit_op(INDEX_op_plugin_cb_end, 0); } =20 #if TARGET_LONG_BITS =3D=3D 32 diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 8bcd60d0ed..c55fa21a89 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -1014,10 +1014,12 @@ bool tcg_op_supported(TCGOpcode op); =20 void tcg_gen_callN(void *func, TCGTemp *ret, int nargs, TCGTemp **args); =20 -TCGOp *tcg_emit_op(TCGOpcode opc); +TCGOp *tcg_emit_op(TCGOpcode opc, unsigned nargs); void tcg_op_remove(TCGContext *s, TCGOp *op); -TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *op, TCGOpcode opc); -TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *op, TCGOpcode opc); +TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *op, + TCGOpcode opc, unsigned nargs); +TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *op, + TCGOpcode opc, unsigned nargs); =20 /** * tcg_remove_ops_after: diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index a6aaacd053..62e775d34d 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -258,10 +258,13 @@ static TCGOp *rm_ops(TCGOp *op) =20 static TCGOp *copy_op_nocheck(TCGOp **begin_op, TCGOp *op) { + unsigned nargs =3D ARRAY_SIZE(op->args); + *begin_op =3D QTAILQ_NEXT(*begin_op, link); tcg_debug_assert(*begin_op); - op =3D tcg_op_insert_after(tcg_ctx, op, (*begin_op)->opc); + op =3D tcg_op_insert_after(tcg_ctx, op, (*begin_op)->opc, nargs); memcpy(op->args, (*begin_op)->args, sizeof(op->args)); + return op; } =20 diff --git a/tcg/optimize.c b/tcg/optimize.c index ae081ab29c..1afd50175b 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -962,7 +962,7 @@ static bool fold_addsub2(OptContext *ctx, TCGOp *op, bo= ol add) rh =3D op->args[1]; =20 /* The proper opcode is supplied by tcg_opt_gen_mov. */ - op2 =3D tcg_op_insert_before(ctx->tcg, op, 0); + op2 =3D tcg_op_insert_before(ctx->tcg, op, 0, 2); =20 tcg_opt_gen_movi(ctx, op, rl, al); tcg_opt_gen_movi(ctx, op2, rh, ah); @@ -1613,7 +1613,7 @@ static bool fold_multiply2(OptContext *ctx, TCGOp *op) rh =3D op->args[1]; =20 /* The proper opcode is supplied by tcg_opt_gen_mov. */ - op2 =3D tcg_op_insert_before(ctx->tcg, op, 0); + op2 =3D tcg_op_insert_before(ctx->tcg, op, 0, 2); =20 tcg_opt_gen_movi(ctx, op, rl, l); tcg_opt_gen_movi(ctx, op2, rh, h); diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c index 5bf100ea7d..966d41d65a 100644 --- a/tcg/tcg-op-vec.c +++ b/tcg/tcg-op-vec.c @@ -152,7 +152,7 @@ bool tcg_can_emit_vecop_list(const TCGOpcode *list, =20 void vec_gen_2(TCGOpcode opc, TCGType type, unsigned vece, TCGArg r, TCGAr= g a) { - TCGOp *op =3D tcg_emit_op(opc); + TCGOp *op =3D tcg_emit_op(opc, 2); TCGOP_VECL(op) =3D type - TCG_TYPE_V64; TCGOP_VECE(op) =3D vece; op->args[0] =3D r; @@ -162,7 +162,7 @@ void vec_gen_2(TCGOpcode opc, TCGType type, unsigned ve= ce, TCGArg r, TCGArg a) void vec_gen_3(TCGOpcode opc, TCGType type, unsigned vece, TCGArg r, TCGArg a, TCGArg b) { - TCGOp *op =3D tcg_emit_op(opc); + TCGOp *op =3D tcg_emit_op(opc, 3); TCGOP_VECL(op) =3D type - TCG_TYPE_V64; TCGOP_VECE(op) =3D vece; op->args[0] =3D r; @@ -173,7 +173,7 @@ void vec_gen_3(TCGOpcode opc, TCGType type, unsigned ve= ce, void vec_gen_4(TCGOpcode opc, TCGType type, unsigned vece, TCGArg r, TCGArg a, TCGArg b, TCGArg c) { - TCGOp *op =3D tcg_emit_op(opc); + TCGOp *op =3D tcg_emit_op(opc, 4); TCGOP_VECL(op) =3D type - TCG_TYPE_V64; TCGOP_VECE(op) =3D vece; op->args[0] =3D r; @@ -185,7 +185,7 @@ void vec_gen_4(TCGOpcode opc, TCGType type, unsigned ve= ce, static void vec_gen_6(TCGOpcode opc, TCGType type, unsigned vece, TCGArg r, TCGArg a, TCGArg b, TCGArg c, TCGArg d, TCGArg e) { - TCGOp *op =3D tcg_emit_op(opc); + TCGOp *op =3D tcg_emit_op(opc, 6); TCGOP_VECL(op) =3D type - TCG_TYPE_V64; TCGOP_VECE(op) =3D vece; op->args[0] =3D r; diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 6168327030..cd1cd4e736 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -33,20 +33,20 @@ =20 void tcg_gen_op1(TCGOpcode opc, TCGArg a1) { - TCGOp *op =3D tcg_emit_op(opc); + TCGOp *op =3D tcg_emit_op(opc, 1); op->args[0] =3D a1; } =20 void tcg_gen_op2(TCGOpcode opc, TCGArg a1, TCGArg a2) { - TCGOp *op =3D tcg_emit_op(opc); + TCGOp *op =3D tcg_emit_op(opc, 2); op->args[0] =3D a1; op->args[1] =3D a2; } =20 void tcg_gen_op3(TCGOpcode opc, TCGArg a1, TCGArg a2, TCGArg a3) { - TCGOp *op =3D tcg_emit_op(opc); + TCGOp *op =3D tcg_emit_op(opc, 3); op->args[0] =3D a1; op->args[1] =3D a2; op->args[2] =3D a3; @@ -54,7 +54,7 @@ void tcg_gen_op3(TCGOpcode opc, TCGArg a1, TCGArg a2, TCG= Arg a3) =20 void tcg_gen_op4(TCGOpcode opc, TCGArg a1, TCGArg a2, TCGArg a3, TCGArg a4) { - TCGOp *op =3D tcg_emit_op(opc); + TCGOp *op =3D tcg_emit_op(opc, 4); op->args[0] =3D a1; op->args[1] =3D a2; op->args[2] =3D a3; @@ -64,7 +64,7 @@ void tcg_gen_op4(TCGOpcode opc, TCGArg a1, TCGArg a2, TCG= Arg a3, TCGArg a4) void tcg_gen_op5(TCGOpcode opc, TCGArg a1, TCGArg a2, TCGArg a3, TCGArg a4, TCGArg a5) { - TCGOp *op =3D tcg_emit_op(opc); + TCGOp *op =3D tcg_emit_op(opc, 5); op->args[0] =3D a1; op->args[1] =3D a2; op->args[2] =3D a3; @@ -75,7 +75,7 @@ void tcg_gen_op5(TCGOpcode opc, TCGArg a1, TCGArg a2, TCG= Arg a3, void tcg_gen_op6(TCGOpcode opc, TCGArg a1, TCGArg a2, TCGArg a3, TCGArg a4, TCGArg a5, TCGArg a6) { - TCGOp *op =3D tcg_emit_op(opc); + TCGOp *op =3D tcg_emit_op(opc, 6); op->args[0] =3D a1; op->args[1] =3D a2; op->args[2] =3D a3; diff --git a/tcg/tcg.c b/tcg/tcg.c index a5ecc92591..25c131fd77 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1479,7 +1479,7 @@ bool tcg_op_supported(TCGOpcode op) and endian swap in tcg_reg_alloc_call(). */ void tcg_gen_callN(void *func, TCGTemp *ret, int nargs, TCGTemp **args) { - int i, real_args, nb_rets, pi; + int i, real_args, nb_rets, pi, max_args; unsigned typemask; const TCGHelperInfo *info; TCGOp *op; @@ -1513,7 +1513,8 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int narg= s, TCGTemp **args) } } =20 - op =3D tcg_emit_op(INDEX_op_call); + max_args =3D ARRAY_SIZE(op->args); + op =3D tcg_emit_op(INDEX_op_call, max_args); =20 pi =3D 0; if (ret !=3D NULL) { @@ -1590,7 +1591,7 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int narg= s, TCGTemp **args) =20 /* Make sure the fields didn't overflow. */ tcg_debug_assert(TCGOP_CALLI(op) =3D=3D real_args); - tcg_debug_assert(pi <=3D ARRAY_SIZE(op->args)); + tcg_debug_assert(pi <=3D max_args); =20 if (TCG_TARGET_CALL_ARG_I32 =3D=3D TCG_CALL_ARG_EXTEND) { for (i =3D 0; i < nargs; ++i) { @@ -2294,11 +2295,12 @@ void tcg_remove_ops_after(TCGOp *op) } } =20 -static TCGOp *tcg_op_alloc(TCGOpcode opc) +static TCGOp *tcg_op_alloc(TCGOpcode opc, unsigned nargs) { TCGContext *s =3D tcg_ctx; TCGOp *op; =20 + assert(nargs < ARRAY_SIZE(op->args)); if (likely(QTAILQ_EMPTY(&s->free_ops))) { op =3D tcg_malloc(sizeof(TCGOp)); } else { @@ -2312,23 +2314,25 @@ static TCGOp *tcg_op_alloc(TCGOpcode opc) return op; } =20 -TCGOp *tcg_emit_op(TCGOpcode opc) +TCGOp *tcg_emit_op(TCGOpcode opc, unsigned nargs) { - TCGOp *op =3D tcg_op_alloc(opc); + TCGOp *op =3D tcg_op_alloc(opc, nargs); QTAILQ_INSERT_TAIL(&tcg_ctx->ops, op, link); return op; } =20 -TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *old_op, TCGOpcode opc) +TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *old_op, + TCGOpcode opc, unsigned nargs) { - TCGOp *new_op =3D tcg_op_alloc(opc); + TCGOp *new_op =3D tcg_op_alloc(opc, nargs); QTAILQ_INSERT_BEFORE(old_op, new_op, link); return new_op; } =20 -TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *old_op, TCGOpcode opc) +TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *old_op, + TCGOpcode opc, unsigned nargs) { - TCGOp *new_op =3D tcg_op_alloc(opc); + TCGOp *new_op =3D tcg_op_alloc(opc, nargs); QTAILQ_INSERT_AFTER(&s->ops, old_op, new_op, link); return new_op; } @@ -2937,7 +2941,7 @@ static bool liveness_pass_2(TCGContext *s) TCGOpcode lopc =3D (arg_ts->type =3D=3D TCG_TYPE_I32 ? INDEX_op_ld_i32 : INDEX_op_ld_i64); - TCGOp *lop =3D tcg_op_insert_before(s, op, lopc); + TCGOp *lop =3D tcg_op_insert_before(s, op, lopc, 3); =20 lop->args[0] =3D temp_arg(dir_ts); lop->args[1] =3D temp_arg(arg_ts->mem_base); @@ -3003,7 +3007,7 @@ static bool liveness_pass_2(TCGContext *s) TCGOpcode sopc =3D (arg_ts->type =3D=3D TCG_TYPE_I32 ? INDEX_op_st_i32 : INDEX_op_st_i64); - TCGOp *sop =3D tcg_op_insert_after(s, op, sopc); + TCGOp *sop =3D tcg_op_insert_after(s, op, sopc, 3); TCGTemp *out_ts =3D dir_ts; =20 if (IS_DEAD_ARG(0)) { @@ -3039,7 +3043,7 @@ static bool liveness_pass_2(TCGContext *s) TCGOpcode sopc =3D (arg_ts->type =3D=3D TCG_TYPE_I32 ? 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BaPB+/r7pdsWWo3pTR8xHeofU+nBHm3R3MHr1eWnccc=; b=R38RVJ9UgTcmn/qq/X4AKLsi/n6rvgDL1ugBcYrh3zjrise7UAkOICi8h45fnm2JG6 /BM7GFAJuPuWi8Hluo5wiqVjFAnFC79fg5ekPk+V6Gn9+Uk9YPcL9Bv1S+JdDXSQW6mo /3gKeKhomBNvp/AM2NsqSpJizmsrZVXfrHEjbx/cpzQTzxtKh3UlUUVwZFKHcHUrnSD+ QCPE/D1qu4Ey7jOK2g+9ZOZ0l/le1OIwofCF8Kn4AmiwGogyHA/Wfw0EQH+morLtI9fp ebknmHP+GYBhPiG8D2b+uy2PPvM5AMDGD4wSgJDiu6OqPvE7DCpRzVAVhlwMVBxOkpCR T0mg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BaPB+/r7pdsWWo3pTR8xHeofU+nBHm3R3MHr1eWnccc=; b=FxGnYVp/3zaZMOk2/NvAkrs1I1p2phDnzjxcYsdkg+3jspP9qDvHRQgJTAhaiECDjq COcSYoz9XfhDZcQhzYPnGwZWfbhgFfc9Dc96PvGPXjsUWgegqHEFzLixNi8jjnzk+udP Vxht1uOkopebp/w3rUl2WsdPxRXtxntALY9UGABG6Vygqfqqj+Bxdpe6sTmah0q8xiLd NfIbQlqkfP1JXUZLud9D17MKTi3Nkb+vgOP9VBRtoISFCCngXteF5i7RIbI3zWksMkB5 4EFBPcJ8ZpCq2PMoTZ8t6lWW29YULFQDl5ANhWeG2J4p3sf70RDD+3oZSTl6Piuk8Jl/ 0ZoA== X-Gm-Message-State: AFqh2krWEzJDa17JEVqAdpV48qe3z7PNCqD/nb/TeQI34264ANQeV+mE 7skHJ4wmw0WMi9fWMiIMRuVzCyZJ1iAhwO3V X-Google-Smtp-Source: AMrXdXvInw5+8eBX8FiRUMTK0GrybmSFuJSjtGo5iPHBWNu0debMCDiQtPGO/dUssVx6nmbo1RHIXA== X-Received: by 2002:a17:903:442:b0:191:2c85:1371 with SMTP id iw2-20020a170903044200b001912c851371mr26598748plb.18.1672358576078; Thu, 29 Dec 2022 16:02:56 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 36/47] tcg: Vary the allocation size for TCGOp Date: Thu, 29 Dec 2022 16:02:10 -0800 Message-Id: <20221230000221.2764875-37-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672358651641000005 We have been allocating a worst case number of arguments to support calls. Instead, allow the size to vary. By default leave space for 4 args, to maximize reuse, but allow calls to increase the number of args to 32. Signed-off-by: Richard Henderson [PMD: Split patch in two] Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20221218211832.73312-3-philmd@linaro.org> --- include/exec/helper-head.h | 2 -- include/tcg/tcg.h | 46 +++++++++++++------------------------- accel/tcg/plugin-gen.c | 10 ++++----- tcg/tcg.c | 35 +++++++++++++++++++++-------- 4 files changed, 47 insertions(+), 46 deletions(-) diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h index e242fed46e..8bdf0f6ea2 100644 --- a/include/exec/helper-head.h +++ b/include/exec/helper-head.h @@ -133,6 +133,4 @@ #define DEF_HELPER_7(name, ret, t1, t2, t3, t4, t5, t6, t7) \ DEF_HELPER_FLAGS_7(name, 0, ret, t1, t2, t3, t4, t5, t6, t7) =20 -/* MAX_OPC_PARAM_IARGS must be set to n if last entry is DEF_HELPER_FLAGS_= n. */ - #endif /* EXEC_HELPER_HEAD_H */ diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index c55fa21a89..d430ea10c8 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -38,20 +38,6 @@ /* XXX: make safe guess about sizes */ #define MAX_OP_PER_INSTR 266 =20 -#if HOST_LONG_BITS =3D=3D 32 -#define MAX_OPC_PARAM_PER_ARG 2 -#else -#define MAX_OPC_PARAM_PER_ARG 1 -#endif -#define MAX_OPC_PARAM_IARGS 7 -#define MAX_OPC_PARAM_OARGS 1 -#define MAX_OPC_PARAM_ARGS (MAX_OPC_PARAM_IARGS + MAX_OPC_PARAM_OARGS) - -/* A Call op needs up to 4 + 2N parameters on 32-bit archs, - * and up to 4 + N parameters on 64-bit archs - * (N =3D number of input arguments + output arguments). */ -#define MAX_OPC_PARAM (4 + (MAX_OPC_PARAM_PER_ARG * MAX_OPC_PARAM_ARGS)) - #define CPU_TEMP_BUF_NLONGS 128 #define TCG_STATIC_FRAME_SIZE (CPU_TEMP_BUF_NLONGS * sizeof(long)) =20 @@ -493,34 +479,34 @@ typedef struct TCGTempSet { unsigned long l[BITS_TO_LONGS(TCG_MAX_TEMPS)]; } TCGTempSet; =20 -/* While we limit helpers to 6 arguments, for 32-bit hosts, with padding, - this imples a max of 6*2 (64-bit in) + 2 (64-bit out) =3D 14 operands. - There are never more than 2 outputs, which means that we can store all - dead + sync data within 16 bits. */ -#define DEAD_ARG 4 -#define SYNC_ARG 1 -typedef uint16_t TCGLifeData; +/* + * With 1 128-bit output, a 32-bit host requires 4 output parameters, + * which leaves a maximum of 28 other slots. Which is enough for 7 + * 128-bit operands. + */ +#define DEAD_ARG (1 << 4) +#define SYNC_ARG (1 << 0) +typedef uint32_t TCGLifeData; =20 -/* The layout here is designed to avoid a bitfield crossing of - a 32-bit boundary, which would cause GCC to add extra padding. */ typedef struct TCGOp { - TCGOpcode opc : 8; /* 8 */ + TCGOpcode opc : 8; + unsigned nargs : 8; =20 /* Parameters for this opcode. See below. */ - unsigned param1 : 4; /* 12 */ - unsigned param2 : 4; /* 16 */ + unsigned param1 : 8; + unsigned param2 : 8; =20 /* Lifetime data of the operands. */ - unsigned life : 16; /* 32 */ + TCGLifeData life; =20 /* Next and previous opcodes. */ QTAILQ_ENTRY(TCGOp) link; =20 - /* Arguments for the opcode. */ - TCGArg args[MAX_OPC_PARAM]; - /* Register preferences for the output(s). */ TCGRegSet output_pref[2]; + + /* Arguments for the opcode. */ + TCGArg args[]; } TCGOp; =20 #define TCGOP_CALLI(X) (X)->param1 diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 62e775d34d..c7d6514840 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -258,12 +258,12 @@ static TCGOp *rm_ops(TCGOp *op) =20 static TCGOp *copy_op_nocheck(TCGOp **begin_op, TCGOp *op) { - unsigned nargs =3D ARRAY_SIZE(op->args); + TCGOp *old_op =3D QTAILQ_NEXT(*begin_op, link); + unsigned nargs =3D old_op->nargs; =20 - *begin_op =3D QTAILQ_NEXT(*begin_op, link); - tcg_debug_assert(*begin_op); - op =3D tcg_op_insert_after(tcg_ctx, op, (*begin_op)->opc, nargs); - memcpy(op->args, (*begin_op)->args, sizeof(op->args)); + *begin_op =3D old_op; + op =3D tcg_op_insert_after(tcg_ctx, op, old_op->opc, nargs); + memcpy(op->args, old_op->args, sizeof(op->args[0]) * nargs); =20 return op; } diff --git a/tcg/tcg.c b/tcg/tcg.c index 25c131fd77..0fd41d5951 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1513,7 +1513,12 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int nar= gs, TCGTemp **args) } } =20 - max_args =3D ARRAY_SIZE(op->args); + /* + * A Call op needs up to 4 + 2N parameters on 32-bit archs, + * and up to 4 + N parameters on 64-bit archs + * (N =3D number of input arguments + output arguments). + */ + max_args =3D (64 / TCG_TARGET_REG_BITS) * nargs + 4; op =3D tcg_emit_op(INDEX_op_call, max_args); =20 pi =3D 0; @@ -2298,19 +2303,31 @@ void tcg_remove_ops_after(TCGOp *op) static TCGOp *tcg_op_alloc(TCGOpcode opc, unsigned nargs) { TCGContext *s =3D tcg_ctx; - TCGOp *op; + TCGOp *op =3D NULL; =20 - assert(nargs < ARRAY_SIZE(op->args)); - if (likely(QTAILQ_EMPTY(&s->free_ops))) { - op =3D tcg_malloc(sizeof(TCGOp)); - } else { - op =3D QTAILQ_FIRST(&s->free_ops); - QTAILQ_REMOVE(&s->free_ops, op, link); + if (unlikely(!QTAILQ_EMPTY(&s->free_ops))) { + QTAILQ_FOREACH(op, &s->free_ops, link) { + if (nargs <=3D op->nargs) { + QTAILQ_REMOVE(&s->free_ops, op, link); + nargs =3D op->nargs; + goto found; + } + } } + + /* Most opcodes have 3 or 4 operands: reduce fragmentation. */ + nargs =3D MAX(4, nargs); + op =3D tcg_malloc(sizeof(TCGOp) + sizeof(TCGArg) * nargs); + + found: memset(op, 0, offsetof(TCGOp, link)); op->opc =3D opc; - s->nb_ops++; + op->nargs =3D nargs; =20 + /* Check for bitfield overflow. */ + tcg_debug_assert(op->nargs =3D=3D nargs); + + s->nb_ops++; return op; } =20 --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Ki3ZWlzYefaheNWHG2Yd28+L0tOroJcHx9O8WcgrZBo=; b=Mz9j4mEFtIMNllzR5//SL/PKLQGnnVI56p5g1JTsEOe6Q3ZBkh3fhZjLJicJrQXgyj L1/G4SZhWqCGcVVU5Ds6BFcdCh0e+pFUc//s3ShVCbEtoxxKG3Kp68FvWqP2YbZjfk03 hMJtUvy4kcJaO+VJBMC0fEWxDOQCl4AQtIwgmGgrHDy0LQHqAvUwMPG6cgeTD2dJFgnP 8Fx8zS11AyJKCZuyyrkOmLELHLU2aneznbElwN9qbf1wYGyLPrbXSUAFzHpl0QqRS+6L ZnOoOUuAFcpFJPtYemdtmElAWcL5mRQicVVT9NLX2+tYZ8iLtlB1D9WmYxc7xbrQP+JY 2H+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ki3ZWlzYefaheNWHG2Yd28+L0tOroJcHx9O8WcgrZBo=; b=jxvwLCWE3EOnL+kH9A4CMAEUg5MjJJdfCzey3ciOB/Aj19lDDK9/ZTjc03PTmp7sh7 Bhhf2/VTOts0GPtmhWdYpV9PE5O2oAqp9Onp6LnfZIgRMoI98dn11b2lZezWkSSq04L3 Qapv9MYNpzvGjuVWKo0mILr+9Vk4Ir9orNzF5Ok/i+fcSrA1fhzDBiG71e6azN7IDGby HPrPXc5as4ftFdvK625+MKxpPvNDZCOF7I14y8ADZt+NE6RNwtTnyan7Mv8ktTFbY4sL ExcHN7eF0QVD5+W8UKmPx+CZ/mB1fVfJm9UQR+49sw9rAtCsCuaJfJgpyGIK4IHBgdjY UqaA== X-Gm-Message-State: AFqh2krtMFYlfwJ3A0d/1IHy4v2M4Bk2ocCyXmqu4AKeey1TJcHhLSUX ZKsIzMPDFjmZivpAN6zMldIEH9uBdK9SIfbW X-Google-Smtp-Source: AMrXdXuYJs/cQFycMyhQF8qJ8s7kGh3BC6BlQ/eHqfwqkXsp4xfFMbLvn/5l+MeHiOcuh9TdCMkREQ== X-Received: by 2002:a17:902:e2ca:b0:18e:c6b0:b2f6 with SMTP id l10-20020a170902e2ca00b0018ec6b0b2f6mr28012388plc.14.1672358577004; Thu, 29 Dec 2022 16:02:57 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 37/47] tcg: Use output_pref wrapper function Date: Thu, 29 Dec 2022 16:02:11 -0800 Message-Id: <20221230000221.2764875-38-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359508980000001 We will shortly have the possibility of more that two outputs, though only for calls (for which preferences are moot). Avoid direct references to op->output_pref[] when possible. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 5 +++++ tcg/tcg.c | 34 ++++++++++++++++++---------------- 2 files changed, 23 insertions(+), 16 deletions(-) diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index d430ea10c8..a6310b898f 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -518,6 +518,11 @@ typedef struct TCGOp { /* Make sure operands fit in the bitfields above. */ QEMU_BUILD_BUG_ON(NB_OPS > (1 << 8)); =20 +static inline TCGRegSet output_pref(const TCGOp *op, unsigned i) +{ + return i < ARRAY_SIZE(op->output_pref) ? op->output_pref[i] : 0; +} + typedef struct TCGProfile { int64_t cpu_exec_time; int64_t tb_count1; diff --git a/tcg/tcg.c b/tcg/tcg.c index 0fd41d5951..b84cc3cad3 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1966,7 +1966,7 @@ static void tcg_dump_ops(TCGContext *s, FILE *f, bool= have_prefs) =20 if (have_prefs) { for (i =3D 0; i < nb_oargs; ++i) { - TCGRegSet set =3D op->output_pref[i]; + TCGRegSet set =3D output_pref(op, i); =20 if (i =3D=3D 0) { ne_fprintf(f, " pref=3D"); @@ -2636,11 +2636,11 @@ static void liveness_pass_1(TCGContext *s) } ts->state =3D TS_DEAD; la_reset_pref(ts); - - /* Not used -- it will be tcg_target_call_oarg_regs[i]= . */ - op->output_pref[i] =3D 0; } =20 + /* Not used -- it will be tcg_target_call_oarg_reg(). */ + memset(op->output_pref, 0, sizeof(op->output_pref)); + if (!(call_flags & (TCG_CALL_NO_WRITE_GLOBALS | TCG_CALL_NO_READ_GLOBALS))) { la_global_kill(s, nb_globals); @@ -2802,7 +2802,9 @@ static void liveness_pass_1(TCGContext *s) ts =3D arg_temp(op->args[i]); =20 /* Remember the preference of the uses that followed. */ - op->output_pref[i] =3D *la_temp_pref(ts); + if (i < ARRAY_SIZE(op->output_pref)) { + op->output_pref[i] =3D *la_temp_pref(ts); + } =20 /* Output args are dead. */ if (ts->state & TS_DEAD) { @@ -2872,7 +2874,7 @@ static void liveness_pass_1(TCGContext *s) =20 set &=3D ct->regs; if (ct->ialias) { - set &=3D op->output_pref[ct->alias_index]; + set &=3D output_pref(op, ct->alias_index); } /* If the combination is not possible, restart. */ if (set =3D=3D 0) { @@ -3539,7 +3541,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TC= GOp *op) TCGReg oreg, ireg; =20 allocated_regs =3D s->reserved_regs; - preferred_regs =3D op->output_pref[0]; + preferred_regs =3D output_pref(op, 0); ots =3D arg_temp(op->args[0]); ts =3D arg_temp(op->args[1]); =20 @@ -3656,7 +3658,7 @@ static void tcg_reg_alloc_dup(TCGContext *s, const TC= GOp *op) if (IS_DEAD_ARG(1)) { temp_dead(s, its); } - tcg_reg_alloc_do_movi(s, ots, val, arg_life, op->output_pref[0]); + tcg_reg_alloc_do_movi(s, ots, val, arg_life, output_pref(op, 0)); return; } =20 @@ -3673,7 +3675,7 @@ static void tcg_reg_alloc_dup(TCGContext *s, const TC= GOp *op) tcg_regset_set_reg(allocated_regs, its->reg); } oreg =3D tcg_reg_alloc(s, dup_out_regs, allocated_regs, - op->output_pref[0], ots->indirect_base); + output_pref(op, 0), ots->indirect_base); set_temp_val_reg(s, ots, oreg); } =20 @@ -3792,7 +3794,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCG= Op *op) switch (arg_ct->pair) { case 0: /* not paired */ if (arg_ct->ialias) { - i_preferred_regs =3D op->output_pref[arg_ct->alias_index]; + i_preferred_regs =3D output_pref(op, arg_ct->alias_index); =20 /* * If the input is not dead after the instruction, @@ -3839,7 +3841,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCG= Op *op) * and to identify a few cases where it's not required. */ if (arg_ct->ialias) { - i_preferred_regs =3D op->output_pref[arg_ct->alias_index]; + i_preferred_regs =3D output_pref(op, arg_ct->alias_index); if (IS_DEAD_ARG(i1) && IS_DEAD_ARG(i2) && ts->val_type =3D=3D TEMP_VAL_REG && @@ -3873,7 +3875,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCG= Op *op) =20 case 3: /* ialias with second output, no first input */ tcg_debug_assert(arg_ct->ialias); - i_preferred_regs =3D op->output_pref[arg_ct->alias_index]; + i_preferred_regs =3D output_pref(op, arg_ct->alias_index); =20 if (IS_DEAD_ARG(i) && ts->val_type =3D=3D TEMP_VAL_REG && @@ -3996,10 +3998,10 @@ static void tcg_reg_alloc_op(TCGContext *s, const T= CGOp *op) } else if (arg_ct->newreg) { reg =3D tcg_reg_alloc(s, arg_ct->regs, i_allocated_regs | o_allocated_reg= s, - op->output_pref[k], ts->indirect_b= ase); + output_pref(op, k), ts->indirect_b= ase); } else { reg =3D tcg_reg_alloc(s, arg_ct->regs, o_allocated_reg= s, - op->output_pref[k], ts->indirect_b= ase); + output_pref(op, k), ts->indirect_b= ase); } break; =20 @@ -4010,7 +4012,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCG= Op *op) break; } reg =3D tcg_reg_alloc_pair(s, arg_ct->regs, o_allocated_re= gs, - op->output_pref[k], ts->indirect_= base); + output_pref(op, k), ts->indirect_= base); break; =20 case 2: /* second of pair */ @@ -4093,7 +4095,7 @@ static bool tcg_reg_alloc_dup2(TCGContext *s, const T= CGOp *op) } =20 oreg =3D tcg_reg_alloc(s, dup_out_regs, allocated_regs, - op->output_pref[0], ots->indirect_base); + output_pref(op, 0), ots->indirect_base); set_temp_val_reg(s, ots, oreg); } =20 --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.57 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=hFGdfH9Exe9vvvIsZBHNXigQ9ObSxwEtO7Zp3s7BJGI=; b=D5LhEzpO1ozzz7vkzhCsl7rfm6citYbKlW9wNmNZl/zNRUkFgHYPz0ve68FS4k7QMG ug8JUYBYFEst0mFWNvG4U29CeA/VCIlKSgXthCSQqGVazNCjqyRf5WVsjWAd0iN2Zq4G Auk4WNjQ/QiE094anTsGDIwu6W3sy59hFgiBS/mvAMNIam67T/QsuJCJ+FY3u0efRpAC 3+9hageU540kFY+/8Rgsj/FJUGFu7ep+3zDz4V5QokztcyXol3tdpvwzsR5sJIeKfx8q 56r9eH/RhQyyX7W6pcOfSrLgeHdHEKeAuScSQzOtRGMwX4L9TKjlXiFUITj1jiwOCVR4 8pzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hFGdfH9Exe9vvvIsZBHNXigQ9ObSxwEtO7Zp3s7BJGI=; b=CulOVcLKEQcLTNsZ4z9ZL9Hs2TYiJeY+lFQYTGQ7IPpKU2XZXJUz3R99gaaAuH8GDc Kd55K7jZKlmr+BXawMOA71HlaAPPIT/XdehOUvhpqFZ7CIJYfmFd13wvHvrGkzoH7gcZ 5vbDbjyGtOD67xXaCMsx9c5Kc09FlMMxYOjTGPaKKbux49XCv82QH5zt2Na3aiv9Sjvd 4jqDGpVJNvOpA3e4nu793FkVAxBv0ZDoX2RREFmU6Lp1KKIIbRCUzJcdJzVYqzIlN6oT tRDjTeCpR9VDVfDL+z8Okabh/ao9etuBIVFt/PfETAIFPuAkxCPx7VM12+xs51dlWT/t cDxA== X-Gm-Message-State: AFqh2kpsf+aw7N9CM7BcbrtLWXWW8mgIGw4z1lNuCnDS/APYTOERHAvO zWW/EEE+Cm2aWxKX4i7XEx6+vXW15feuZUIM X-Google-Smtp-Source: AMrXdXtNGvvS5Ey1ns8ZdWAZcjhF9yjqNgbN8doMm4XMkoALkoVbM4D3Xb5UdYdy2QIsf5mdkeumZg== X-Received: by 2002:a17:902:ec89:b0:185:441e:2314 with SMTP id x9-20020a170902ec8900b00185441e2314mr42798889plg.10.1672358577893; Thu, 29 Dec 2022 16:02:57 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 38/47] tcg: Reorg function calls Date: Thu, 29 Dec 2022 16:02:12 -0800 Message-Id: <20221230000221.2764875-39-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359052802000003 Content-Type: text/plain; charset="utf-8" Pre-compute the function call layout for each helper at startup. Drop TCG_CALL_DUMMY_ARG, as we no longer need to leave gaps in the op->args[] array. This allows several places to stop checking for NULL TCGTemp, to which TCG_CALL_DUMMY_ARG mapped. For tcg_gen_callN, loop over the arguments once. Allocate the TCGOp for the call early but delay emitting it, collecting arguments first. This allows the argument processing loop to emit code for extensions and have them sequenced before the call. For tcg_reg_alloc_call, loop over the arguments in reverse order, which allows stack slots to be filled first naturally. Signed-off-by: Richard Henderson --- include/exec/helper-head.h | 2 + include/tcg/tcg.h | 5 +- tcg/tcg-internal.h | 22 +- tcg/optimize.c | 6 +- tcg/tcg.c | 609 ++++++++++++++++++++++--------------- 5 files changed, 394 insertions(+), 250 deletions(-) diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h index 8bdf0f6ea2..bc6698b19f 100644 --- a/include/exec/helper-head.h +++ b/include/exec/helper-head.h @@ -133,4 +133,6 @@ #define DEF_HELPER_7(name, ret, t1, t2, t3, t4, t5, t6, t7) \ DEF_HELPER_FLAGS_7(name, 0, ret, t1, t2, t3, t4, t5, t6, t7) =20 +/* MAX_CALL_IARGS must be set to n if last entry is DEF_HELPER_FLAGS_n. */ + #endif /* EXEC_HELPER_HEAD_H */ diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index a6310b898f..b949d75fdd 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -38,6 +38,8 @@ /* XXX: make safe guess about sizes */ #define MAX_OP_PER_INSTR 266 =20 +#define MAX_CALL_IARGS 7 + #define CPU_TEMP_BUF_NLONGS 128 #define TCG_STATIC_FRAME_SIZE (CPU_TEMP_BUF_NLONGS * sizeof(long)) =20 @@ -411,9 +413,6 @@ typedef TCGv_ptr TCGv_env; #define TCG_CALL_NO_RWG_SE (TCG_CALL_NO_RWG | TCG_CALL_NO_SE) #define TCG_CALL_NO_WG_SE (TCG_CALL_NO_WG | TCG_CALL_NO_SE) =20 -/* Used to align parameters. See the comment before tcgv_i32_temp. */ -#define TCG_CALL_DUMMY_ARG ((TCGArg)0) - /* * Flags for the bswap opcodes. * If IZ, the input is zero-extended, otherwise unknown. diff --git a/tcg/tcg-internal.h b/tcg/tcg-internal.h index f574743ff8..c7e87e193d 100644 --- a/tcg/tcg-internal.h +++ b/tcg/tcg-internal.h @@ -42,11 +42,29 @@ typedef enum { TCG_CALL_ARG_EXTEND_S, /* ... as a sign-extended i64 */ } TCGCallArgumentKind; =20 +typedef struct TCGCallArgumentLoc { + TCGCallArgumentKind kind : 8; + unsigned arg_slot : 8; + unsigned ref_slot : 8; + unsigned arg_idx : 4; + unsigned tmp_subindex : 2; +} TCGCallArgumentLoc; + +/* Avoid "unsigned < 0 is always false" Werror, when iarg_regs is empty. */ +#define REG_P(L) \ + ((int)(L)->arg_slot < (int)ARRAY_SIZE(tcg_target_call_iarg_regs)) + typedef struct TCGHelperInfo { void *func; const char *name; - unsigned flags; - unsigned typemask; + unsigned typemask : 32; + unsigned flags : 8; + unsigned nr_in : 8; + unsigned nr_out : 8; + TCGCallReturnKind out_kind : 8; + + /* Maximum physical arguments are constrained by TCG_TYPE_I128. */ + TCGCallArgumentLoc in[MAX_CALL_IARGS * (128 / TCG_TARGET_REG_BITS)]; } TCGHelperInfo; =20 extern TCGContext tcg_init_ctx; diff --git a/tcg/optimize.c b/tcg/optimize.c index 1afd50175b..763bca9ea6 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -667,9 +667,7 @@ static void init_arguments(OptContext *ctx, TCGOp *op, = int nb_args) { for (int i =3D 0; i < nb_args; i++) { TCGTemp *ts =3D arg_temp(op->args[i]); - if (ts) { - init_ts_info(ctx, ts); - } + init_ts_info(ctx, ts); } } =20 @@ -680,7 +678,7 @@ static void copy_propagate(OptContext *ctx, TCGOp *op, =20 for (int i =3D nb_oargs; i < nb_oargs + nb_iargs; i++) { TCGTemp *ts =3D arg_temp(op->args[i]); - if (ts && ts_is_copy(ts)) { + if (ts_is_copy(ts)) { op->args[i] =3D temp_arg(find_better_copy(s, ts)); } } diff --git a/tcg/tcg.c b/tcg/tcg.c index b84cc3cad3..0976cfb215 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -547,7 +547,7 @@ void tcg_pool_reset(TCGContext *s) =20 #include "exec/helper-proto.h" =20 -static const TCGHelperInfo all_helpers[] =3D { +static TCGHelperInfo all_helpers[] =3D { #include "exec/helper-tcg.h" }; static GHashTable *helper_table; @@ -565,6 +565,154 @@ static ffi_type * const typecode_to_ffi[8] =3D { }; #endif =20 +typedef struct TCGCumulativeArgs { + int arg_idx; /* tcg_gen_callN args[] */ + int info_in_idx; /* TCGHelperInfo in[] */ + int arg_slot; /* regs+stack slot */ + int ref_slot; /* stack slots for references */ +} TCGCumulativeArgs; + +static void layout_arg_even(TCGCumulativeArgs *cum) +{ + cum->arg_slot +=3D cum->arg_slot & 1; +} + +static void layout_arg_1(TCGCumulativeArgs *cum, TCGHelperInfo *info, + TCGCallArgumentKind kind) +{ + TCGCallArgumentLoc *loc =3D &info->in[cum->info_in_idx]; + + *loc =3D (TCGCallArgumentLoc){ + .kind =3D kind, + .arg_idx =3D cum->arg_idx, + .arg_slot =3D cum->arg_slot, + }; + cum->info_in_idx++; + cum->arg_slot++; +} + +static void layout_arg_normal_n(TCGCumulativeArgs *cum, + TCGHelperInfo *info, int n) +{ + TCGCallArgumentLoc *loc =3D &info->in[cum->info_in_idx]; + + for (int i =3D 0; i < n; ++i) { + /* Layout all using the same arg_idx, adjusting the subindex. */ + loc[i] =3D (TCGCallArgumentLoc){ + .kind =3D TCG_CALL_ARG_NORMAL, + .arg_idx =3D cum->arg_idx, + .tmp_subindex =3D i, + .arg_slot =3D cum->arg_slot + i, + }; + } + cum->info_in_idx +=3D n; + cum->arg_slot +=3D n; +} + +static void init_call_layout(TCGHelperInfo *info) +{ + int max_reg_slots =3D ARRAY_SIZE(tcg_target_call_iarg_regs); + int max_stk_slots =3D TCG_STATIC_CALL_ARGS_SIZE / sizeof(tcg_target_lo= ng); + unsigned typemask =3D info->typemask; + unsigned typecode; + TCGCumulativeArgs cum =3D { }; + + /* + * Parse and place any function return value. + */ + typecode =3D typemask & 7; + switch (typecode) { + case dh_typecode_void: + info->nr_out =3D 0; + break; + case dh_typecode_i32: + case dh_typecode_s32: + case dh_typecode_ptr: + info->nr_out =3D 1; + info->out_kind =3D TCG_CALL_RET_NORMAL; + break; + case dh_typecode_i64: + case dh_typecode_s64: + info->nr_out =3D 64 / TCG_TARGET_REG_BITS; + info->out_kind =3D TCG_CALL_RET_NORMAL; + break; + default: + g_assert_not_reached(); + } + assert(info->nr_out <=3D ARRAY_SIZE(tcg_target_call_oarg_regs)); + + /* + * Parse and place function arguments. + */ + for (typemask >>=3D 3; typemask; typemask >>=3D 3, cum.arg_idx++) { + TCGCallArgumentKind kind; + TCGType type; + + typecode =3D typemask & 7; + switch (typecode) { + case dh_typecode_i32: + case dh_typecode_s32: + type =3D TCG_TYPE_I32; + break; + case dh_typecode_i64: + case dh_typecode_s64: + type =3D TCG_TYPE_I64; + break; + case dh_typecode_ptr: + type =3D TCG_TYPE_PTR; + break; + default: + g_assert_not_reached(); + } + + switch (type) { + case TCG_TYPE_I32: + switch (TCG_TARGET_CALL_ARG_I32) { + case TCG_CALL_ARG_EVEN: + layout_arg_even(&cum); + /* fall through */ + case TCG_CALL_ARG_NORMAL: + layout_arg_1(&cum, info, TCG_CALL_ARG_NORMAL); + break; + case TCG_CALL_ARG_EXTEND: + kind =3D TCG_CALL_ARG_EXTEND_U + (typecode & 1); + layout_arg_1(&cum, info, kind); + break; + default: + qemu_build_not_reached(); + } + break; + + case TCG_TYPE_I64: + switch (TCG_TARGET_CALL_ARG_I64) { + case TCG_CALL_ARG_EVEN: + layout_arg_even(&cum); + /* fall through */ + case TCG_CALL_ARG_NORMAL: + if (TCG_TARGET_REG_BITS =3D=3D 32) { + layout_arg_normal_n(&cum, info, 2); + } else { + layout_arg_1(&cum, info, TCG_CALL_ARG_NORMAL); + } + break; + default: + qemu_build_not_reached(); + } + break; + + default: + g_assert_not_reached(); + } + } + info->nr_in =3D cum.info_in_idx; + + /* Validate that we didn't overrun the input array. */ + assert(cum.info_in_idx <=3D ARRAY_SIZE(info->in)); + /* Validate the backend has enough argument space. */ + assert(cum.arg_slot <=3D max_reg_slots + max_stk_slots); + assert(cum.ref_slot <=3D max_stk_slots); +} + static int indirect_reg_alloc_order[ARRAY_SIZE(tcg_target_reg_alloc_order)= ]; static void process_op_defs(TCGContext *s); static TCGTemp *tcg_global_reg_new_internal(TCGContext *s, TCGType type, @@ -604,6 +752,7 @@ static void tcg_context_init(unsigned max_cpus) helper_table =3D g_hash_table_new(NULL, NULL); =20 for (i =3D 0; i < ARRAY_SIZE(all_helpers); ++i) { + init_call_layout(&all_helpers[i]); g_hash_table_insert(helper_table, (gpointer)all_helpers[i].func, (gpointer)&all_helpers[i]); } @@ -1474,18 +1623,19 @@ bool tcg_op_supported(TCGOpcode op) } } =20 -/* Note: we convert the 64 bit args to 32 bit and do some alignment - and endian swap. Maybe it would be better to do the alignment - and endian swap in tcg_reg_alloc_call(). */ +static TCGOp *tcg_op_alloc(TCGOpcode opc, unsigned nargs); + void tcg_gen_callN(void *func, TCGTemp *ret, int nargs, TCGTemp **args) { - int i, real_args, nb_rets, pi, max_args; - unsigned typemask; const TCGHelperInfo *info; + TCGv_i64 extend_free[MAX_CALL_IARGS]; + int n_extend =3D 0; TCGOp *op; + int i, n, pi =3D 0, total_args; =20 info =3D g_hash_table_lookup(helper_table, (gpointer)func); - typemask =3D info->typemask; + total_args =3D info->nr_out + info->nr_in + 2; + op =3D tcg_op_alloc(INDEX_op_call, total_args); =20 #ifdef CONFIG_PLUGIN /* detect non-plugin helpers */ @@ -1494,119 +1644,65 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int n= args, TCGTemp **args) } #endif =20 - if (TCG_TARGET_CALL_ARG_I32 =3D=3D TCG_CALL_ARG_EXTEND) { - for (i =3D 0; i < nargs; ++i) { - int argtype =3D extract32(typemask, (i + 1) * 3, 3); - bool is_32bit =3D (argtype & ~1) =3D=3D dh_typecode_i32; - bool is_signed =3D argtype & 1; + TCGOP_CALLO(op) =3D n =3D info->nr_out; + switch (n) { + case 0: + tcg_debug_assert(ret =3D=3D NULL); + break; + case 1: + tcg_debug_assert(ret !=3D NULL); + op->args[pi++] =3D temp_arg(ret); + break; + case 2: + tcg_debug_assert(ret !=3D NULL); + tcg_debug_assert(ret->base_type =3D=3D ret->type + 1); + tcg_debug_assert(ret->temp_subindex =3D=3D 0); + op->args[pi++] =3D temp_arg(ret); + op->args[pi++] =3D temp_arg(ret + 1); + break; + default: + g_assert_not_reached(); + } =20 - if (is_32bit) { + TCGOP_CALLI(op) =3D n =3D info->nr_in; + for (i =3D 0; i < n; i++) { + const TCGCallArgumentLoc *loc =3D &info->in[i]; + TCGTemp *ts =3D args[loc->arg_idx] + loc->tmp_subindex; + + switch (loc->kind) { + case TCG_CALL_ARG_NORMAL: + op->args[pi++] =3D temp_arg(ts); + break; + + case TCG_CALL_ARG_EXTEND_U: + case TCG_CALL_ARG_EXTEND_S: + { TCGv_i64 temp =3D tcg_temp_new_i64(); - TCGv_i32 orig =3D temp_tcgv_i32(args[i]); - if (is_signed) { + TCGv_i32 orig =3D temp_tcgv_i32(ts); + + if (loc->kind =3D=3D TCG_CALL_ARG_EXTEND_S) { tcg_gen_ext_i32_i64(temp, orig); } else { tcg_gen_extu_i32_i64(temp, orig); } - args[i] =3D tcgv_i64_temp(temp); + op->args[pi++] =3D tcgv_i64_arg(temp); + extend_free[n_extend++] =3D temp; } - } - } - - /* - * A Call op needs up to 4 + 2N parameters on 32-bit archs, - * and up to 4 + N parameters on 64-bit archs - * (N =3D number of input arguments + output arguments). - */ - max_args =3D (64 / TCG_TARGET_REG_BITS) * nargs + 4; - op =3D tcg_emit_op(INDEX_op_call, max_args); - - pi =3D 0; - if (ret !=3D NULL) { - if (TCG_TARGET_REG_BITS < 64 && (typemask & 6) =3D=3D dh_typecode_= i64) { - op->args[pi++] =3D temp_arg(ret); - op->args[pi++] =3D temp_arg(ret + 1); - nb_rets =3D 2; - } else { - op->args[pi++] =3D temp_arg(ret); - nb_rets =3D 1; - } - } else { - nb_rets =3D 0; - } - TCGOP_CALLO(op) =3D nb_rets; - - real_args =3D 0; - for (i =3D 0; i < nargs; i++) { - int argtype =3D extract32(typemask, (i + 1) * 3, 3); - TCGCallArgumentKind kind; - TCGType type; - - switch (argtype) { - case dh_typecode_i32: - case dh_typecode_s32: - type =3D TCG_TYPE_I32; break; - case dh_typecode_i64: - case dh_typecode_s64: - type =3D TCG_TYPE_I64; - break; - case dh_typecode_ptr: - type =3D TCG_TYPE_PTR; - break; - default: - g_assert_not_reached(); - } =20 - switch (type) { - case TCG_TYPE_I32: - kind =3D TCG_TARGET_CALL_ARG_I32; - break; - case TCG_TYPE_I64: - kind =3D TCG_TARGET_CALL_ARG_I64; - break; - default: - g_assert_not_reached(); - } - - switch (kind) { - case TCG_CALL_ARG_EVEN: - if (real_args & 1) { - op->args[pi++] =3D TCG_CALL_DUMMY_ARG; - real_args++; - } - /* fall through */ - case TCG_CALL_ARG_NORMAL: - if (TCG_TARGET_REG_BITS =3D=3D 32 && type =3D=3D TCG_TYPE_I64)= { - op->args[pi++] =3D temp_arg(args[i]); - op->args[pi++] =3D temp_arg(args[i] + 1); - real_args +=3D 2; - break; - } - op->args[pi++] =3D temp_arg(args[i]); - real_args++; - break; default: g_assert_not_reached(); } } op->args[pi++] =3D (uintptr_t)func; op->args[pi++] =3D (uintptr_t)info; - TCGOP_CALLI(op) =3D real_args; + tcg_debug_assert(pi =3D=3D total_args); =20 - /* Make sure the fields didn't overflow. */ - tcg_debug_assert(TCGOP_CALLI(op) =3D=3D real_args); - tcg_debug_assert(pi <=3D max_args); + QTAILQ_INSERT_TAIL(&tcg_ctx->ops, op, link); =20 - if (TCG_TARGET_CALL_ARG_I32 =3D=3D TCG_CALL_ARG_EXTEND) { - for (i =3D 0; i < nargs; ++i) { - int argtype =3D extract32(typemask, (i + 1) * 3, 3); - bool is_32bit =3D (argtype & ~1) =3D=3D dh_typecode_i32; - - if (is_32bit) { - tcg_temp_free_internal(args[i]); - } - } + tcg_debug_assert(n_extend < ARRAY_SIZE(extend_free)); + for (i =3D 0; i < n_extend; ++i) { + tcg_temp_free_i64(extend_free[i]); } } =20 @@ -1822,10 +1918,7 @@ static void tcg_dump_ops(TCGContext *s, FILE *f, boo= l have_prefs) } for (i =3D 0; i < nb_iargs; i++) { TCGArg arg =3D op->args[nb_oargs + i]; - const char *t =3D ""; - if (arg !=3D TCG_CALL_DUMMY_ARG) { - t =3D tcg_get_arg_str(s, buf, sizeof(buf), arg); - } + const char *t =3D tcg_get_arg_str(s, buf, sizeof(buf), arg= ); col +=3D ne_fprintf(f, ",%s", t); } } else { @@ -2606,12 +2699,11 @@ static void liveness_pass_1(TCGContext *s) switch (opc) { case INDEX_op_call: { - int call_flags; - int nb_call_regs; + const TCGHelperInfo *info =3D tcg_call_info(op); + int call_flags =3D tcg_call_flags(op); =20 nb_oargs =3D TCGOP_CALLO(op); nb_iargs =3D TCGOP_CALLI(op); - call_flags =3D tcg_call_flags(op); =20 /* pure functions can be removed if their result is unused= */ if (call_flags & TCG_CALL_NO_SIDE_EFFECTS) { @@ -2651,7 +2743,7 @@ static void liveness_pass_1(TCGContext *s) /* Record arguments that die in this helper. */ for (i =3D nb_oargs; i < nb_iargs + nb_oargs; i++) { ts =3D arg_temp(op->args[i]); - if (ts && ts->state & TS_DEAD) { + if (ts->state & TS_DEAD) { arg_life |=3D DEAD_ARG << i; } } @@ -2659,31 +2751,59 @@ static void liveness_pass_1(TCGContext *s) /* For all live registers, remove call-clobbered prefs. */ la_cross_call(s, nb_temps); =20 - nb_call_regs =3D ARRAY_SIZE(tcg_target_call_iarg_regs); + /* + * Input arguments are live for preceding opcodes. + * + * For those arguments that die, and will be allocated in + * registers, clear the register set for that arg, to be + * filled in below. For args that will be on the stack, + * reset to any available reg. Process arguments in rever= se + * order so that if a temp is used more than once, the sta= ck + * reset to max happens before the register reset to 0. + */ + for (i =3D nb_iargs - 1; i >=3D 0; i--) { + const TCGCallArgumentLoc *loc =3D &info->in[i]; + ts =3D arg_temp(op->args[nb_oargs + i]); =20 - /* Input arguments are live for preceding opcodes. */ - for (i =3D 0; i < nb_iargs; i++) { - ts =3D arg_temp(op->args[i + nb_oargs]); - if (ts && ts->state & TS_DEAD) { - /* For those arguments that die, and will be alloc= ated - * in registers, clear the register set for that a= rg, - * to be filled in below. For args that will be on - * the stack, reset to any available reg. - */ - *la_temp_pref(ts) - =3D (i < nb_call_regs ? 0 : - tcg_target_available_regs[ts->type]); + if (ts->state & TS_DEAD) { + switch (loc->kind) { + case TCG_CALL_ARG_NORMAL: + case TCG_CALL_ARG_EXTEND_U: + case TCG_CALL_ARG_EXTEND_S: + if (REG_P(loc)) { + *la_temp_pref(ts) =3D 0; + break; + } + /* fall through */ + default: + *la_temp_pref(ts) =3D + tcg_target_available_regs[ts->type]; + break; + } ts->state &=3D ~TS_DEAD; } } =20 - /* For each input argument, add its input register to pref= s. - If a temp is used once, this produces a single set bit.= */ - for (i =3D 0; i < MIN(nb_call_regs, nb_iargs); i++) { - ts =3D arg_temp(op->args[i + nb_oargs]); - if (ts) { - tcg_regset_set_reg(*la_temp_pref(ts), - tcg_target_call_iarg_regs[i]); + /* + * For each input argument, add its input register to pref= s. + * If a temp is used once, this produces a single set bit; + * if a temp is used multiple times, this produces a set. + */ + for (i =3D 0; i < nb_iargs; i++) { + const TCGCallArgumentLoc *loc =3D &info->in[i]; + ts =3D arg_temp(op->args[nb_oargs + i]); + + switch (loc->kind) { + case TCG_CALL_ARG_NORMAL: + case TCG_CALL_ARG_EXTEND_U: + case TCG_CALL_ARG_EXTEND_S: + if (REG_P(loc)) { + tcg_regset_set_reg(*la_temp_pref(ts), + tcg_target_call_iarg_regs[loc->arg_slot]); + } + break; + default: + break; } } } @@ -2954,21 +3074,19 @@ static bool liveness_pass_2(TCGContext *s) /* Make sure that input arguments are available. */ for (i =3D nb_oargs; i < nb_iargs + nb_oargs; i++) { arg_ts =3D arg_temp(op->args[i]); - if (arg_ts) { - dir_ts =3D arg_ts->state_ptr; - if (dir_ts && arg_ts->state =3D=3D TS_DEAD) { - TCGOpcode lopc =3D (arg_ts->type =3D=3D TCG_TYPE_I32 - ? INDEX_op_ld_i32 - : INDEX_op_ld_i64); - TCGOp *lop =3D tcg_op_insert_before(s, op, lopc, 3); + dir_ts =3D arg_ts->state_ptr; + if (dir_ts && arg_ts->state =3D=3D TS_DEAD) { + TCGOpcode lopc =3D (arg_ts->type =3D=3D TCG_TYPE_I32 + ? INDEX_op_ld_i32 + : INDEX_op_ld_i64); + TCGOp *lop =3D tcg_op_insert_before(s, op, lopc, 3); =20 - lop->args[0] =3D temp_arg(dir_ts); - lop->args[1] =3D temp_arg(arg_ts->mem_base); - lop->args[2] =3D arg_ts->mem_offset; + lop->args[0] =3D temp_arg(dir_ts); + lop->args[1] =3D temp_arg(arg_ts->mem_base); + lop->args[2] =3D arg_ts->mem_offset; =20 - /* Loaded, but synced with memory. */ - arg_ts->state =3D TS_MEM; - } + /* Loaded, but synced with memory. */ + arg_ts->state =3D TS_MEM; } } =20 @@ -2977,14 +3095,12 @@ static bool liveness_pass_2(TCGContext *s) so that we reload when needed. */ for (i =3D nb_oargs; i < nb_iargs + nb_oargs; i++) { arg_ts =3D arg_temp(op->args[i]); - if (arg_ts) { - dir_ts =3D arg_ts->state_ptr; - if (dir_ts) { - op->args[i] =3D temp_arg(dir_ts); - changes =3D true; - if (IS_DEAD_ARG(i)) { - arg_ts->state =3D TS_DEAD; - } + dir_ts =3D arg_ts->state_ptr; + if (dir_ts) { + op->args[i] =3D temp_arg(dir_ts); + changes =3D true; + if (IS_DEAD_ARG(i)) { + arg_ts->state =3D TS_DEAD; } } } @@ -4150,106 +4266,107 @@ static bool tcg_reg_alloc_dup2(TCGContext *s, con= st TCGOp *op) return true; } =20 +static void load_arg_reg(TCGContext *s, TCGReg reg, TCGTemp *ts, + TCGRegSet allocated_regs) +{ + if (ts->val_type =3D=3D TEMP_VAL_REG) { + if (ts->reg !=3D reg) { + tcg_reg_free(s, reg, allocated_regs); + if (!tcg_out_mov(s, ts->type, reg, ts->reg)) { + /* + * Cross register class move not supported. Sync the + * temp back to its slot and load from there. + */ + temp_sync(s, ts, allocated_regs, 0, 0); + tcg_out_ld(s, ts->type, reg, + ts->mem_base->reg, ts->mem_offset); + } + } + } else { + TCGRegSet arg_set =3D 0; + + tcg_reg_free(s, reg, allocated_regs); + tcg_regset_set_reg(arg_set, reg); + temp_load(s, ts, arg_set, allocated_regs, 0); + } +} + +static void load_arg_stk(TCGContext *s, int stk_slot, TCGTemp *ts, + TCGRegSet allocated_regs) +{ + /* + * When the destination is on the stack, load up the temp and store. + * If there are many call-saved registers, the temp might live to + * see another use; otherwise it'll be discarded. + */ + temp_load(s, ts, tcg_target_available_regs[ts->type], allocated_regs, = 0); + tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, + TCG_TARGET_CALL_STACK_OFFSET + + stk_slot * sizeof(tcg_target_long)); +} + +static void load_arg_normal(TCGContext *s, const TCGCallArgumentLoc *l, + TCGTemp *ts, TCGRegSet *allocated_regs) +{ + if (REG_P(l)) { + TCGReg reg =3D tcg_target_call_iarg_regs[l->arg_slot]; + load_arg_reg(s, reg, ts, *allocated_regs); + tcg_regset_set_reg(*allocated_regs, reg); + } else { + load_arg_stk(s, l->arg_slot - ARRAY_SIZE(tcg_target_call_iarg_regs= ), + ts, *allocated_regs); + } +} + static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op) { const int nb_oargs =3D TCGOP_CALLO(op); const int nb_iargs =3D TCGOP_CALLI(op); const TCGLifeData arg_life =3D op->life; - const TCGHelperInfo *info; - int flags, nb_regs, i; - TCGReg reg; - TCGArg arg; - TCGTemp *ts; - intptr_t stack_offset; - size_t call_stack_size; - tcg_insn_unit *func_addr; - int allocate_args; - TCGRegSet allocated_regs; + const TCGHelperInfo *info =3D tcg_call_info(op); + TCGRegSet allocated_regs =3D s->reserved_regs; + int i; =20 - func_addr =3D tcg_call_func(op); - info =3D tcg_call_info(op); - flags =3D info->flags; + /* + * Move inputs into place in reverse order, + * so that we place stacked arguments first. + */ + for (i =3D nb_iargs - 1; i >=3D 0; --i) { + const TCGCallArgumentLoc *loc =3D &info->in[i]; + TCGTemp *ts =3D arg_temp(op->args[nb_oargs + i]); =20 - nb_regs =3D ARRAY_SIZE(tcg_target_call_iarg_regs); - if (nb_regs > nb_iargs) { - nb_regs =3D nb_iargs; - } - - /* assign stack slots first */ - call_stack_size =3D (nb_iargs - nb_regs) * sizeof(tcg_target_long); - call_stack_size =3D (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) & - ~(TCG_TARGET_STACK_ALIGN - 1); - allocate_args =3D (call_stack_size > TCG_STATIC_CALL_ARGS_SIZE); - if (allocate_args) { - /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed, - preallocate call stack */ - tcg_abort(); - } - - stack_offset =3D TCG_TARGET_CALL_STACK_OFFSET; - for (i =3D nb_regs; i < nb_iargs; i++) { - arg =3D op->args[nb_oargs + i]; - if (arg !=3D TCG_CALL_DUMMY_ARG) { - ts =3D arg_temp(arg); - temp_load(s, ts, tcg_target_available_regs[ts->type], - s->reserved_regs, 0); - tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_off= set); - } - stack_offset +=3D sizeof(tcg_target_long); - } - - /* assign input registers */ - allocated_regs =3D s->reserved_regs; - for (i =3D 0; i < nb_regs; i++) { - arg =3D op->args[nb_oargs + i]; - if (arg !=3D TCG_CALL_DUMMY_ARG) { - ts =3D arg_temp(arg); - reg =3D tcg_target_call_iarg_regs[i]; - - if (ts->val_type =3D=3D TEMP_VAL_REG) { - if (ts->reg !=3D reg) { - tcg_reg_free(s, reg, allocated_regs); - if (!tcg_out_mov(s, ts->type, reg, ts->reg)) { - /* - * Cross register class move not supported. Sync = the - * temp back to its slot and load from there. - */ - temp_sync(s, ts, allocated_regs, 0, 0); - tcg_out_ld(s, ts->type, reg, - ts->mem_base->reg, ts->mem_offset); - } - } - } else { - TCGRegSet arg_set =3D 0; - - tcg_reg_free(s, reg, allocated_regs); - tcg_regset_set_reg(arg_set, reg); - temp_load(s, ts, arg_set, allocated_regs, 0); - } - - tcg_regset_set_reg(allocated_regs, reg); + switch (loc->kind) { + case TCG_CALL_ARG_NORMAL: + case TCG_CALL_ARG_EXTEND_U: + case TCG_CALL_ARG_EXTEND_S: + load_arg_normal(s, loc, ts, &allocated_regs); + break; + default: + g_assert_not_reached(); } } =20 - /* mark dead temporaries and free the associated registers */ + /* Mark dead temporaries and free the associated registers. */ for (i =3D nb_oargs; i < nb_iargs + nb_oargs; i++) { if (IS_DEAD_ARG(i)) { temp_dead(s, arg_temp(op->args[i])); } } =20 - /* clobber call registers */ + /* Clobber call registers. */ for (i =3D 0; i < TCG_TARGET_NB_REGS; i++) { if (tcg_regset_test_reg(tcg_target_call_clobber_regs, i)) { tcg_reg_free(s, i, allocated_regs); } } =20 - /* Save globals if they might be written by the helper, sync them if - they might be read. */ - if (flags & TCG_CALL_NO_READ_GLOBALS) { + /* + * Save globals if they might be written by the helper, + * sync them if they might be read. + */ + if (info->flags & TCG_CALL_NO_READ_GLOBALS) { /* Nothing to do */ - } else if (flags & TCG_CALL_NO_WRITE_GLOBALS) { + } else if (info->flags & TCG_CALL_NO_WRITE_GLOBALS) { sync_globals(s, allocated_regs); } else { save_globals(s, allocated_regs); @@ -4260,25 +4377,35 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp= *op) gpointer hash =3D (gpointer)(uintptr_t)info->typemask; ffi_cif *cif =3D g_hash_table_lookup(ffi_table, hash); assert(cif !=3D NULL); - tcg_out_call(s, func_addr, cif); + tcg_out_call(s, tcg_call_func(op), cif); } #else - tcg_out_call(s, func_addr); + tcg_out_call(s, tcg_call_func(op)); #endif =20 - /* assign output registers and emit moves if needed */ - for(i =3D 0; i < nb_oargs; i++) { - arg =3D op->args[i]; - ts =3D arg_temp(arg); + /* Assign output registers and emit moves if needed. */ + switch (info->out_kind) { + case TCG_CALL_RET_NORMAL: + for (i =3D 0; i < nb_oargs; i++) { + TCGTemp *ts =3D arg_temp(op->args[i]); + TCGReg reg =3D tcg_target_call_oarg_regs[i]; =20 - /* ENV should not be modified. */ - tcg_debug_assert(!temp_readonly(ts)); + /* ENV should not be modified. */ + tcg_debug_assert(!temp_readonly(ts)); =20 - reg =3D tcg_target_call_oarg_regs[i]; - set_temp_val_reg(s, ts, reg); - ts->mem_coherent =3D 0; + set_temp_val_reg(s, ts, reg); + ts->mem_coherent =3D 0; + } + break; + default: + g_assert_not_reached(); + } + + /* Flush or discard output registers as needed. */ + for (i =3D 0; i < nb_oargs; i++) { + TCGTemp *ts =3D arg_temp(op->args[i]); if (NEED_SYNC_ARG(i)) { - temp_sync(s, ts, allocated_regs, 0, IS_DEAD_ARG(i)); + temp_sync(s, ts, s->reserved_regs, 0, IS_DEAD_ARG(i)); } else if (IS_DEAD_ARG(i)) { temp_dead(s, ts); } --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id j14-20020a170903028e00b00192849e1d0asm7343953plr.116.2022.12.29.16.02.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:02:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+c5n6Q4tzmAUtv0QiXx7/gXm6QqnenrSZcl7NsT1wsY=; b=e073BsL5ytf6Jl2kNwBkcUtEjdfrYwWmi2ZxgCHZkCQMa2H09xMUo37EWzOI/Ha6hr 6KM9IGcf1WWZfIq9GxML/Dzk0dnvCgSKX/qfBHPvDtsdulOvZsweTN0S0veDyfnT+WRK 8dsbuPsGpgokwZVwCNBxpsf+myu38Ry/lL80o+aShCYhDFtiFdXxgu7Ro8OYO6TUQoAU VYzZF2l1Yhke4kZr+kCUREW41334+IjMaFUT14WdTdrL+qjGIw6LnUpaY4Iz9SpRQ5pe P/XM1IAlIt7D2HmUlPr20hmEgS0SYDpYmBs+m/zE8E6s1+eODLFW2+cgoE2beO5Ibs8B Pf3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+c5n6Q4tzmAUtv0QiXx7/gXm6QqnenrSZcl7NsT1wsY=; b=D3xueuPidNZGrz4av81jbxWU1YzQkTBNsq+M9hKyVhk7gtu/NxHERUqbyNVc/fqbbK ERLTKEtV7ul+7dWTmWdBWqG4Y5xuTWe8UdTvo20J6Qv6HFeQvo338ITagwQRDFC0BWOW SnJU5ggGOsGFqzkDVo0nSSsXPMrK+1o0L1z0KilNfACoKKEQ1MvPQNIDX6F7EBa3EMyF 8HvkqL6LGLjiAuFgiXdlHcESnCC84qbi4aTvzTlyN7xrz8PBPlXTjnNd83PWjnTKSjSh NDCtq9QLrZFOcfvOpcm3zl2HZ6S0aruXZ5JnSeEMaHsVPLrHYXn++bXy5Qj7TIkwQfN1 UsmQ== X-Gm-Message-State: AFqh2kqsw8VCIh94vJpPrnVXi8qARSrZ++GBYWaraM5wD3oJYpueWQoI ZQYgiLo/+WPRUTnS5JgX/YRcLiJPqL5EfCJ4 X-Google-Smtp-Source: AMrXdXsCJonJXnvEI+u2oZRLBEG4BKbGqojSBcRfW8n308Z29s6rFtxyexSeTVc4R+RfBASOzuqMww== X-Received: by 2002:a17:902:8f86:b0:191:282:5d6c with SMTP id z6-20020a1709028f8600b0019102825d6cmr35485770plo.61.1672358578743; Thu, 29 Dec 2022 16:02:58 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 39/47] tcg: Convert typecode_to_ffi from array to function Date: Thu, 29 Dec 2022 16:02:13 -0800 Message-Id: <20221230000221.2764875-40-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359104634000001 From: Philippe Mathieu-Daud=C3=A9 In the unlikely case of invalid typecode mask, the function will abort instead of returning a NULL pointer. Signed-off-by: Richard Henderson Message-Id: <20221111074101.2069454-27-richard.henderson@linaro.org> [PMD: Split from bigger patch] Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20221122180804.938-2-philmd@linaro.org> --- tcg/tcg.c | 30 ++++++++++++++++++++---------- 1 file changed, 20 insertions(+), 10 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 0976cfb215..60a745c9cd 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -555,14 +555,24 @@ static GHashTable *helper_table; #ifdef CONFIG_TCG_INTERPRETER static GHashTable *ffi_table; =20 -static ffi_type * const typecode_to_ffi[8] =3D { - [dh_typecode_void] =3D &ffi_type_void, - [dh_typecode_i32] =3D &ffi_type_uint32, - [dh_typecode_s32] =3D &ffi_type_sint32, - [dh_typecode_i64] =3D &ffi_type_uint64, - [dh_typecode_s64] =3D &ffi_type_sint64, - [dh_typecode_ptr] =3D &ffi_type_pointer, -}; +static ffi_type *typecode_to_ffi(int argmask) +{ + switch (argmask) { + case dh_typecode_void: + return &ffi_type_void; + case dh_typecode_i32: + return &ffi_type_uint32; + case dh_typecode_s32: + return &ffi_type_sint32; + case dh_typecode_i64: + return &ffi_type_uint64; + case dh_typecode_s64: + return &ffi_type_sint64; + case dh_typecode_ptr: + return &ffi_type_pointer; + } + g_assert_not_reached(); +} #endif =20 typedef struct TCGCumulativeArgs { @@ -779,14 +789,14 @@ static void tcg_context_init(unsigned max_cpus) nargs =3D DIV_ROUND_UP(nargs, 3); =20 ca =3D g_malloc0(sizeof(*ca) + nargs * sizeof(ffi_type *)); - ca->cif.rtype =3D typecode_to_ffi[typemask & 7]; + ca->cif.rtype =3D typecode_to_ffi(typemask & 7); ca->cif.nargs =3D nargs; =20 if (nargs !=3D 0) { ca->cif.arg_types =3D ca->args; for (int j =3D 0; j < nargs; ++j) { int typecode =3D extract32(typemask, (j + 1) * 3, 3); - ca->args[j] =3D typecode_to_ffi[typecode]; + ca->args[j] =3D typecode_to_ffi(typecode); } } =20 --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359278; cv=none; d=zohomail.com; s=zohoarc; b=kVd/keLnnw+R1Sds1oSfBorfN1F6zJFsfJTgZwQsbt6774cCGs48gxprZowwaKJYxN1BnJR/QcdrmPB8j6Z+6iqpaNvi7rtsaAOfpXVh0JlDvjm59IkP3tymhCTO+lnJRe3Xn7BU32/BWeMJRFnBmvJI3vqpQmUhwjf7eOS8uPs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359278; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=IrKLqLX2qUBb8CbspI2Ok/FI/tOS0JvQAeneXvCOOoQ=; b=Mt9pbqxw8TOaEQnEG4rxaQGqYGGKpAOHs2eFC2vB9j9qatXrBtTwF+qQP5wAyt+QqAq1D443OHuFiwmquSmtirYMPzRYxt7sH1Agk351SLAidLLA2/wr6L0mEIKuhWej3R5SIuTNxYyiyyA43IKIPGSDsPz9R5XmSCYvapJz33c= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672359278800301.14930581640954; Thu, 29 Dec 2022 16:14:38 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2uc-0006Vd-9C; Thu, 29 Dec 2022 19:06:14 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2uV-0006Lo-GF for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:06:11 -0500 Received: from mail-pf1-x42a.google.com ([2607:f8b0:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2uQ-0004E7-6L for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:06:05 -0500 Received: by mail-pf1-x42a.google.com with SMTP id a184so2793153pfa.9 for ; Thu, 29 Dec 2022 16:06:01 -0800 (PST) Received: from stoup.. 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42a; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359280124000003 From: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson Message-Id: <20221111074101.2069454-27-richard.henderson@linaro.org> [PMD: Split from bigger patch] Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20221122180804.938-3-philmd@linaro.org> --- tcg/tcg.c | 83 +++++++++++++++++++++++++++++-------------------------- 1 file changed, 44 insertions(+), 39 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 60a745c9cd..cfc0280883 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -573,7 +573,49 @@ static ffi_type *typecode_to_ffi(int argmask) } g_assert_not_reached(); } -#endif + +static void init_ffi_layouts(void) +{ + /* g_direct_hash/equal for direct comparisons on uint32_t. */ + ffi_table =3D g_hash_table_new(NULL, NULL); + for (int i =3D 0; i < ARRAY_SIZE(all_helpers); ++i) { + uint32_t typemask =3D all_helpers[i].typemask; + gpointer hash =3D (gpointer)(uintptr_t)typemask; + struct { + ffi_cif cif; + ffi_type *args[]; + } *ca; + ffi_status status; + int nargs; + + if (g_hash_table_lookup(ffi_table, hash)) { + continue; + } + + /* Ignoring the return type, find the last non-zero field. */ + nargs =3D 32 - clz32(typemask >> 3); + nargs =3D DIV_ROUND_UP(nargs, 3); + + ca =3D g_malloc0(sizeof(*ca) + nargs * sizeof(ffi_type *)); + ca->cif.rtype =3D typecode_to_ffi(typemask & 7); + ca->cif.nargs =3D nargs; + + if (nargs !=3D 0) { + ca->cif.arg_types =3D ca->args; + for (int j =3D 0; j < nargs; ++j) { + int typecode =3D extract32(typemask, (j + 1) * 3, 3); + ca->args[j] =3D typecode_to_ffi(typecode); + } + } + + status =3D ffi_prep_cif(&ca->cif, FFI_DEFAULT_ABI, nargs, + ca->cif.rtype, ca->cif.arg_types); + assert(status =3D=3D FFI_OK); + + g_hash_table_insert(ffi_table, hash, (gpointer)&ca->cif); + } +} +#endif /* CONFIG_TCG_INTERPRETER */ =20 typedef struct TCGCumulativeArgs { int arg_idx; /* tcg_gen_callN args[] */ @@ -768,44 +810,7 @@ static void tcg_context_init(unsigned max_cpus) } =20 #ifdef CONFIG_TCG_INTERPRETER - /* g_direct_hash/equal for direct comparisons on uint32_t. */ - ffi_table =3D g_hash_table_new(NULL, NULL); - for (i =3D 0; i < ARRAY_SIZE(all_helpers); ++i) { - struct { - ffi_cif cif; - ffi_type *args[]; - } *ca; - uint32_t typemask =3D all_helpers[i].typemask; - gpointer hash =3D (gpointer)(uintptr_t)typemask; - ffi_status status; - int nargs; - - if (g_hash_table_lookup(ffi_table, hash)) { - continue; - } - - /* Ignoring the return type, find the last non-zero field. */ - nargs =3D 32 - clz32(typemask >> 3); - nargs =3D DIV_ROUND_UP(nargs, 3); - - ca =3D g_malloc0(sizeof(*ca) + nargs * sizeof(ffi_type *)); - ca->cif.rtype =3D typecode_to_ffi(typemask & 7); - ca->cif.nargs =3D nargs; - - if (nargs !=3D 0) { - ca->cif.arg_types =3D ca->args; - for (int j =3D 0; j < nargs; ++j) { - int typecode =3D extract32(typemask, (j + 1) * 3, 3); - ca->args[j] =3D typecode_to_ffi(typecode); - } - } - - status =3D ffi_prep_cif(&ca->cif, FFI_DEFAULT_ABI, nargs, - ca->cif.rtype, ca->cif.arg_types); - assert(status =3D=3D FFI_OK); - - g_hash_table_insert(ffi_table, hash, (gpointer)&ca->cif); - } + init_ffi_layouts(); #endif =20 tcg_target_init(s); --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359192; cv=none; d=zohomail.com; s=zohoarc; b=SRsIdJ1oumGZohM8TKXrFE9aM7qkbbaW6rNsVKiED7rpOT6mXe5zitEn2M1n9qWLwy2WycU0lkNBjJ1PbAqqOPJuNKRjOMe+ofzH062k18IGQcZi7zH5HzLqR1ylcTJPAPmU0GubsmOSVGqGpKYnSzW1y4gvJaxda7YQEEiDEio= ARC-Message-Signature: i=1; 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id x185-20020a6286c2000000b0056bfebfa6e4sm12586151pfd.190.2022.12.29.16.06.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:06:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vCLzxn0q0XTdpTpZ+mEjL5EuaQDV+OhjoinCv0kOApo=; b=hsq9XH4SOumvEOfb8I1y37Ee+9ZWTSvt78BVA5kJCIESP3QZVoZIm2YDnbLl26e81L VMDU/3rjMKGCRSRgzUU16wsgXnAJs31m7gw3p4cIsqbhFCnJx1QbTLffOpmvsx1fTkVu tlpOKLtabVVJxPyqxVKEfEstK7xMfozcURz9QABMzpnEMTG49EgovJnV+iQDvZ5lUzNu oKPqlGmFQRCL/cwnABP98zS9VktMv+JTKbLsHWdpi7LEh0a1tnHtyBCiR8KxoGvRuGvD bt6DIAjy4QjCzDaTVGdDMA9I4gcEO6vnpiOXcv0cfh6vdNr45WaaB7zzcSsWHi1iWypt 80HQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vCLzxn0q0XTdpTpZ+mEjL5EuaQDV+OhjoinCv0kOApo=; b=UMLneP2vf1Yz3ekhO9PDUAWpDcAcK2qEfHAH1nB3q9RNpmdE7DOe41dOZjqIq6P1Z+ slzvBM9GcBKB0eJ9dG0+IymhZVn3EFd7t5qd9UaxyU8FT7cQ+A9yxpPY1HZNpeMLs5yf eXLJH3DP/BUaILTbeIDpqqVWvh15iy67W461+EMCOEGFdG6aXKEdtTeWR8ruU4+cUHZ7 dNbaJYeJkeTaHvPdxtkPkJeSansI7R3cLx/Srskx3HgNZj7lIQhuYhi4G/tAtPDZVUne D0Y7+HUgkFhajexTS1OjV0OVqY4wF8Da79KMYhQi8Ov+WpEoDVgsPQaONx+e7qB4XBMM lWmA== X-Gm-Message-State: AFqh2koenLIIJW/53zZPe3rw1szta63sBoVAjoSTPGaFdzwEW8tlaCvs UnDL3AWNFlre+q6HansjpHuzk+suuwtbnF94 X-Google-Smtp-Source: AMrXdXs3JZljTZ5EggZ9ZdoOT+7ETdRqj+fK0kL/YfVln9PJSYfCPV7chR5mwlANmK+CET9UIfy/dw== X-Received: by 2002:a05:6a00:168d:b0:577:2a9:ec82 with SMTP id k13-20020a056a00168d00b0057702a9ec82mr38207348pfc.5.1672358761045; Thu, 29 Dec 2022 16:06:01 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 41/47] tcg: Move ffi_cif pointer into TCGHelperInfo Date: Thu, 29 Dec 2022 16:02:15 -0800 Message-Id: <20221230000221.2764875-42-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::429; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359195813000001 Instead of requiring a separate hash table lookup, put a pointer to the CIF into TCGHelperInfo. Signed-off-by: Richard Henderson Message-Id: <20221111074101.2069454-27-richard.henderson@linaro.org> [PMD: Split from bigger patch] Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20221122180804.938-4-philmd@linaro.org> --- tcg/tcg-internal.h | 7 +++++++ tcg/tcg.c | 30 ++++++++++++++---------------- 2 files changed, 21 insertions(+), 16 deletions(-) diff --git a/tcg/tcg-internal.h b/tcg/tcg-internal.h index c7e87e193d..6e50aeba3a 100644 --- a/tcg/tcg-internal.h +++ b/tcg/tcg-internal.h @@ -25,6 +25,10 @@ #ifndef TCG_INTERNAL_H #define TCG_INTERNAL_H =20 +#ifdef CONFIG_TCG_INTERPRETER +#include +#endif + #define TCG_HIGHWATER 1024 =20 /* @@ -57,6 +61,9 @@ typedef struct TCGCallArgumentLoc { typedef struct TCGHelperInfo { void *func; const char *name; +#ifdef CONFIG_TCG_INTERPRETER + ffi_cif *cif; +#endif unsigned typemask : 32; unsigned flags : 8; unsigned nr_in : 8; diff --git a/tcg/tcg.c b/tcg/tcg.c index cfc0280883..76cf26870c 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -62,10 +62,6 @@ #include "tcg/tcg-ldst.h" #include "tcg-internal.h" =20 -#ifdef CONFIG_TCG_INTERPRETER -#include -#endif - /* Forward declarations for functions declared in tcg-target.c.inc and used here. */ static void tcg_target_init(TCGContext *s); @@ -553,8 +549,6 @@ static TCGHelperInfo all_helpers[] =3D { static GHashTable *helper_table; =20 #ifdef CONFIG_TCG_INTERPRETER -static GHashTable *ffi_table; - static ffi_type *typecode_to_ffi(int argmask) { switch (argmask) { @@ -577,9 +571,11 @@ static ffi_type *typecode_to_ffi(int argmask) static void init_ffi_layouts(void) { /* g_direct_hash/equal for direct comparisons on uint32_t. */ - ffi_table =3D g_hash_table_new(NULL, NULL); + GHashTable *ffi_table =3D g_hash_table_new(NULL, NULL); + for (int i =3D 0; i < ARRAY_SIZE(all_helpers); ++i) { - uint32_t typemask =3D all_helpers[i].typemask; + TCGHelperInfo *info =3D &all_helpers[i]; + unsigned typemask =3D info->typemask; gpointer hash =3D (gpointer)(uintptr_t)typemask; struct { ffi_cif cif; @@ -587,8 +583,11 @@ static void init_ffi_layouts(void) } *ca; ffi_status status; int nargs; + ffi_cif *cif; =20 - if (g_hash_table_lookup(ffi_table, hash)) { + cif =3D g_hash_table_lookup(ffi_table, hash); + if (cif) { + info->cif =3D cif; continue; } =20 @@ -612,8 +611,12 @@ static void init_ffi_layouts(void) ca->cif.rtype, ca->cif.arg_types); assert(status =3D=3D FFI_OK); =20 - g_hash_table_insert(ffi_table, hash, (gpointer)&ca->cif); + cif =3D &ca->cif; + info->cif =3D cif; + g_hash_table_insert(ffi_table, hash, (gpointer)cif); } + + g_hash_table_destroy(ffi_table); } #endif /* CONFIG_TCG_INTERPRETER */ =20 @@ -4388,12 +4391,7 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp = *op) } =20 #ifdef CONFIG_TCG_INTERPRETER - { - gpointer hash =3D (gpointer)(uintptr_t)info->typemask; - ffi_cif *cif =3D g_hash_table_lookup(ffi_table, hash); - assert(cif !=3D NULL); - tcg_out_call(s, tcg_call_func(op), cif); - } + tcg_out_call(s, tcg_call_func(op), info->cif); #else tcg_out_call(s, tcg_call_func(op)); #endif --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id x185-20020a6286c2000000b0056bfebfa6e4sm12586151pfd.190.2022.12.29.16.06.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:06:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AOYCCYtPdnKj+yfIPyQ3b3Eju8B6onYQzX1BsWT7Kq0=; b=FrRUf/qcH9Q/WrAN1L7qb4gmwYXQzfjik8G8COMXFrVbQi1bzvLiMOVoTJvdrzGk8r 3ySY/owK9yRO6hJ6K1Dji8hwA8kiLgowIylSm9Ns+eJRX5GKQjsNxv13/CKEqisx5WEb x7UtB3u77G5cMDKqDR0aWNa2t2FsLpCO6wujflfq4WKbEEszXRUVHuPwYd6Cw9FuKnUb yuPgiX9/RX6Mr+UNIkUwie+h5vP9DfbY/J/nxS4d3DZpC52GYNSXolS0KcSSkUiwcS8Z an0eFIZWrsiKljHjyEovWoCr5T6zMGcVr9T8nXwCMCHZyKDKZGp7h3ySqSbeYlc8ksG7 uEeQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AOYCCYtPdnKj+yfIPyQ3b3Eju8B6onYQzX1BsWT7Kq0=; b=BbwuT+2t2SC7MaxshDb9eyaQdKDtte5NUSJqGnece33p8oMXuUhaoLqc5xhqPuJF3g bVxz/XE2rzUja2ib2H64IHqHvgtHPJ8EMKShoUOYv2H7JLcBeBUV7zvF2XtuLY/KLkJI LN7jacKW+H0Zk9TpzVIM4l+rmOjxSD3f0G2S8wZso947URTKGyTOpwj+rPsI5o8NoRs3 B7nzgWniddbTZ5eMwujl2LuaSvHEsRvrRNx1Se2UzcGlKOEgAy6BDi2YjDmXXXC+OXs2 jzoaa26WVmFMsLvFGfbzY3/Ot4/Jbfv0uOx6peW+0fBNVhAo7i84ZQsBgYEpwJFiOIgk RvPg== X-Gm-Message-State: AFqh2ko/INfJlaMDZ/SiQ/nUQcQR/qopKwDs5jMroXz/vpUEGnr1m0QF F6/KIzxKu8DEz81BRnucjagEwp3FjrHg2uWv X-Google-Smtp-Source: AMrXdXvDVXLWWdqrzwX6B0xBGT/ufQrku2PzWW1vFVCsLDy+QiB4FgprJvYfRXKSShqQapd0xCAvtw== X-Received: by 2002:a05:6a20:7da8:b0:a2:c45f:f0fc with SMTP id v40-20020a056a207da800b000a2c45ff0fcmr45394107pzj.27.1672358761898; Thu, 29 Dec 2022 16:06:01 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 42/47] tcg/aarch64: Merge tcg_out_callr into tcg_out_call Date: Thu, 29 Dec 2022 16:02:16 -0800 Message-Id: <20221230000221.2764875-43-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359532218000001 There is only one use, and BLR is perhaps even more self-documentary than CALLR. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.c.inc | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index 344b63e20f..1af879e6f5 100644 --- a/tcg/aarch64/tcg-target.c.inc +++ b/tcg/aarch64/tcg-target.c.inc @@ -1336,11 +1336,6 @@ static void tcg_out_goto_long(TCGContext *s, const t= cg_insn_unit *target) } } =20 -static inline void tcg_out_callr(TCGContext *s, TCGReg reg) -{ - tcg_out_insn(s, 3207, BLR, reg); -} - static void tcg_out_call(TCGContext *s, const tcg_insn_unit *target) { ptrdiff_t offset =3D tcg_pcrel_diff(s, target) >> 2; @@ -1348,7 +1343,7 @@ static void tcg_out_call(TCGContext *s, const tcg_ins= n_unit *target) tcg_out_insn(s, 3206, BL, offset); } else { tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_TMP, (intptr_t)target); - tcg_out_callr(s, TCG_REG_TMP); + tcg_out_insn(s, 3207, BLR, TCG_REG_TMP); } } =20 --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672358867; cv=none; d=zohomail.com; s=zohoarc; b=D0QHDV2ln0stGeAJ3NWEvMaJkfriO1f79dqp85qHuHjuwZiBgC9CFdXozhHOIy2arX7tZ1qcwqLSx4fR+I091v6sVd/C9NompEKjTkOJcBdAabMSQiP7xSapZrDycKx1uC9gkGwsh22jAqyxLIb4wJ14cNvNg4l9aFWpwqHjPoA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672358867; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=c/UaRYOM/RCWtP+imnVkWOQ3CsFDaBLwSi4F8Q8a4e8=; b=BD32ga9/3I0yMnAVgm8X/FCbfIy+zOvIHaTYvTDPFanyHfCoRcsastHB2i8wpWLDx9FFeGTAzAgcWIeVVpBJkQmcxcOuxt9aZ6Bw6OKLrSUH7sLNCq1JX3LNc20RVFpVKUw0mpMVXrLcL1KWSifK9muBb+641+BoFZK/Z/D8jx0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672358867213665.3269610883879; Thu, 29 Dec 2022 16:07:47 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2uk-0006hc-6X; Thu, 29 Dec 2022 19:06:22 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2ui-0006fa-OP for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:06:20 -0500 Received: from mail-pf1-x42d.google.com ([2607:f8b0:4864:20::42d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2uT-0004Et-8C for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:06:20 -0500 Received: by mail-pf1-x42d.google.com with SMTP id a184so2793200pfa.9 for ; Thu, 29 Dec 2022 16:06:04 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id x185-20020a6286c2000000b0056bfebfa6e4sm12586151pfd.190.2022.12.29.16.06.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:06:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=c/UaRYOM/RCWtP+imnVkWOQ3CsFDaBLwSi4F8Q8a4e8=; b=OJ7SK+3/XLmh6L1/LKS9Pmht4SffavhbAe+J47LGRD3hLqWIh3RXFZzHe9Ezkbk2AH 7KL+sqDItVOjswVrNYGHkuF1ze5VcnPekcwIeyLYevgTXNlJGS24yX3CmcUZeCnrxxW/ 60aDnnsuvsMyK8hX/eO12DqYBUE48fnAg/RGb4TLLpnEQ1GXb2baygQf7RM8DPVmnOLD U+8wKNxqma+lB+z8Y3V08qK4aSWsPv0VCW3VHARkGMbWYvSmUbVUUizFN3T5qxS7l+0+ 4NCNRcdSgTlvt0GEaIG6zbBgFEiBGLx4TA2GXKOY0Jehlsi2lFHzVT5Xa4JvHiN+jMNY fQxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=c/UaRYOM/RCWtP+imnVkWOQ3CsFDaBLwSi4F8Q8a4e8=; b=xN4xRSdekchcpfpiwp7dSukwu2xlQPv+tmhLQabA6a4qAfBDqniHLRX9qwt8FVbLHx iEmp5Hu+R+2lWgJCaesifFxIRXZk9F0q1wrZukpHRZ9TmIuiu3gYyfXDd5eL7f94FvJC yY+s6MrRiwXRsIVFBoVsCevQULYs5+mZsOwHiu61uE26m3CW/qYjWnJ6QafVn8Hy/1eh YSoCD6wLYQLje5OhcvA8ZuoWXcrH6f5UL8BBaTv4ckYf+3G1ugsHK50TxmTxQaK/Rv4h KUZCiFgpd6dw/o7lnpmtGmX+U9pxtSxqb62k3X+2d3e9OPC15AUJm11tUVLMVUtYXUhH y32A== X-Gm-Message-State: AFqh2krzh+u/j5t1/amnG0o41e+uKM6YGZft0vPYqRnnOOKhs4/jtZJ5 vIDUt8UChvltOootlH/QeALdzxemvPn1Lfea X-Google-Smtp-Source: AMrXdXsjJ705hzDymasspZtNDAp2eZRGMfEH6fvtX/EGKeCIJm/gaiV3/0NTaAnaoaOe2UoFphxl1A== X-Received: by 2002:aa7:96e1:0:b0:56b:7b9f:5cb6 with SMTP id i1-20020aa796e1000000b0056b7b9f5cb6mr34611768pfq.19.1672358762790; Thu, 29 Dec 2022 16:06:02 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 43/47] tcg: Add TCGHelperInfo argument to tcg_out_call Date: Thu, 29 Dec 2022 16:02:17 -0800 Message-Id: <20221230000221.2764875-44-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42d; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42d.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672358868125000001 This eliminates an ifdef for TCI, and will be required for expanding the call for TCGv_i128. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/tcg.c | 12 ++---------- tcg/aarch64/tcg-target.c.inc | 12 +++++++++--- tcg/arm/tcg-target.c.inc | 10 ++++++++-- tcg/i386/tcg-target.c.inc | 5 +++-- tcg/loongarch64/tcg-target.c.inc | 7 ++++--- tcg/mips/tcg-target.c.inc | 3 ++- tcg/ppc/tcg-target.c.inc | 7 ++++--- tcg/riscv/tcg-target.c.inc | 7 ++++--- tcg/s390x/tcg-target.c.inc | 12 +++++++++--- tcg/sparc64/tcg-target.c.inc | 3 ++- tcg/tci/tcg-target.c.inc | 3 ++- 11 files changed, 49 insertions(+), 32 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 76cf26870c..162740b869 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -145,12 +145,8 @@ static void tcg_out_st(TCGContext *s, TCGType type, TC= GReg arg, TCGReg arg1, intptr_t arg2); static bool tcg_out_sti(TCGContext *s, TCGType type, TCGArg val, TCGReg base, intptr_t ofs); -#ifdef CONFIG_TCG_INTERPRETER static void tcg_out_call(TCGContext *s, const tcg_insn_unit *target, - ffi_cif *cif); -#else -static void tcg_out_call(TCGContext *s, const tcg_insn_unit *target); -#endif + const TCGHelperInfo *info); static bool tcg_target_const_match(int64_t val, TCGType type, int ct); #ifdef TCG_TARGET_NEED_LDST_LABELS static int tcg_out_ldst_finalize(TCGContext *s); @@ -4390,11 +4386,7 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp = *op) save_globals(s, allocated_regs); } =20 -#ifdef CONFIG_TCG_INTERPRETER - tcg_out_call(s, tcg_call_func(op), info->cif); -#else - tcg_out_call(s, tcg_call_func(op)); -#endif + tcg_out_call(s, tcg_call_func(op), info); =20 /* Assign output registers and emit moves if needed. */ switch (info->out_kind) { diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index 1af879e6f5..ad1816e32d 100644 --- a/tcg/aarch64/tcg-target.c.inc +++ b/tcg/aarch64/tcg-target.c.inc @@ -1336,7 +1336,7 @@ static void tcg_out_goto_long(TCGContext *s, const tc= g_insn_unit *target) } } =20 -static void tcg_out_call(TCGContext *s, const tcg_insn_unit *target) +static void tcg_out_call_int(TCGContext *s, const tcg_insn_unit *target) { ptrdiff_t offset =3D tcg_pcrel_diff(s, target) >> 2; if (offset =3D=3D sextract64(offset, 0, 26)) { @@ -1347,6 +1347,12 @@ static void tcg_out_call(TCGContext *s, const tcg_in= sn_unit *target) } } =20 +static void tcg_out_call(TCGContext *s, const tcg_insn_unit *target, + const TCGHelperInfo *info) +{ + tcg_out_call_int(s, target); +} + void tb_target_set_jmp_target(uintptr_t tc_ptr, uintptr_t jmp_rx, uintptr_t jmp_rw, uintptr_t addr) { @@ -1594,7 +1600,7 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, = TCGLabelQemuLdst *lb) tcg_out_mov(s, TARGET_LONG_BITS =3D=3D 64, TCG_REG_X1, lb->addrlo_reg); tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_X2, oi); tcg_out_adr(s, TCG_REG_X3, lb->raddr); - tcg_out_call(s, qemu_ld_helpers[opc & MO_SIZE]); + tcg_out_call_int(s, qemu_ld_helpers[opc & MO_SIZE]); if (opc & MO_SIGN) { tcg_out_sxt(s, lb->type, size, lb->datalo_reg, TCG_REG_X0); } else { @@ -1620,7 +1626,7 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s, = TCGLabelQemuLdst *lb) tcg_out_mov(s, size =3D=3D MO_64, TCG_REG_X2, lb->datalo_reg); tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_X3, oi); tcg_out_adr(s, TCG_REG_X4, lb->raddr); - tcg_out_call(s, qemu_st_helpers[opc & MO_SIZE]); + tcg_out_call_int(s, qemu_st_helpers[opc & MO_SIZE]); tcg_out_goto(s, lb->raddr); return true; } diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc index 2c6c353eea..9245ea86d0 100644 --- a/tcg/arm/tcg-target.c.inc +++ b/tcg/arm/tcg-target.c.inc @@ -1131,7 +1131,7 @@ static void tcg_out_goto(TCGContext *s, ARMCond cond,= const tcg_insn_unit *addr) * The call case is mostly used for helpers - so it's not unreasonable * for them to be beyond branch range. */ -static void tcg_out_call(TCGContext *s, const tcg_insn_unit *addr) +static void tcg_out_call_int(TCGContext *s, const tcg_insn_unit *addr) { intptr_t addri =3D (intptr_t)addr; ptrdiff_t disp =3D tcg_pcrel_diff(s, addr); @@ -1150,6 +1150,12 @@ static void tcg_out_call(TCGContext *s, const tcg_in= sn_unit *addr) tcg_out_blx_reg(s, COND_AL, TCG_REG_TMP); } =20 +static void tcg_out_call(TCGContext *s, const tcg_insn_unit *addr, + const TCGHelperInfo *info) +{ + tcg_out_call_int(s, addr); +} + static void tcg_out_goto_label(TCGContext *s, ARMCond cond, TCGLabel *l) { if (l->has_value) { @@ -1515,7 +1521,7 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, = TCGLabelQemuLdst *lb) argreg =3D tcg_out_arg_reg32(s, argreg, TCG_REG_R14); =20 /* Use the canonical unsigned helpers and minimize icache usage. */ - tcg_out_call(s, qemu_ld_helpers[opc & MO_SIZE]); + tcg_out_call_int(s, qemu_ld_helpers[opc & MO_SIZE]); =20 datalo =3D lb->datalo_reg; datahi =3D lb->datahi_reg; diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index cb04e4b3ad..58bd5873f5 100644 --- a/tcg/i386/tcg-target.c.inc +++ b/tcg/i386/tcg-target.c.inc @@ -1661,7 +1661,8 @@ static void tcg_out_branch(TCGContext *s, int call, c= onst tcg_insn_unit *dest) } } =20 -static inline void tcg_out_call(TCGContext *s, const tcg_insn_unit *dest) +static void tcg_out_call(TCGContext *s, const tcg_insn_unit *dest, + const TCGHelperInfo *info) { tcg_out_branch(s, 1, dest); } @@ -1885,7 +1886,7 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, = TCGLabelQemuLdst *l) (uintptr_t)l->raddr); } =20 - tcg_out_call(s, qemu_ld_helpers[opc & (MO_BSWAP | MO_SIZE)]); + tcg_out_branch(s, 1, qemu_ld_helpers[opc & (MO_BSWAP | MO_SIZE)]); =20 data_reg =3D l->datalo_reg; switch (opc & MO_SSIZE) { diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.= c.inc index d326e28740..c9e99e8ec3 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++ b/tcg/loongarch64/tcg-target.c.inc @@ -567,7 +567,8 @@ static void tcg_out_call_int(TCGContext *s, const tcg_i= nsn_unit *arg, bool tail) } } =20 -static void tcg_out_call(TCGContext *s, const tcg_insn_unit *arg) +static void tcg_out_call(TCGContext *s, const tcg_insn_unit *arg, + const TCGHelperInfo *info) { tcg_out_call_int(s, arg, false); } @@ -760,7 +761,7 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TC= GLabelQemuLdst *l) tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_A2, oi); tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_A3, (tcg_target_long)l->raddr); =20 - tcg_out_call(s, qemu_ld_helpers[size]); + tcg_out_call_int(s, qemu_ld_helpers[size], false); =20 switch (opc & MO_SSIZE) { case MO_SB: @@ -821,7 +822,7 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s, TC= GLabelQemuLdst *l) tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_A3, oi); tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_A4, (tcg_target_long)l->raddr); =20 - tcg_out_call(s, qemu_st_helpers[size]); + tcg_out_call_int(s, qemu_st_helpers[size], false); =20 return tcg_out_goto(s, l->raddr); } diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc index bd76f0c97f..292e490b5c 100644 --- a/tcg/mips/tcg-target.c.inc +++ b/tcg/mips/tcg-target.c.inc @@ -1020,7 +1020,8 @@ static void tcg_out_call_int(TCGContext *s, const tcg= _insn_unit *arg, bool tail) } } =20 -static void tcg_out_call(TCGContext *s, const tcg_insn_unit *arg) +static void tcg_out_call(TCGContext *s, const tcg_insn_unit *arg, + const TCGHelperInfo *info) { tcg_out_call_int(s, arg, false); tcg_out_nop(s); diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index 38ee9974cd..e0621463f6 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -2002,7 +2002,8 @@ static void tcg_out_call_int(TCGContext *s, int lk, #endif } =20 -static void tcg_out_call(TCGContext *s, const tcg_insn_unit *target) +static void tcg_out_call(TCGContext *s, const tcg_insn_unit *target, + const TCGHelperInfo *info) { tcg_out_call_int(s, LK, target); } @@ -2221,7 +2222,7 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, = TCGLabelQemuLdst *lb) tcg_out_movi(s, TCG_TYPE_I32, arg++, oi); tcg_out32(s, MFSPR | RT(arg) | LR); =20 - tcg_out_call(s, qemu_ld_helpers[opc & (MO_BSWAP | MO_SIZE)]); + tcg_out_call_int(s, LK, qemu_ld_helpers[opc & (MO_BSWAP | MO_SIZE)]); =20 lo =3D lb->datalo_reg; hi =3D lb->datahi_reg; @@ -2290,7 +2291,7 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s, = TCGLabelQemuLdst *lb) tcg_out_movi(s, TCG_TYPE_I32, arg++, oi); tcg_out32(s, MFSPR | RT(arg) | LR); =20 - tcg_out_call(s, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)]); + tcg_out_call_int(s, LK, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)]); =20 tcg_out_b(s, 0, lb->raddr); return true; diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc index 81a83e45b1..aa017d665a 100644 --- a/tcg/riscv/tcg-target.c.inc +++ b/tcg/riscv/tcg-target.c.inc @@ -819,7 +819,8 @@ static void tcg_out_call_int(TCGContext *s, const tcg_i= nsn_unit *arg, bool tail) } } =20 -static void tcg_out_call(TCGContext *s, const tcg_insn_unit *arg) +static void tcg_out_call(TCGContext *s, const tcg_insn_unit *arg, + const TCGHelperInfo *info) { tcg_out_call_int(s, arg, false); } @@ -1002,7 +1003,7 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, = TCGLabelQemuLdst *l) tcg_out_movi(s, TCG_TYPE_PTR, a2, oi); tcg_out_movi(s, TCG_TYPE_PTR, a3, (tcg_target_long)l->raddr); =20 - tcg_out_call(s, qemu_ld_helpers[opc & MO_SSIZE]); + tcg_out_call_int(s, qemu_ld_helpers[opc & MO_SSIZE], false); tcg_out_mov(s, (opc & MO_SIZE) =3D=3D MO_64, l->datalo_reg, a0); =20 tcg_out_goto(s, l->raddr); @@ -1047,7 +1048,7 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s, = TCGLabelQemuLdst *l) tcg_out_movi(s, TCG_TYPE_PTR, a3, oi); tcg_out_movi(s, TCG_TYPE_PTR, a4, (tcg_target_long)l->raddr); =20 - tcg_out_call(s, qemu_st_helpers[opc & MO_SIZE]); + tcg_out_call_int(s, qemu_st_helpers[opc & MO_SIZE], false); =20 tcg_out_goto(s, l->raddr); return true; diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index f1d3907cd8..b9ba7b605e 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -1691,7 +1691,7 @@ static void tgen_brcond(TCGContext *s, TCGType type, = TCGCond c, tgen_branch(s, cc, l); } =20 -static void tcg_out_call(TCGContext *s, const tcg_insn_unit *dest) +static void tcg_out_call_int(TCGContext *s, const tcg_insn_unit *dest) { ptrdiff_t off =3D tcg_pcrel_diff(s, dest) >> 1; if (off =3D=3D (int32_t)off) { @@ -1702,6 +1702,12 @@ static void tcg_out_call(TCGContext *s, const tcg_in= sn_unit *dest) } } =20 +static void tcg_out_call(TCGContext *s, const tcg_insn_unit *dest, + const TCGHelperInfo *info) +{ + tcg_out_call_int(s, dest); +} + static void tcg_out_qemu_ld_direct(TCGContext *s, MemOp opc, TCGReg data, TCGReg base, TCGReg index, int disp) { @@ -1897,7 +1903,7 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, = TCGLabelQemuLdst *lb) } tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_R4, oi); tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R5, (uintptr_t)lb->raddr); - tcg_out_call(s, qemu_ld_helpers[opc & (MO_BSWAP | MO_SSIZE)]); + tcg_out_call_int(s, qemu_ld_helpers[opc & (MO_BSWAP | MO_SSIZE)]); tcg_out_mov(s, TCG_TYPE_I64, data_reg, TCG_REG_R2); =20 tgen_gotoi(s, S390_CC_ALWAYS, lb->raddr); @@ -1938,7 +1944,7 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s, = TCGLabelQemuLdst *lb) } tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_R5, oi); tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R6, (uintptr_t)lb->raddr); - tcg_out_call(s, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)]); + tcg_out_call_int(s, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)]); =20 tgen_gotoi(s, S390_CC_ALWAYS, lb->raddr); return true; diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc index cb9453efdd..eb913f33c8 100644 --- a/tcg/sparc64/tcg-target.c.inc +++ b/tcg/sparc64/tcg-target.c.inc @@ -859,7 +859,8 @@ static void tcg_out_call_nodelay(TCGContext *s, const t= cg_insn_unit *dest, } } =20 -static void tcg_out_call(TCGContext *s, const tcg_insn_unit *dest) +static void tcg_out_call(TCGContext *s, const tcg_insn_unit *dest, + const TCGHelperInfo *info) { tcg_out_call_nodelay(s, dest, false); tcg_out_nop(s); diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index c1acaa943e..d36a7ebdd1 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -558,8 +558,9 @@ static void tcg_out_movi(TCGContext *s, TCGType type, } =20 static void tcg_out_call(TCGContext *s, const tcg_insn_unit *func, - ffi_cif *cif) + const TCGHelperInfo *info) { + ffi_cif *cif =3D info->cif; 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id x185-20020a6286c2000000b0056bfebfa6e4sm12586151pfd.190.2022.12.29.16.06.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:06:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+wd2mrgCejqfl59r8NBlXKIcEt28IplSSnv1nGG8U1o=; b=gDpDdU/StNlTRo49c7YcJ9Y8tMPsfTtMGiYpQmoJTSS2xNY7/gJ+ulDCeFTptBHGNe VSk7v3HEpGcOiHWqsjhGyVmTGddXr0oiZ+5IwenSxhDRTjcULFkPS1xulQ9S+j0lrRVL VxHbnCOt4h5wu9/dBgr7X5ld6jHrr43EviHF17BQGvfoDKgXESsOqXeyk3v7TqATKmXJ q+Yi3oLuemxJW5oayDBrHf4l1ztC0uLz4pmNtjbesYzwq1NMgwiUSX4gZNACiC77Mmhc moMAATpHCTUuWN/wJaQu8OW0ls2qhDByoZF0OqMmo7LaK79VqaX7ts/1M/IWn66dYm0I v49A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+wd2mrgCejqfl59r8NBlXKIcEt28IplSSnv1nGG8U1o=; b=bRPmuNI/2pyoCZAWVgbfAusit3P2PXK8py1B32CuRonBKqOaYcSvFAvfvIzkFFjSEL DFvylDrNaNQUMc3uj6J8UxMLALGt2G9CpL5HZVq6uNobIrpSeHB2MLVHTLWi9gHvOkPs bb4Gp2pXrH+r7Ks6WMZRLM0Vai5l3CFQrI28Z6ar8nW/OTpb4dNjgFRYexWcFDWcvN+q 6FyNUDPqw+Mnc0vgw4vq4DAXGKuEVFoseiQTrEH2+cJPtxoZupml/ubFkdzGe+3asZWr 0q/j4DOKJqcBEGwShe6IdtZzpPf/79Mx8/AZQYiJXk/RWJSkUL78geAELPqbVNYkzaoE utjA== X-Gm-Message-State: AFqh2koLa5B2NwJ9P85T627SbYOwan2TmtaZC12dyO9VEnQPkB6wQ3tA O7psTLYAzloeMhTNJncav2A9hkVz9emVIjcg X-Google-Smtp-Source: AMrXdXsUJ745PzijVARq982P9bB+o/pzKW7DcgA2jq0qqlQu7+hGiAop2LfwoUH9jT2+VWg/S6kVpw== X-Received: by 2002:a05:6a20:a6a7:b0:a7:8e19:e59d with SMTP id ba39-20020a056a20a6a700b000a78e19e59dmr42161066pzb.24.1672358763838; Thu, 29 Dec 2022 16:06:03 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 44/47] accel/tcg: Fix tb_invalidate_phys_page_unwind Date: Thu, 29 Dec 2022 16:02:18 -0800 Message-Id: <20221230000221.2764875-45-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359299364000005 When called from syscall(), we are not within a TB and pc =3D=3D 0. We can skip the check for invalidating the current TB. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- accel/tcg/tb-maint.c | 78 ++++++++++++++++++++++++-------------------- 1 file changed, 43 insertions(+), 35 deletions(-) diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index 1b8e860647..b3d6529ae2 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -1024,43 +1024,51 @@ void tb_invalidate_phys_page(tb_page_addr_t addr) */ bool tb_invalidate_phys_page_unwind(tb_page_addr_t addr, uintptr_t pc) { - assert(pc !=3D 0); -#ifdef TARGET_HAS_PRECISE_SMC - assert_memory_lock(); - { - TranslationBlock *current_tb =3D tcg_tb_lookup(pc); - bool current_tb_modified =3D false; - TranslationBlock *tb; - PageForEachNext n; + TranslationBlock *current_tb; + bool current_tb_modified; + TranslationBlock *tb; + PageForEachNext n; =20 - addr &=3D TARGET_PAGE_MASK; - - PAGE_FOR_EACH_TB(addr, addr + TARGET_PAGE_SIZE, unused, tb, n) { - if (current_tb =3D=3D tb && - (tb_cflags(current_tb) & CF_COUNT_MASK) !=3D 1) { - /* - * If we are modifying the current TB, we must stop its - * execution. We could be more precise by checking that - * the modification is after the current PC, but it would - * require a specialized function to partially restore - * the CPU state. - */ - current_tb_modified =3D true; - cpu_restore_state_from_tb(current_cpu, current_tb, pc); - } - tb_phys_invalidate__locked(tb); - } - - if (current_tb_modified) { - /* Force execution of one insn next time. */ - CPUState *cpu =3D current_cpu; - cpu->cflags_next_tb =3D 1 | CF_NOIRQ | curr_cflags(current_cpu= ); - return true; - } + /* + * Without precise smc semantics, or when outside of a TB, + * we can skip to invalidate. + */ +#ifndef TARGET_HAS_PRECISE_SMC + pc =3D 0; +#endif + if (!pc) { + tb_invalidate_phys_page(addr); + return false; + } + + assert_memory_lock(); + current_tb =3D tcg_tb_lookup(pc); + + addr &=3D TARGET_PAGE_MASK; + current_tb_modified =3D false; + + PAGE_FOR_EACH_TB(addr, addr + TARGET_PAGE_SIZE, unused, tb, n) { + if (current_tb =3D=3D tb && + (tb_cflags(current_tb) & CF_COUNT_MASK) !=3D 1) { + /* + * If we are modifying the current TB, we must stop its + * execution. We could be more precise by checking that + * the modification is after the current PC, but it would + * require a specialized function to partially restore + * the CPU state. + */ + current_tb_modified =3D true; + cpu_restore_state_from_tb(current_cpu, current_tb, pc); + } + tb_phys_invalidate__locked(tb); + } + + if (current_tb_modified) { + /* Force execution of one insn next time. */ + CPUState *cpu =3D current_cpu; + cpu->cflags_next_tb =3D 1 | CF_NOIRQ | curr_cflags(current_cpu); + return true; } -#else - tb_invalidate_phys_page(addr); -#endif /* TARGET_HAS_PRECISE_SMC */ return false; } #else --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359882; cv=none; d=zohomail.com; s=zohoarc; b=Qp64vf1iIgkcAFq8yidCPeQWYcxdsUrJfKfOX98ux9SNJdXMQi5eZHhi/iK4kAX3EZjs53kNVfIK6cGINFHQgTFHbcq3ljCaRIE0ScA8MEit06/w6lZWYjTnvUvIom1NeNwULgmx/A+aQcn38yTpW+1nalmu6cLfAAGixSbMlPw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359882; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=5Y16pm0SqOdUqq2QzEmuBdO11+/IfNrQQ74FHa4/kug=; b=EZkSCZc+xwy+N7gnRwKsw1XNFmzEhSqP04HD4iRmu5Txl4axnhzMZODU84hOcDfV086YCVOuBYgWmVWa5R3ElvdsK0DpAmL5V2QfqXl4i2FpfvKpKkNK6Zq1ci/Yg3wbb92D670D713KLEqYI83zbUrxgtWSyivZWsApQSeEZl4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672359882651798.9908935925531; Thu, 29 Dec 2022 16:24:42 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2ui-0006fC-Hu; Thu, 29 Dec 2022 19:06:20 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2uZ-0006Ti-TN for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:06:12 -0500 Received: from mail-pf1-x436.google.com ([2607:f8b0:4864:20::436]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2uW-0004Fb-6D for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:06:10 -0500 Received: by mail-pf1-x436.google.com with SMTP id c7so13549601pfc.12 for ; Thu, 29 Dec 2022 16:06:06 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id x185-20020a6286c2000000b0056bfebfa6e4sm12586151pfd.190.2022.12.29.16.06.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:06:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5Y16pm0SqOdUqq2QzEmuBdO11+/IfNrQQ74FHa4/kug=; b=QH9mLi0kyhNGdZSroMc5KDfi7LtjCsRqEGQZpeiDqRL1Fni43dvlDF+I9Xpqh52GPT T5pON48f34awwhqm5O4rgL8LrQ60cda4U/7p0df6N2TwZXU387DQNK9NOBkK8Qabw2n9 SotYERuaF5gkPeqzgL8H2DjcdHcOc2TgmboXEhVgpTRyh+2hyLsuff4rKL5BibRsyb8T j0A+nhaBnqtMUDQhxqz74TbOrWTKD3dzoQKoRRI2l/RxnDbMK6xFT/Ldmkpmix7Ij/Iv y8s3x+yVZuFOWPbQbXijloPhvHeKkQaSUneafB+0MgNb9Ao4QAblhQ5eJqr9kHgmuQ3x jHSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5Y16pm0SqOdUqq2QzEmuBdO11+/IfNrQQ74FHa4/kug=; b=RMYDHqyErqHFNWObnGrUjFTc/NYp/xHeapUNjyIaKVgZkIvgmjYlVkzCihRYM/T0nv Qg2NBaP4jjIGTtmW+wXLzeGu23hd05B/zseFtH/BC2Fnb6EWUqD6gg2PfeW3+jHXp17F h5/LlgdjDNIHGnMSDGgslJqbmbknM9dkwh/trc+e7bcpEaZxfhjvh7+2pm3IIruQm+a+ MJLrug/8KJjRPYxvisoqRCH9LxOzKZXQG0isGcScwnd7Y8GWhdzv/UN6EJrFDOoA5mlO xvmuSyC+Tq6H5i+HbijahIJ92lCjN4jthOAMIUVB4p/2Ho4ATFAeh8s2A4F8guTsaAzP rQ6A== X-Gm-Message-State: AFqh2kpHgRTtnclhdFKp7PT1AAH+lAkLLa4078LSpAPh9I80wLw4VTqo esWhiiAf5I4vJfOJDOEilr1u2PmfsVJ53of8 X-Google-Smtp-Source: AMrXdXt1JaGAPvPseKbTUNx/65o/zlOYUlt/y2fj26d4vGUjZMqusxvuhbGKef9fC6iSbljpGZ2cRQ== X-Received: by 2002:a62:1c84:0:b0:576:e4c7:97bf with SMTP id c126-20020a621c84000000b00576e4c797bfmr30332957pfc.15.1672358764975; Thu, 29 Dec 2022 16:06:04 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 45/47] accel/tcg: Use g_free_rcu for user-exec interval trees Date: Thu, 29 Dec 2022 16:02:19 -0800 Message-Id: <20221230000221.2764875-46-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359883668000001 Because we allow lockless lookups, we have to be careful when it is freed. Use rcu to delay the free until safe. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- accel/tcg/user-exec.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index a3cecda405..2c5c10d2e6 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -22,6 +22,7 @@ #include "exec/exec-all.h" #include "tcg/tcg.h" #include "qemu/bitops.h" +#include "qemu/rcu.h" #include "exec/cpu_ldst.h" #include "exec/translate-all.h" #include "exec/helper-proto.h" @@ -136,6 +137,7 @@ bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_= t *old_set, } =20 typedef struct PageFlagsNode { + struct rcu_head rcu; IntervalTreeNode itree; int flags; } PageFlagsNode; @@ -266,7 +268,7 @@ static bool pageflags_unset(target_ulong start, target_= ulong last) } } else if (p_last <=3D last) { /* Range completely covers node -- remove it. */ - g_free(p); + g_free_rcu(p, rcu); } else { /* Truncate the node from the start. */ p->itree.start =3D last + 1; @@ -311,7 +313,7 @@ static void pageflags_create_merge(target_ulong start, = target_ulong last, if (prev) { if (next) { prev->itree.last =3D next->itree.last; - g_free(next); + g_free_rcu(next, rcu); } else { prev->itree.last =3D last; } @@ -376,7 +378,7 @@ static bool pageflags_set_clear(target_ulong start, tar= get_ulong last, p->flags =3D merge_flags; } else { interval_tree_remove(&p->itree, &pageflags_root); - g_free(p); + g_free_rcu(p, rcu); } goto done; } @@ -421,7 +423,7 @@ static bool pageflags_set_clear(target_ulong start, tar= get_ulong last, p->flags =3D merge_flags; } else { interval_tree_remove(&p->itree, &pageflags_root); - g_free(p); + g_free_rcu(p, rcu); } if (p_last < last) { start =3D p_last + 1; @@ -462,7 +464,7 @@ static bool pageflags_set_clear(target_ulong start, tar= get_ulong last, p->itree.start =3D last + 1; interval_tree_insert(&p->itree, &pageflags_root); } else { - g_free(p); + g_free_rcu(p, rcu); goto restart; } if (set_flags) { @@ -779,6 +781,7 @@ tb_page_addr_t get_page_addr_code_hostp(CPUArchState *e= nv, target_ulong addr, #define TBD_MASK (TARGET_PAGE_MASK * TPD_PAGES) =20 typedef struct TargetPageDataNode { + struct rcu_head rcu; IntervalTreeNode itree; char data[TPD_PAGES][TARGET_PAGE_DATA_SIZE] __attribute__((aligned)); } TargetPageDataNode; @@ -801,11 +804,11 @@ void page_reset_target_data(target_ulong start, targe= t_ulong end) n =3D next, next =3D next ? interval_tree_iter_next(n, start, last) : NULL) { target_ulong n_start, n_last, p_ofs, p_len; - TargetPageDataNode *t; + TargetPageDataNode *t =3D container_of(n, TargetPageDataNode, itre= e); =20 if (n->start >=3D start && n->last <=3D last) { interval_tree_remove(n, &targetdata_root); - g_free(n); + g_free_rcu(t, rcu); continue; } =20 @@ -819,7 +822,6 @@ void page_reset_target_data(target_ulong start, target_= ulong end) n_last =3D MIN(last, n->last); p_len =3D (n_last + 1 - n_start) >> TARGET_PAGE_BITS; =20 - t =3D container_of(n, TargetPageDataNode, itree); memset(t->data[p_ofs], 0, p_len * TARGET_PAGE_DATA_SIZE); } } --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672359585; cv=none; d=zohomail.com; s=zohoarc; b=Yw3bZLuGK8a3nP6WRdixzetpNu6YlLYC5zD0qcXVge3y71q3WtOE9kqHiO9HRfXafjwUoMipJk1Z6eKxBLo8k38Z8KfUqs+52d/o2iNGr9JfqZqGqi80rdHa7KMURc5uST2RYTNIARsJ1sWBgzoW+mCJaZ3JTfKTG6Hz//seHLA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672359585; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=D1Ju+9+IeyZLpzQCrZ1HI6GENt77SWKubB60iolMVS0=; b=HKZliMzbmzPiSUG3/DOrM8wZzD115a/8WxOQkLerdr7abLvEbkivtakdX6yGb91PWzvpPZuTSYWBPdEnsIsuWUoi5AUTXG5Tazwunlo116XuVAJVXLQmvxrz70HZtZR+hJScFIjqKPvi3F1bWGRvxM+nKskb98E3hpAo/28s+Do= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672359585390494.1752204428308; Thu, 29 Dec 2022 16:19:45 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2ud-0006Wx-3t; Thu, 29 Dec 2022 19:06:15 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2ua-0006Tj-2v for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:06:12 -0500 Received: from mail-pg1-x52b.google.com ([2607:f8b0:4864:20::52b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2uV-0004Fp-Ic for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:06:09 -0500 Received: by mail-pg1-x52b.google.com with SMTP id 7so13303081pga.1 for ; Thu, 29 Dec 2022 16:06:06 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id x185-20020a6286c2000000b0056bfebfa6e4sm12586151pfd.190.2022.12.29.16.06.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:06:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=D1Ju+9+IeyZLpzQCrZ1HI6GENt77SWKubB60iolMVS0=; b=PBWdT0puCg8Jw98REanM7U2YOsxgjYhwcixx3ZP/dWp4uiqBha/A+Bv/tUsNXCVUa5 qa6tY1BcVMhhcEKwvcnc/3QYYUQJlhaMkKm1dXPZdvi9Zu3u62o6xfM5WPkDKnZB4vcd OTj05FyAYRmAcxj/cN05haTeGhfoPDL84BkN9RjKcrFogxUmeE46m+P1NYP0EnUpLulZ cZc+wacuCWPdXRS5Hye+MDsq3bok0FHxBzm1B6l/XTq8cM7cvfBGN84l+BEJOZyiMJTi PL/faRTccLgTNxyjzG8fusNMinsdnOJjPDolH4nBHl86KS+dGf8NkT1y+b0Bi3vonhSC bvzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=D1Ju+9+IeyZLpzQCrZ1HI6GENt77SWKubB60iolMVS0=; b=49OD1JmVYgp+bZOtzFn0a52sKYYkT1l8QsAX/spobMIeYva5LCHAUmzHFsLFMD1eat iipBJVXLnWhdN3zHqhYXlt8BfCBF5myRfB6a6OpI6hhHEB39c30bt0+sfdcGaP93ylNJ V8QKlLupJsoEqiBOb67BpYB8hIOo/eiiJYqeps90CBNQauzUIbf+iQrCEchbt+6KwXJf Ubsa3AWLid8znnIV+m+vDgX4lbjNeqx44rTEwcOKBln3Ui4t7diweaiYs8tQUJylONqi waur85LphdVgaI81PyinRYjFFdKxAabbfEuG+kVRf+DAwgIQ6Chglkw3q7NU3mhxlGhX ZXqA== X-Gm-Message-State: AFqh2kpSzIJGj/JLxluoxuyMiYVyu9HZpK+JzGPdS3ogBoYjYWc/V7Jz FK8GMc7jZoWsLtC8Q0r9ypwbQqAEpdW04xjf X-Google-Smtp-Source: AMrXdXsdRPsXcXkpqkYVSucdITbPOp1M9ORRFGm6oZVMSawevLzkltywdVJmaIwnYqG9slvN/VZkIQ== X-Received: by 2002:a05:6a00:f8d:b0:577:501c:c154 with SMTP id ct13-20020a056a000f8d00b00577501cc154mr46258699pfb.6.1672358765772; Thu, 29 Dec 2022 16:06:05 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 46/47] accel/tcg: Handle false negative lookup in page_check_range Date: Thu, 29 Dec 2022 16:02:20 -0800 Message-Id: <20221230000221.2764875-47-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52b; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672359587043000001 As in page_get_flags, we need to try again with the mmap lock held if we fail a page lookup. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- accel/tcg/user-exec.c | 41 ++++++++++++++++++++++++++++++++++------- 1 file changed, 34 insertions(+), 7 deletions(-) diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 2c5c10d2e6..a8eb63ab96 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -525,6 +525,8 @@ void page_set_flags(target_ulong start, target_ulong en= d, int flags) int page_check_range(target_ulong start, target_ulong len, int flags) { target_ulong last; + int locked; /* tri-state: =3D0: unlocked, +1: global, -1: local */ + int ret; =20 if (len =3D=3D 0) { return 0; /* trivial length */ @@ -535,42 +537,67 @@ int page_check_range(target_ulong start, target_ulong= len, int flags) return -1; /* wrap around */ } =20 + locked =3D have_mmap_lock(); while (true) { PageFlagsNode *p =3D pageflags_find(start, last); int missing; =20 if (!p) { - return -1; /* entire region invalid */ + if (!locked) { + /* + * Lockless lookups have false negatives. + * Retry with the lock held. + */ + mmap_lock(); + locked =3D -1; + p =3D pageflags_find(start, last); + } + if (!p) { + ret =3D -1; /* entire region invalid */ + break; + } } if (start < p->itree.start) { - return -1; /* initial bytes invalid */ + ret =3D -1; /* initial bytes invalid */ + break; } =20 missing =3D flags & ~p->flags; if (missing & PAGE_READ) { - return -1; /* page not readable */ + ret =3D -1; /* page not readable */ + break; } if (missing & PAGE_WRITE) { if (!(p->flags & PAGE_WRITE_ORG)) { - return -1; /* page not writable */ + ret =3D -1; /* page not writable */ + break; } /* Asking about writable, but has been protected: undo. */ if (!page_unprotect(start, 0)) { - return -1; + ret =3D -1; + break; } /* TODO: page_unprotect should take a range, not a single page= . */ if (last - start < TARGET_PAGE_SIZE) { - return 0; /* ok */ + ret =3D 0; /* ok */ + break; } start +=3D TARGET_PAGE_SIZE; continue; } =20 if (last <=3D p->itree.last) { - return 0; /* ok */ + ret =3D 0; /* ok */ + break; } start =3D p->itree.last + 1; } + + /* Release the lock if acquired locally. */ + if (locked < 0) { + mmap_unlock(); + } + return ret; } =20 void page_protect(tb_page_addr_t address) --=20 2.34.1 From nobody Tue Feb 10 19:18:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1672358927; cv=none; d=zohomail.com; s=zohoarc; b=OnpFvAAHKh6W3TxPCLU58VfFBbDjCe1zNOaG0GvoVitCmKpayEwqHdCkHh4PDydhSrF5aGX3ZIz2ZfAZZ9MWEGQ3kdSPdEOhR+dLkTzT+zWikoqgmgTeyg1QrvHybNf/55ifOidbl2Tj/y6dQoMFPPbxZnqtprV3QpfYUTccp4g= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672358927; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=/e64CJkrjVAacS+/S9kimffaF57/sp39kRwpkAK2G/E=; b=gIjZiO9ft4lEZCE2mqtvloTnNQt6/JIJrTtT1UMwRPdKP8j5FWRHoE5yAye+Hmf83Zi8fr631OsVfMJe9plTRdoFuypyZzqGD0MJ7R3oYrzrJNxHh6idrhWYWmZItiG9cHjoc7DBQOoOT2ncr1fNjzX46Ld7GOmcZtkryXPgQF8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1672358927919696.5844551735457; Thu, 29 Dec 2022 16:08:47 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pB2uh-0006dx-Sy; Thu, 29 Dec 2022 19:06:19 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pB2ua-0006Tk-3f for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:06:12 -0500 Received: from mail-pf1-x42a.google.com ([2607:f8b0:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pB2uW-0004E7-GV for qemu-devel@nongnu.org; Thu, 29 Dec 2022 19:06:11 -0500 Received: by mail-pf1-x42a.google.com with SMTP id a184so2793287pfa.9 for ; Thu, 29 Dec 2022 16:06:07 -0800 (PST) Received: from stoup.. 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[76.14.210.194]) by smtp.gmail.com with ESMTPSA id x185-20020a6286c2000000b0056bfebfa6e4sm12586151pfd.190.2022.12.29.16.06.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 16:06:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/e64CJkrjVAacS+/S9kimffaF57/sp39kRwpkAK2G/E=; b=ffKLR7y3h+HkZbVX2hDvXF4E6fXJvFONVEBjg6aSKD9nlDjV9GFQflq+oIdC1dtZe+ YW6C62P6dykrArGFwoDu4crSSblV6B6N67xMbzVKb0h+3hbN9EPtuHD8xvN4Rk3n4HnG p2ugc7NMdC4XU6Pu/FeSZwmWNp1viyKRLNBRaFH6yiDqBAE9cBBfSUsJLHxd8pUSDHLA foWur86cv3um0Nr8jP0T2EITqIbX3squiM8qExmixBNnF5wb1uyvvA1RtCzFliIn4adI 7fkdBoXcvBCV5YBpG7bOtblahvYSf1nCxH8rZhPXoQXNTQyo8Ya62JrJQGCnQwHblyqy eOtg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/e64CJkrjVAacS+/S9kimffaF57/sp39kRwpkAK2G/E=; b=PeezoZTSgn8pJRM1PGnhTX19rVDFpJV3VZzXHQ8L2/WwlepnsAicgTQ3UzSKT2L0+8 9UT04zaZ/XQwxkiywCwS05f4XkK58TIs8cj3YL5s7cVkAuG4bn9Ff+G5MGkcjtDcT6Ia tcUlQLCeo5IMQvxl3sK5s0QKl2F2g5is/qwP0G/YxltAD3K/QASa2R+lXmQktlpFJfhw QVplmOUShv1z27UIabVNG/1VNWROt9KOcydRMv9O9Kxmgk50GawR8qJbj4BqQoOzy/Ot KzoE4/CWHEnWeWO3+vQfuaVinRAwTDpwjWUX/3MFYq4cfGz/b/pE1JTOukN6iwlgcnsM ec/g== X-Gm-Message-State: AFqh2krUImmRJXb9HZW95RWcmNRB235JJsg2UsP/igqm7k+qTHLiPd0S LFthgBhXlY4+pc/HA99Un1n7ehQcZVxH1RkU X-Google-Smtp-Source: AMrXdXvHc7BKxPdLLVsT38IUv2R2YeZg7/NYfUsuYo2tI/S4uJbMM0NLsGcN+zWpZfeUcHMX/AvYOA== X-Received: by 2002:a62:1bd8:0:b0:581:9f7d:d55b with SMTP id b207-20020a621bd8000000b005819f7dd55bmr6272299pfb.16.1672358766778; Thu, 29 Dec 2022 16:06:06 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Ilya Leoshkevich , =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [PULL 47/47] tests/tcg/multiarch: add vma-pthread.c Date: Thu, 29 Dec 2022 16:02:21 -0800 Message-Id: <20221230000221.2764875-48-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42a; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1672358928377000001 From: Ilya Leoshkevich Add a test that locklessly changes and exercises page protection bits from various threads. This helps catch race conditions in the VMA handling. Acked-by: Alex Benn=C3=A9e Signed-off-by: Ilya Leoshkevich Message-Id: <20221223120252.513319-1-iii@linux.ibm.com> Signed-off-by: Richard Henderson --- tests/tcg/multiarch/nop_func.h | 25 ++++ tests/tcg/multiarch/munmap-pthread.c | 16 +-- tests/tcg/multiarch/vma-pthread.c | 207 +++++++++++++++++++++++++++ tests/tcg/multiarch/Makefile.target | 3 + 4 files changed, 236 insertions(+), 15 deletions(-) create mode 100644 tests/tcg/multiarch/nop_func.h create mode 100644 tests/tcg/multiarch/vma-pthread.c diff --git a/tests/tcg/multiarch/nop_func.h b/tests/tcg/multiarch/nop_func.h new file mode 100644 index 0000000000..f714d21000 --- /dev/null +++ b/tests/tcg/multiarch/nop_func.h @@ -0,0 +1,25 @@ +/* + * No-op functions that can be safely copied. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef NOP_FUNC_H +#define NOP_FUNC_H + +static const char nop_func[] =3D { +#if defined(__aarch64__) + 0xc0, 0x03, 0x5f, 0xd6, /* ret */ +#elif defined(__alpha__) + 0x01, 0x80, 0xFA, 0x6B, /* ret */ +#elif defined(__arm__) + 0x1e, 0xff, 0x2f, 0xe1, /* bx lr */ +#elif defined(__riscv) + 0x67, 0x80, 0x00, 0x00, /* ret */ +#elif defined(__s390__) + 0x07, 0xfe, /* br %r14 */ +#elif defined(__i386__) || defined(__x86_64__) + 0xc3, /* ret */ +#endif +}; + +#endif diff --git a/tests/tcg/multiarch/munmap-pthread.c b/tests/tcg/multiarch/mun= map-pthread.c index d7143b00d5..1c79005846 100644 --- a/tests/tcg/multiarch/munmap-pthread.c +++ b/tests/tcg/multiarch/munmap-pthread.c @@ -7,21 +7,7 @@ #include #include =20 -static const char nop_func[] =3D { -#if defined(__aarch64__) - 0xc0, 0x03, 0x5f, 0xd6, /* ret */ -#elif defined(__alpha__) - 0x01, 0x80, 0xFA, 0x6B, /* ret */ -#elif defined(__arm__) - 0x1e, 0xff, 0x2f, 0xe1, /* bx lr */ -#elif defined(__riscv) - 0x67, 0x80, 0x00, 0x00, /* ret */ -#elif defined(__s390__) - 0x07, 0xfe, /* br %r14 */ -#elif defined(__i386__) || defined(__x86_64__) - 0xc3, /* ret */ -#endif -}; +#include "nop_func.h" =20 static void *thread_mmap_munmap(void *arg) { diff --git a/tests/tcg/multiarch/vma-pthread.c b/tests/tcg/multiarch/vma-pt= hread.c new file mode 100644 index 0000000000..35e63cd6cd --- /dev/null +++ b/tests/tcg/multiarch/vma-pthread.c @@ -0,0 +1,207 @@ +/* + * Test that VMA updates do not race. + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + * Map a contiguous chunk of RWX memory. Split it into 8 equally sized + * regions, each of which is guaranteed to have a certain combination of + * protection bits set. + * + * Reader, writer and executor threads perform the respective operations on + * pages, which are guaranteed to have the respective protection bit set. + * Two mutator threads change the non-fixed protection bits randomly. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "nop_func.h" + +#define PAGE_IDX_BITS 10 +#define PAGE_COUNT (1 << PAGE_IDX_BITS) +#define PAGE_IDX_MASK (PAGE_COUNT - 1) +#define REGION_IDX_BITS 3 +#define PAGE_IDX_R_MASK (1 << 7) +#define PAGE_IDX_W_MASK (1 << 8) +#define PAGE_IDX_X_MASK (1 << 9) +#define REGION_MASK (PAGE_IDX_R_MASK | PAGE_IDX_W_MASK | PAGE_IDX_X_MASK) +#define PAGES_PER_REGION (1 << (PAGE_IDX_BITS - REGION_IDX_BITS)) + +struct context { + int pagesize; + char *ptr; + int dev_null_fd; + volatile int mutator_count; +}; + +static void *thread_read(void *arg) +{ + struct context *ctx =3D arg; + ssize_t sret; + size_t i, j; + int ret; + + for (i =3D 0; ctx->mutator_count; i++) { + char *p; + + j =3D (i & PAGE_IDX_MASK) | PAGE_IDX_R_MASK; + p =3D &ctx->ptr[j * ctx->pagesize]; + + /* Read directly. */ + ret =3D memcmp(p, nop_func, sizeof(nop_func)); + if (ret !=3D 0) { + fprintf(stderr, "fail direct read %p\n", p); + abort(); + } + + /* Read indirectly. */ + sret =3D write(ctx->dev_null_fd, p, 1); + if (sret !=3D 1) { + if (sret < 0) { + fprintf(stderr, "fail indirect read %p (%m)\n", p); + } else { + fprintf(stderr, "fail indirect read %p (%zd)\n", p, sret); + } + abort(); + } + } + + return NULL; +} + +static void *thread_write(void *arg) +{ + struct context *ctx =3D arg; + struct timespec *ts; + size_t i, j; + int ret; + + for (i =3D 0; ctx->mutator_count; i++) { + j =3D (i & PAGE_IDX_MASK) | PAGE_IDX_W_MASK; + + /* Write directly. */ + memcpy(&ctx->ptr[j * ctx->pagesize], nop_func, sizeof(nop_func)); + + /* Write using a syscall. */ + ts =3D (struct timespec *)(&ctx->ptr[(j + 1) * ctx->pagesize] - + sizeof(struct timespec)); + ret =3D clock_gettime(CLOCK_REALTIME, ts); + if (ret !=3D 0) { + fprintf(stderr, "fail indirect write %p (%m)\n", ts); + abort(); + } + } + + return NULL; +} + +static void *thread_execute(void *arg) +{ + struct context *ctx =3D arg; + size_t i, j; + + for (i =3D 0; ctx->mutator_count; i++) { + j =3D (i & PAGE_IDX_MASK) | PAGE_IDX_X_MASK; + ((void(*)(void))&ctx->ptr[j * ctx->pagesize])(); + } + + return NULL; +} + +static void *thread_mutate(void *arg) +{ + size_t i, start_idx, end_idx, page_idx, tmp; + struct context *ctx =3D arg; + unsigned int seed; + int prot, ret; + + seed =3D (unsigned int)time(NULL); + for (i =3D 0; i < 50000; i++) { + start_idx =3D rand_r(&seed) & PAGE_IDX_MASK; + end_idx =3D rand_r(&seed) & PAGE_IDX_MASK; + if (start_idx > end_idx) { + tmp =3D start_idx; + start_idx =3D end_idx; + end_idx =3D tmp; + } + prot =3D rand_r(&seed) & (PROT_READ | PROT_WRITE | PROT_EXEC); + for (page_idx =3D start_idx & REGION_MASK; page_idx <=3D end_idx; + page_idx +=3D PAGES_PER_REGION) { + if (page_idx & PAGE_IDX_R_MASK) { + prot |=3D PROT_READ; + } + if (page_idx & PAGE_IDX_W_MASK) { + /* FIXME: qemu syscalls check for both read+write. */ + prot |=3D PROT_WRITE | PROT_READ; + } + if (page_idx & PAGE_IDX_X_MASK) { + prot |=3D PROT_EXEC; + } + } + ret =3D mprotect(&ctx->ptr[start_idx * ctx->pagesize], + (end_idx - start_idx + 1) * ctx->pagesize, prot); + assert(ret =3D=3D 0); + } + + __atomic_fetch_sub(&ctx->mutator_count, 1, __ATOMIC_SEQ_CST); + + return NULL; +} + +int main(void) +{ + pthread_t threads[5]; + struct context ctx; + size_t i; + int ret; + + /* Without a template, nothing to test. */ + if (sizeof(nop_func) =3D=3D 0) { + return EXIT_SUCCESS; + } + + /* Initialize memory chunk. */ + ctx.pagesize =3D getpagesize(); + ctx.ptr =3D mmap(NULL, PAGE_COUNT * ctx.pagesize, + PROT_READ | PROT_WRITE | PROT_EXEC, + MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); + assert(ctx.ptr !=3D MAP_FAILED); + for (i =3D 0; i < PAGE_COUNT; i++) { + memcpy(&ctx.ptr[i * ctx.pagesize], nop_func, sizeof(nop_func)); + } + ctx.dev_null_fd =3D open("/dev/null", O_WRONLY); + assert(ctx.dev_null_fd >=3D 0); + ctx.mutator_count =3D 2; + + /* Start threads. */ + ret =3D pthread_create(&threads[0], NULL, thread_read, &ctx); + assert(ret =3D=3D 0); + ret =3D pthread_create(&threads[1], NULL, thread_write, &ctx); + assert(ret =3D=3D 0); + ret =3D pthread_create(&threads[2], NULL, thread_execute, &ctx); + assert(ret =3D=3D 0); + for (i =3D 3; i <=3D 4; i++) { + ret =3D pthread_create(&threads[i], NULL, thread_mutate, &ctx); + assert(ret =3D=3D 0); + } + + /* Wait for threads to stop. */ + for (i =3D 0; i < sizeof(threads) / sizeof(threads[0]); i++) { + ret =3D pthread_join(threads[i], NULL); + assert(ret =3D=3D 0); + } + + /* Destroy memory chunk. */ + ret =3D close(ctx.dev_null_fd); + assert(ret =3D=3D 0); + ret =3D munmap(ctx.ptr, PAGE_COUNT * ctx.pagesize); + assert(ret =3D=3D 0); + + return EXIT_SUCCESS; +} diff --git a/tests/tcg/multiarch/Makefile.target b/tests/tcg/multiarch/Make= file.target index 5f0fee1aad..e7213af492 100644 --- a/tests/tcg/multiarch/Makefile.target +++ b/tests/tcg/multiarch/Makefile.target @@ -39,6 +39,9 @@ signals: LDFLAGS+=3D-lrt -lpthread munmap-pthread: CFLAGS+=3D-pthread munmap-pthread: LDFLAGS+=3D-pthread =20 +vma-pthread: CFLAGS+=3D-pthread +vma-pthread: LDFLAGS+=3D-pthread + # We define the runner for test-mmap after the individual # architectures have defined their supported pages sizes. If no # additional page sizes are defined we only run the default test. --=20 2.34.1