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([191.17.222.139]) by smtp.gmail.com with ESMTPSA id cj5-20020a056830640500b0066f09567827sm7689333otb.78.2022.12.28.04.43.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 04:43:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=oikBKkKahhZEdm4ld5dwcA6luVTj35JLzUpMpaRato4=; b=dqQqwxEvnvsZs/t/upjdEtcqCKvzbZow44P4ATJ5elYRajV2/zAAis+waJvFbdxujp rQm2GN1jSdAPDkFz/Jg3IoMy7kzxkpcqd0R5TdD3iQV+TaQoagaCmve5bW9zyAWeKd9h 5K/sBtKyWTSKm6l0UivTyKIOZi4R1LCzxGC/cfIFQSx34WShl+Z8icIrMenVo7x7iiUR Pc753H0Ht4yB+jj0L4NytNNnGBEvFwRE0HEcrysZRJ0mm4zjHnriEAJVPsy2Isc1GxsR HQ2SBNxqsaZfx7/2Lk2OvkVXJsrtXxxVn+EXeLDoeMblzHCaM30kuK9ksEbE0elYNxVS Q2YQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oikBKkKahhZEdm4ld5dwcA6luVTj35JLzUpMpaRato4=; b=qh9xjSG6G1VUlK8t8hozujiZbyPE12VssOVmrm+5WbpiPxUYnXx8unniEj4OzlL0j5 eqbS2Gh9V7pByaobVK6T9YjWWAp6JeO90AqrHrUGyVuT86g+8tqsCRhPBRua72R9Zvde 3J7EJu1nR/7fmRspiRd+sPec+uave6zvh16+SL9sZRXnzgabVXVJCsMukRoQ9B5TA6TT Ohq6rG1K8iP5fvHCDHnlLzrG8N1oKmD7skGVbWXGHcAQM5JSnrsYC/ABorfPyZNDbhNG KiZF5fLS1VgiUVjaM4b2hKy/w++3neOCA91S/Xzi/qEnLxLCfHmFjUAwLcgcMzPnOF+Z oUfg== X-Gm-Message-State: AFqh2kq1u1IQp4I2elXPP5fUsuLYOvNCxBh7WKvPagaZuoO9yGpNZKwC 60vjc3epfNphROorDVtuvChD4Y04NmXybPzB X-Google-Smtp-Source: AMrXdXs4GkppRt3XW8NM2KITOL8uq7/lYeEesN6kMMrDLepr/yOngPWAziCKRA1D8soQZJf1m9mTBQ== X-Received: by 2002:a05:6830:3358:b0:67a:a7ad:29ee with SMTP id l24-20020a056830335800b0067aa7ad29eemr11517468ott.18.1672231386573; Wed, 28 Dec 2022 04:43:06 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, Daniel Henrique Barboza , Bin Meng , Palmer Dabbelt , Bin Meng Subject: [PATCH v2 05/10] hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd() Date: Wed, 28 Dec 2022 09:42:37 -0300 Message-Id: <20221228124242.184784-6-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221228124242.184784-1-dbarboza@ventanamicro.com> References: <20221228124242.184784-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::331; envelope-from=dbarboza@ventanamicro.com; helo=mail-ot1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1672231777266000001 riscv_load_initrd() returns the initrd end addr while also writing a 'start' var to mark the addr start. These informations are being used just to write the initrd FDT node. Every existing caller of riscv_load_initrd() is writing the FDT in the same manner. We can simplify things by writing the FDT inside riscv_load_initrd(), sparing callers from having to manage start/end addrs to write the FDT themselves. An 'if (fdt)' check is already inserted at the end of the function because we'll end up using it later on with other boards that doesn=C2=B4t have a FDT. Cc: Palmer Dabbelt Signed-off-by: Daniel Henrique Barboza Reviewed-by: Bin Meng --- hw/riscv/boot.c | 18 ++++++++++++------ hw/riscv/microchip_pfsoc.c | 10 ++-------- hw/riscv/sifive_u.c | 10 ++-------- hw/riscv/spike.c | 10 ++-------- hw/riscv/virt.c | 10 ++-------- include/hw/riscv/boot.h | 4 ++-- 6 files changed, 22 insertions(+), 40 deletions(-) diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c index 98b80af51b..d3c71b3f0b 100644 --- a/hw/riscv/boot.c +++ b/hw/riscv/boot.c @@ -204,9 +204,10 @@ target_ulong riscv_load_kernel(const char *kernel_file= name, exit(1); } =20 -hwaddr riscv_load_initrd(const char *filename, uint64_t mem_size, - uint64_t kernel_entry, hwaddr *start) +void riscv_load_initrd(const char *filename, uint64_t mem_size, + uint64_t kernel_entry, void *fdt) { + hwaddr start, end; ssize_t size; =20 /* @@ -220,18 +221,23 @@ hwaddr riscv_load_initrd(const char *filename, uint64= _t mem_size, * halfway into RAM, and for boards with 256MB of RAM or more we put * the initrd at 128MB. */ - *start =3D kernel_entry + MIN(mem_size / 2, 128 * MiB); + start =3D kernel_entry + MIN(mem_size / 2, 128 * MiB); =20 - size =3D load_ramdisk(filename, *start, mem_size - *start); + size =3D load_ramdisk(filename, start, mem_size - start); if (size =3D=3D -1) { - size =3D load_image_targphys(filename, *start, mem_size - *start); + size =3D load_image_targphys(filename, start, mem_size - start); if (size =3D=3D -1) { error_report("could not load ramdisk '%s'", filename); exit(1); } } =20 - return *start + size; + /* Some RISC-V machines (e.g. opentitan) don't have a fdt. */ + if (fdt) { + end =3D start + size; + qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start", start); + qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end", end); + } } =20 uint64_t riscv_load_fdt(hwaddr dram_base, uint64_t mem_size, void *fdt) diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c index b10321b564..593a799549 100644 --- a/hw/riscv/microchip_pfsoc.c +++ b/hw/riscv/microchip_pfsoc.c @@ -633,14 +633,8 @@ static void microchip_icicle_kit_machine_init(MachineS= tate *machine) kernel_start_addr, NULL); =20 if (machine->initrd_filename) { - hwaddr start; - hwaddr end =3D riscv_load_initrd(machine->initrd_filename, - machine->ram_size, kernel_entry, - &start); - qemu_fdt_setprop_cell(machine->fdt, "/chosen", - "linux,initrd-start", start); - qemu_fdt_setprop_cell(machine->fdt, "/chosen", - "linux,initrd-end", end); + riscv_load_initrd(machine->initrd_filename, machine->ram_size, + kernel_entry, machine->fdt); } =20 if (machine->kernel_cmdline && *machine->kernel_cmdline) { diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index ddceb750ea..37f5087172 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -608,14 +608,8 @@ static void sifive_u_machine_init(MachineState *machin= e) kernel_start_addr, NULL); =20 if (machine->initrd_filename) { - hwaddr start; - hwaddr end =3D riscv_load_initrd(machine->initrd_filename, - machine->ram_size, kernel_entry, - &start); - qemu_fdt_setprop_cell(machine->fdt, "/chosen", - "linux,initrd-start", start); - qemu_fdt_setprop_cell(machine->fdt, "/chosen", "linux,initrd-e= nd", - end); + riscv_load_initrd(machine->initrd_filename, machine->ram_size, + kernel_entry, machine->fdt); } } else { /* diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index 0d2feea930..360bf83564 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -311,14 +311,8 @@ static void spike_board_init(MachineState *machine) htif_symbol_callback); =20 if (machine->initrd_filename) { - hwaddr start; - hwaddr end =3D riscv_load_initrd(machine->initrd_filename, - machine->ram_size, kernel_entry, - &start); - qemu_fdt_setprop_cell(machine->fdt, "/chosen", - "linux,initrd-start", start); - qemu_fdt_setprop_cell(machine->fdt, "/chosen", "linux,initrd-e= nd", - end); + riscv_load_initrd(machine->initrd_filename, machine->ram_size, + kernel_entry, machine->fdt); } } else { /* diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 408f7a2256..5967b136b4 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1291,14 +1291,8 @@ static void virt_machine_done(Notifier *notifier, vo= id *data) kernel_start_addr, NULL); =20 if (machine->initrd_filename) { - hwaddr start; - hwaddr end =3D riscv_load_initrd(machine->initrd_filename, - machine->ram_size, kernel_entry, - &start); - qemu_fdt_setprop_cell(machine->fdt, "/chosen", - "linux,initrd-start", start); - qemu_fdt_setprop_cell(machine->fdt, "/chosen", "linux,initrd-e= nd", - end); + riscv_load_initrd(machine->initrd_filename, machine->ram_size, + kernel_entry, machine->fdt); } } else { /* diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h index b273ab22f7..e37e1d1238 100644 --- a/include/hw/riscv/boot.h +++ b/include/hw/riscv/boot.h @@ -46,8 +46,8 @@ target_ulong riscv_load_firmware(const char *firmware_fil= ename, target_ulong riscv_load_kernel(const char *kernel_filename, target_ulong firmware_end_addr, symbol_fn_t sym_cb); -hwaddr riscv_load_initrd(const char *filename, uint64_t mem_size, - uint64_t kernel_entry, hwaddr *start); +void riscv_load_initrd(const char *filename, uint64_t mem_size, + uint64_t kernel_entry, void *fdt); uint64_t riscv_load_fdt(hwaddr dram_start, uint64_t dram_size, void *fdt); void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState = *harts, hwaddr saddr, --=20 2.38.1