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([2602:47:d48c:8101:3efa:624c:5fb:32c0]) by smtp.gmail.com with ESMTPSA id a8-20020a17090a688800b002135e8074b1sm390645pjd.55.2022.12.20.21.03.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Dec 2022 21:03:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+us9lauksEcfPHcu7sMk8ugSYxQaW3YKOdx61GwHr/s=; b=kHQLCB/xqvW/PqxAWubnTFfhCd2WOvhB82FU+KlC0PVP0EjSe9Nsd3ECHSc5bjq75V QNgyv+BKgYheQiBNPCWOF1wosp/Dn2aGLPlfBuuMUoD/weOTB/Xenf0IeAlcPN1M1WGr 0+h0iKwe0ryhRd148VuJJcrXxHeawvRqwqdZpWmafHcQzmyV8yPS7f+HrdZaU1OeHFQi gmqI1x7z0J+eQEdZYov7/1I9E3hTzvLBpiPI+vAgkY1piPzaT7UD4cPvj+qrYWF1f2OU k04QW6V9OpiCJfe+1IoZGNapscw+OujzMenwAas6YkOyBUY+3OW3vHlFZfwqISex0Hxj 47UQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+us9lauksEcfPHcu7sMk8ugSYxQaW3YKOdx61GwHr/s=; b=y+kf8UBzDjmfc8UC/n7WnqKGq12aFzDgLwnEfdLznFwBh9MM4xf+BO7nv0PpjJQnCl 04eFTlLq/xeNhLmNJPNCKCpwLoNdSRH7xqq51Lzmn8iE+GPi88H6SIq1aHyRIIpL0cjs u1guuHUf6l779Xcgwh7craHZKIm+bpf/UcgFfKZkOYmB7RmfAXvMATiwUR2rXyqJWRSO wmwtweVvx2DN1nWjbOG5+6Bsa/ZR58BJEIn88d6zEIHAgPjk9yYz/Tp3YPIgXREAMO/y wpLJG+929tDeR7MUiHygUd84j0sV1uJIqVPz2QDrEc3XmQWKUEIT13f71xPcooy+8RsT sjjw== X-Gm-Message-State: AFqh2krUD/ipY2JzaulHFzdC1ZALb2Qar1ITnQGTc0HR8xXteDfvyxNL ROqcxIj51dUbZvKTh3ZNFj++C9c+ySeyxHJl X-Google-Smtp-Source: AMrXdXsnevpNylEd3bUxyIgl/20U3azxAq44C89GCMeBaqivJcI90VHGxlXBg4iQlP/NbkzKv1JEtQ== X-Received: by 2002:a17:90b:3c8d:b0:223:ed95:651c with SMTP id pv13-20020a17090b3c8d00b00223ed95651cmr820860pjb.7.1671599002966; Tue, 20 Dec 2022 21:03:22 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [PULL v2 07/14] accel/tcg: Use interval tree for user-only page tracking Date: Tue, 20 Dec 2022 21:03:06 -0800 Message-Id: <20221221050313.2950701-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221221050313.2950701-1-richard.henderson@linaro.org> References: <20221221050313.2950701-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1671599344531100001 Finish weaning user-only away from PageDesc. Using an interval tree to track page permissions means that we can represent very large regions efficiently. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/290 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/967 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1214 Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- accel/tcg/internal.h | 4 +- accel/tcg/tb-maint.c | 20 +- accel/tcg/user-exec.c | 615 ++++++++++++++++++++++----------- tests/tcg/multiarch/test-vma.c | 22 ++ 4 files changed, 451 insertions(+), 210 deletions(-) create mode 100644 tests/tcg/multiarch/test-vma.c diff --git a/accel/tcg/internal.h b/accel/tcg/internal.h index ddd1fa6bdc..be19bdf088 100644 --- a/accel/tcg/internal.h +++ b/accel/tcg/internal.h @@ -24,9 +24,7 @@ #endif =20 typedef struct PageDesc { -#ifdef CONFIG_USER_ONLY - unsigned long flags; -#else +#ifndef CONFIG_USER_ONLY QemuSpin lock; /* list of TBs intersecting this ram page */ uintptr_t first_tb; diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index 8da2c64d87..20e86c813d 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -68,15 +68,23 @@ static void tb_remove_all(void) /* Call with mmap_lock held. */ static void tb_record(TranslationBlock *tb, PageDesc *p1, PageDesc *p2) { - /* translator_loop() must have made all TB pages non-writable */ - assert(!(p1->flags & PAGE_WRITE)); - if (p2) { - assert(!(p2->flags & PAGE_WRITE)); - } + target_ulong addr; + int flags; =20 assert_memory_lock(); - tb->itree.last =3D tb->itree.start + tb->size - 1; + + /* translator_loop() must have made all TB pages non-writable */ + addr =3D tb_page_addr0(tb); + flags =3D page_get_flags(addr); + assert(!(flags & PAGE_WRITE)); + + addr =3D tb_page_addr1(tb); + if (addr !=3D -1) { + flags =3D page_get_flags(addr); + assert(!(flags & PAGE_WRITE)); + } + interval_tree_insert(&tb->itree, &tb_root); } =20 diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 22ef780900..a3cecda405 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -135,106 +135,61 @@ bool handle_sigsegv_accerr_write(CPUState *cpu, sigs= et_t *old_set, } } =20 -/* - * Walks guest process memory "regions" one by one - * and calls callback function 'fn' for each region. - */ -struct walk_memory_regions_data { - walk_memory_regions_fn fn; - void *priv; - target_ulong start; - int prot; -}; +typedef struct PageFlagsNode { + IntervalTreeNode itree; + int flags; +} PageFlagsNode; =20 -static int walk_memory_regions_end(struct walk_memory_regions_data *data, - target_ulong end, int new_prot) +static IntervalTreeRoot pageflags_root; + +static PageFlagsNode *pageflags_find(target_ulong start, target_long last) { - if (data->start !=3D -1u) { - int rc =3D data->fn(data->priv, data->start, end, data->prot); - if (rc !=3D 0) { - return rc; - } - } + IntervalTreeNode *n; =20 - data->start =3D (new_prot ? end : -1u); - data->prot =3D new_prot; - - return 0; + n =3D interval_tree_iter_first(&pageflags_root, start, last); + return n ? container_of(n, PageFlagsNode, itree) : NULL; } =20 -static int walk_memory_regions_1(struct walk_memory_regions_data *data, - target_ulong base, int level, void **lp) +static PageFlagsNode *pageflags_next(PageFlagsNode *p, target_ulong start, + target_long last) { - target_ulong pa; - int i, rc; + IntervalTreeNode *n; =20 - if (*lp =3D=3D NULL) { - return walk_memory_regions_end(data, base, 0); - } - - if (level =3D=3D 0) { - PageDesc *pd =3D *lp; - - for (i =3D 0; i < V_L2_SIZE; ++i) { - int prot =3D pd[i].flags; - - pa =3D base | (i << TARGET_PAGE_BITS); - if (prot !=3D data->prot) { - rc =3D walk_memory_regions_end(data, pa, prot); - if (rc !=3D 0) { - return rc; - } - } - } - } else { - void **pp =3D *lp; - - for (i =3D 0; i < V_L2_SIZE; ++i) { - pa =3D base | ((target_ulong)i << - (TARGET_PAGE_BITS + V_L2_BITS * level)); - rc =3D walk_memory_regions_1(data, pa, level - 1, pp + i); - if (rc !=3D 0) { - return rc; - } - } - } - - return 0; + n =3D interval_tree_iter_next(&p->itree, start, last); + return n ? container_of(n, PageFlagsNode, itree) : NULL; } =20 int walk_memory_regions(void *priv, walk_memory_regions_fn fn) { - struct walk_memory_regions_data data; - uintptr_t i, l1_sz =3D v_l1_size; + IntervalTreeNode *n; + int rc =3D 0; =20 - data.fn =3D fn; - data.priv =3D priv; - data.start =3D -1u; - data.prot =3D 0; + mmap_lock(); + for (n =3D interval_tree_iter_first(&pageflags_root, 0, -1); + n !=3D NULL; + n =3D interval_tree_iter_next(n, 0, -1)) { + PageFlagsNode *p =3D container_of(n, PageFlagsNode, itree); =20 - for (i =3D 0; i < l1_sz; i++) { - target_ulong base =3D i << (v_l1_shift + TARGET_PAGE_BITS); - int rc =3D walk_memory_regions_1(&data, base, v_l2_levels, l1_map = + i); + rc =3D fn(priv, n->start, n->last + 1, p->flags); if (rc !=3D 0) { - return rc; + break; } } + mmap_unlock(); =20 - return walk_memory_regions_end(&data, 0, 0); + return rc; } =20 static int dump_region(void *priv, target_ulong start, - target_ulong end, unsigned long prot) + target_ulong end, unsigned long prot) { FILE *f =3D (FILE *)priv; =20 - (void) fprintf(f, TARGET_FMT_lx"-"TARGET_FMT_lx - " "TARGET_FMT_lx" %c%c%c\n", - start, end, end - start, - ((prot & PAGE_READ) ? 'r' : '-'), - ((prot & PAGE_WRITE) ? 'w' : '-'), - ((prot & PAGE_EXEC) ? 'x' : '-')); - + fprintf(f, TARGET_FMT_lx"-"TARGET_FMT_lx" "TARGET_FMT_lx" %c%c%c\n", + start, end, end - start, + ((prot & PAGE_READ) ? 'r' : '-'), + ((prot & PAGE_WRITE) ? 'w' : '-'), + ((prot & PAGE_EXEC) ? 'x' : '-')); return 0; } =20 @@ -242,20 +197,131 @@ static int dump_region(void *priv, target_ulong star= t, void page_dump(FILE *f) { const int length =3D sizeof(target_ulong) * 2; - (void) fprintf(f, "%-*s %-*s %-*s %s\n", + + fprintf(f, "%-*s %-*s %-*s %s\n", length, "start", length, "end", length, "size", "prot"); walk_memory_regions(f, dump_region); } =20 int page_get_flags(target_ulong address) { - PageDesc *p; + PageFlagsNode *p =3D pageflags_find(address, address); =20 - p =3D page_find(address >> TARGET_PAGE_BITS); - if (!p) { + /* + * See util/interval-tree.c re lockless lookups: no false positives but + * there are false negatives. If we find nothing, retry with the mmap + * lock acquired. + */ + if (p) { + return p->flags; + } + if (have_mmap_lock()) { return 0; } - return p->flags; + + mmap_lock(); + p =3D pageflags_find(address, address); + mmap_unlock(); + return p ? p->flags : 0; +} + +/* A subroutine of page_set_flags: insert a new node for [start,last]. */ +static void pageflags_create(target_ulong start, target_ulong last, int fl= ags) +{ + PageFlagsNode *p =3D g_new(PageFlagsNode, 1); + + p->itree.start =3D start; + p->itree.last =3D last; + p->flags =3D flags; + interval_tree_insert(&p->itree, &pageflags_root); +} + +/* A subroutine of page_set_flags: remove everything in [start,last]. */ +static bool pageflags_unset(target_ulong start, target_ulong last) +{ + bool inval_tb =3D false; + + while (true) { + PageFlagsNode *p =3D pageflags_find(start, last); + target_ulong p_last; + + if (!p) { + break; + } + + if (p->flags & PAGE_EXEC) { + inval_tb =3D true; + } + + interval_tree_remove(&p->itree, &pageflags_root); + p_last =3D p->itree.last; + + if (p->itree.start < start) { + /* Truncate the node from the end, or split out the middle. */ + p->itree.last =3D start - 1; + interval_tree_insert(&p->itree, &pageflags_root); + if (last < p_last) { + pageflags_create(last + 1, p_last, p->flags); + break; + } + } else if (p_last <=3D last) { + /* Range completely covers node -- remove it. */ + g_free(p); + } else { + /* Truncate the node from the start. */ + p->itree.start =3D last + 1; + interval_tree_insert(&p->itree, &pageflags_root); + break; + } + } + + return inval_tb; +} + +/* + * A subroutine of page_set_flags: nothing overlaps [start,last], + * but check adjacent mappings and maybe merge into a single range. + */ +static void pageflags_create_merge(target_ulong start, target_ulong last, + int flags) +{ + PageFlagsNode *next =3D NULL, *prev =3D NULL; + + if (start > 0) { + prev =3D pageflags_find(start - 1, start - 1); + if (prev) { + if (prev->flags =3D=3D flags) { + interval_tree_remove(&prev->itree, &pageflags_root); + } else { + prev =3D NULL; + } + } + } + if (last + 1 !=3D 0) { + next =3D pageflags_find(last + 1, last + 1); + if (next) { + if (next->flags =3D=3D flags) { + interval_tree_remove(&next->itree, &pageflags_root); + } else { + next =3D NULL; + } + } + } + + if (prev) { + if (next) { + prev->itree.last =3D next->itree.last; + g_free(next); + } else { + prev->itree.last =3D last; + } + interval_tree_insert(&prev->itree, &pageflags_root); + } else if (next) { + next->itree.start =3D start; + interval_tree_insert(&next->itree, &pageflags_root); + } else { + pageflags_create(start, last, flags); + } } =20 /* @@ -267,6 +333,146 @@ int page_get_flags(target_ulong address) #endif #define PAGE_STICKY (PAGE_ANON | PAGE_PASSTHROUGH | PAGE_TARGET_STICKY) =20 +/* A subroutine of page_set_flags: add flags to [start,last]. */ +static bool pageflags_set_clear(target_ulong start, target_ulong last, + int set_flags, int clear_flags) +{ + PageFlagsNode *p; + target_ulong p_start, p_last; + int p_flags, merge_flags; + bool inval_tb =3D false; + + restart: + p =3D pageflags_find(start, last); + if (!p) { + if (set_flags) { + pageflags_create_merge(start, last, set_flags); + } + goto done; + } + + p_start =3D p->itree.start; + p_last =3D p->itree.last; + p_flags =3D p->flags; + /* Using mprotect on a page does not change sticky bits. */ + merge_flags =3D (p_flags & ~clear_flags) | set_flags; + + /* + * Need to flush if an overlapping executable region + * removes exec, or adds write. + */ + if ((p_flags & PAGE_EXEC) + && (!(merge_flags & PAGE_EXEC) + || (merge_flags & ~p_flags & PAGE_WRITE))) { + inval_tb =3D true; + } + + /* + * If there is an exact range match, update and return without + * attempting to merge with adjacent regions. + */ + if (start =3D=3D p_start && last =3D=3D p_last) { + if (merge_flags) { + p->flags =3D merge_flags; + } else { + interval_tree_remove(&p->itree, &pageflags_root); + g_free(p); + } + goto done; + } + + /* + * If sticky bits affect the original mapping, then we must be more + * careful about the existing intervals and the separate flags. + */ + if (set_flags !=3D merge_flags) { + if (p_start < start) { + interval_tree_remove(&p->itree, &pageflags_root); + p->itree.last =3D start - 1; + interval_tree_insert(&p->itree, &pageflags_root); + + if (last < p_last) { + if (merge_flags) { + pageflags_create(start, last, merge_flags); + } + pageflags_create(last + 1, p_last, p_flags); + } else { + if (merge_flags) { + pageflags_create(start, p_last, merge_flags); + } + if (p_last < last) { + start =3D p_last + 1; + goto restart; + } + } + } else { + if (start < p_start && set_flags) { + pageflags_create(start, p_start - 1, set_flags); + } + if (last < p_last) { + interval_tree_remove(&p->itree, &pageflags_root); + p->itree.start =3D last + 1; + interval_tree_insert(&p->itree, &pageflags_root); + if (merge_flags) { + pageflags_create(start, last, merge_flags); + } + } else { + if (merge_flags) { + p->flags =3D merge_flags; + } else { + interval_tree_remove(&p->itree, &pageflags_root); + g_free(p); + } + if (p_last < last) { + start =3D p_last + 1; + goto restart; + } + } + } + goto done; + } + + /* If flags are not changing for this range, incorporate it. */ + if (set_flags =3D=3D p_flags) { + if (start < p_start) { + interval_tree_remove(&p->itree, &pageflags_root); + p->itree.start =3D start; + interval_tree_insert(&p->itree, &pageflags_root); + } + if (p_last < last) { + start =3D p_last + 1; + goto restart; + } + goto done; + } + + /* Maybe split out head and/or tail ranges with the original flags. */ + interval_tree_remove(&p->itree, &pageflags_root); + if (p_start < start) { + p->itree.last =3D start - 1; + interval_tree_insert(&p->itree, &pageflags_root); + + if (p_last < last) { + goto restart; + } + if (last < p_last) { + pageflags_create(last + 1, p_last, p_flags); + } + } else if (last < p_last) { + p->itree.start =3D last + 1; + interval_tree_insert(&p->itree, &pageflags_root); + } else { + g_free(p); + goto restart; + } + if (set_flags) { + pageflags_create(start, last, set_flags); + } + + done: + return inval_tb; +} + /* * Modify the flags of a page and invalidate the code if necessary. * The flag PAGE_WRITE_ORG is positioned automatically depending @@ -274,49 +480,41 @@ int page_get_flags(target_ulong address) */ void page_set_flags(target_ulong start, target_ulong end, int flags) { - target_ulong addr, len; - bool reset, inval_tb =3D false; + target_ulong last; + bool reset =3D false; + bool inval_tb =3D false; =20 /* This function should never be called with addresses outside the guest address space. If this assert fires, it probably indicates a missing call to h2g_valid. */ - assert(end - 1 <=3D GUEST_ADDR_MAX); assert(start < end); + assert(end - 1 <=3D GUEST_ADDR_MAX); /* Only set PAGE_ANON with new mappings. */ assert(!(flags & PAGE_ANON) || (flags & PAGE_RESET)); assert_memory_lock(); =20 start =3D start & TARGET_PAGE_MASK; end =3D TARGET_PAGE_ALIGN(end); + last =3D end - 1; =20 - if (flags & PAGE_WRITE) { - flags |=3D PAGE_WRITE_ORG; - } - reset =3D !(flags & PAGE_VALID) || (flags & PAGE_RESET); - if (reset) { - page_reset_target_data(start, end); - } - flags &=3D ~PAGE_RESET; - - for (addr =3D start, len =3D end - start; - len !=3D 0; - len -=3D TARGET_PAGE_SIZE, addr +=3D TARGET_PAGE_SIZE) { - PageDesc *p =3D page_find_alloc(addr >> TARGET_PAGE_BITS, true); - - /* - * If the page was executable, but is reset, or is no longer - * executable, or has become writable, then invalidate any code. - */ - if ((p->flags & PAGE_EXEC) - && (reset || - !(flags & PAGE_EXEC) || - (flags & ~p->flags & PAGE_WRITE))) { - inval_tb =3D true; + if (!(flags & PAGE_VALID)) { + flags =3D 0; + } else { + reset =3D flags & PAGE_RESET; + flags &=3D ~PAGE_RESET; + if (flags & PAGE_WRITE) { + flags |=3D PAGE_WRITE_ORG; } - /* Using mprotect on a page does not change sticky bits. */ - p->flags =3D (reset ? 0 : p->flags & PAGE_STICKY) | flags; } =20 + if (!flags || reset) { + page_reset_target_data(start, end); + inval_tb |=3D pageflags_unset(start, last); + } + if (flags) { + inval_tb |=3D pageflags_set_clear(start, last, flags, + ~(reset ? 0 : PAGE_STICKY)); + } if (inval_tb) { tb_invalidate_phys_range(start, end); } @@ -324,87 +522,89 @@ void page_set_flags(target_ulong start, target_ulong = end, int flags) =20 int page_check_range(target_ulong start, target_ulong len, int flags) { - PageDesc *p; - target_ulong end; - target_ulong addr; - - /* - * This function should never be called with addresses outside the - * guest address space. If this assert fires, it probably indicates - * a missing call to h2g_valid. - */ - if (TARGET_ABI_BITS > L1_MAP_ADDR_SPACE_BITS) { - assert(start < ((target_ulong)1 << L1_MAP_ADDR_SPACE_BITS)); - } + target_ulong last; =20 if (len =3D=3D 0) { - return 0; - } - if (start + len - 1 < start) { - /* We've wrapped around. */ - return -1; + return 0; /* trivial length */ } =20 - /* must do before we loose bits in the next step */ - end =3D TARGET_PAGE_ALIGN(start + len); - start =3D start & TARGET_PAGE_MASK; + last =3D start + len - 1; + if (last < start) { + return -1; /* wrap around */ + } + + while (true) { + PageFlagsNode *p =3D pageflags_find(start, last); + int missing; =20 - for (addr =3D start, len =3D end - start; - len !=3D 0; - len -=3D TARGET_PAGE_SIZE, addr +=3D TARGET_PAGE_SIZE) { - p =3D page_find(addr >> TARGET_PAGE_BITS); if (!p) { - return -1; + return -1; /* entire region invalid */ } - if (!(p->flags & PAGE_VALID)) { - return -1; + if (start < p->itree.start) { + return -1; /* initial bytes invalid */ } =20 - if ((flags & PAGE_READ) && !(p->flags & PAGE_READ)) { - return -1; + missing =3D flags & ~p->flags; + if (missing & PAGE_READ) { + return -1; /* page not readable */ } - if (flags & PAGE_WRITE) { + if (missing & PAGE_WRITE) { if (!(p->flags & PAGE_WRITE_ORG)) { + return -1; /* page not writable */ + } + /* Asking about writable, but has been protected: undo. */ + if (!page_unprotect(start, 0)) { return -1; } - /* unprotect the page if it was put read-only because it - contains translated code */ - if (!(p->flags & PAGE_WRITE)) { - if (!page_unprotect(addr, 0)) { - return -1; - } + /* TODO: page_unprotect should take a range, not a single page= . */ + if (last - start < TARGET_PAGE_SIZE) { + return 0; /* ok */ } + start +=3D TARGET_PAGE_SIZE; + continue; } + + if (last <=3D p->itree.last) { + return 0; /* ok */ + } + start =3D p->itree.last + 1; } - return 0; } =20 -void page_protect(tb_page_addr_t page_addr) +void page_protect(tb_page_addr_t address) { - target_ulong addr; - PageDesc *p; + PageFlagsNode *p; + target_ulong start, last; int prot; =20 - p =3D page_find(page_addr >> TARGET_PAGE_BITS); - if (p && (p->flags & PAGE_WRITE)) { - /* - * Force the host page as non writable (writes will have a page fa= ult + - * mprotect overhead). - */ - page_addr &=3D qemu_host_page_mask; - prot =3D 0; - for (addr =3D page_addr; addr < page_addr + qemu_host_page_size; - addr +=3D TARGET_PAGE_SIZE) { + assert_memory_lock(); =20 - p =3D page_find(addr >> TARGET_PAGE_BITS); - if (!p) { - continue; - } + if (qemu_host_page_size <=3D TARGET_PAGE_SIZE) { + start =3D address & TARGET_PAGE_MASK; + last =3D start + TARGET_PAGE_SIZE - 1; + } else { + start =3D address & qemu_host_page_mask; + last =3D start + qemu_host_page_size - 1; + } + + p =3D pageflags_find(start, last); + if (!p) { + return; + } + prot =3D p->flags; + + if (unlikely(p->itree.last < last)) { + /* More than one protection region covers the one host page. */ + assert(TARGET_PAGE_SIZE < qemu_host_page_size); + while ((p =3D pageflags_next(p, start, last)) !=3D NULL) { prot |=3D p->flags; - p->flags &=3D ~PAGE_WRITE; } - mprotect(g2h_untagged(page_addr), qemu_host_page_size, - (prot & PAGE_BITS) & ~PAGE_WRITE); + } + + if (prot & PAGE_WRITE) { + pageflags_set_clear(start, last, 0, PAGE_WRITE); + mprotect(g2h_untagged(start), qemu_host_page_size, + prot & (PAGE_READ | PAGE_EXEC) ? PROT_READ : PROT_NONE); } } =20 @@ -417,10 +617,8 @@ void page_protect(tb_page_addr_t page_addr) */ int page_unprotect(target_ulong address, uintptr_t pc) { - unsigned int prot; + PageFlagsNode *p; bool current_tb_invalidated; - PageDesc *p; - target_ulong host_start, host_end, addr; =20 /* * Technically this isn't safe inside a signal handler. However we @@ -429,40 +627,54 @@ int page_unprotect(target_ulong address, uintptr_t pc) */ mmap_lock(); =20 - p =3D page_find(address >> TARGET_PAGE_BITS); - if (!p) { + p =3D pageflags_find(address, address); + + /* If this address was not really writable, nothing to do. */ + if (!p || !(p->flags & PAGE_WRITE_ORG)) { mmap_unlock(); return 0; } =20 - /* - * If the page was really writable, then we change its - * protection back to writable. - */ - if (p->flags & PAGE_WRITE_ORG) { - current_tb_invalidated =3D false; - if (p->flags & PAGE_WRITE) { - /* - * If the page is actually marked WRITE then assume this is be= cause - * this thread raced with another one which got here first and - * set the page to PAGE_WRITE and did the TB invalidate for us. - */ + current_tb_invalidated =3D false; + if (p->flags & PAGE_WRITE) { + /* + * If the page is actually marked WRITE then assume this is because + * this thread raced with another one which got here first and + * set the page to PAGE_WRITE and did the TB invalidate for us. + */ #ifdef TARGET_HAS_PRECISE_SMC - TranslationBlock *current_tb =3D tcg_tb_lookup(pc); - if (current_tb) { - current_tb_invalidated =3D tb_cflags(current_tb) & CF_INVA= LID; - } + TranslationBlock *current_tb =3D tcg_tb_lookup(pc); + if (current_tb) { + current_tb_invalidated =3D tb_cflags(current_tb) & CF_INVALID; + } #endif + } else { + target_ulong start, len, i; + int prot; + + if (qemu_host_page_size <=3D TARGET_PAGE_SIZE) { + start =3D address & TARGET_PAGE_MASK; + len =3D TARGET_PAGE_SIZE; + prot =3D p->flags | PAGE_WRITE; + pageflags_set_clear(start, start + len - 1, PAGE_WRITE, 0); + current_tb_invalidated =3D tb_invalidate_phys_page_unwind(star= t, pc); } else { - host_start =3D address & qemu_host_page_mask; - host_end =3D host_start + qemu_host_page_size; - + start =3D address & qemu_host_page_mask; + len =3D qemu_host_page_size; prot =3D 0; - for (addr =3D host_start; addr < host_end; addr +=3D TARGET_PA= GE_SIZE) { - p =3D page_find(addr >> TARGET_PAGE_BITS); - p->flags |=3D PAGE_WRITE; - prot |=3D p->flags; =20 + for (i =3D 0; i < len; i +=3D TARGET_PAGE_SIZE) { + target_ulong addr =3D start + i; + + p =3D pageflags_find(addr, addr); + if (p) { + prot |=3D p->flags; + if (p->flags & PAGE_WRITE_ORG) { + prot |=3D PAGE_WRITE; + pageflags_set_clear(addr, addr + TARGET_PAGE_SIZE = - 1, + PAGE_WRITE, 0); + } + } /* * Since the content will be modified, we must invalidate * the corresponding translated code. @@ -470,15 +682,16 @@ int page_unprotect(target_ulong address, uintptr_t pc) current_tb_invalidated |=3D tb_invalidate_phys_page_unwind(addr, pc); } - mprotect((void *)g2h_untagged(host_start), qemu_host_page_size, - prot & PAGE_BITS); } - mmap_unlock(); - /* If current TB was invalidated return to main loop */ - return current_tb_invalidated ? 2 : 1; + if (prot & PAGE_EXEC) { + prot =3D (prot & ~PAGE_EXEC) | PAGE_READ; + } + mprotect((void *)g2h_untagged(start), len, prot & PAGE_BITS); } mmap_unlock(); - return 0; + + /* If current TB was invalidated return to main loop */ + return current_tb_invalidated ? 2 : 1; } =20 static int probe_access_internal(CPUArchState *env, target_ulong addr, diff --git a/tests/tcg/multiarch/test-vma.c b/tests/tcg/multiarch/test-vma.c new file mode 100644 index 0000000000..2893d60334 --- /dev/null +++ b/tests/tcg/multiarch/test-vma.c @@ -0,0 +1,22 @@ +/* + * Test very large vma allocations. + * The qemu out-of-memory condition was within the mmap syscall itself. + * If the syscall actually returns with MAP_FAILED, the test succeeded. + */ +#include + +int main() +{ + int n =3D sizeof(size_t) =3D=3D 4 ? 32 : 45; + + for (int i =3D 28; i < n; i++) { + size_t l =3D (size_t)1 << i; + void *p =3D mmap(0, l, PROT_NONE, + MAP_PRIVATE | MAP_ANONYMOUS | MAP_NORESERVE, -1, 0); + if (p =3D=3D MAP_FAILED) { + break; + } + munmap(p, l); + } + return 0; +} --=20 2.34.1