From nobody Mon Feb 9 20:11:30 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1671465217; cv=none; d=zohomail.com; s=zohoarc; b=kGsdWFZrHL7PGXk2dnyY9G3I0TYrpSJJzO75Xas5yAu2wd4fMDSSkQDGAOgLBMw0GqhTGQCFfq0o34d3faOQBQMLVsI9uA2WPCdTzwKIPwyanWLivGk6KrJA1jO/i/gNJrMhWkV8mA4O1TteIAMKT3qA316zKLk2NfZJIpXVfKE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1671465217; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=XekOz1xQDuh/VQxIQM5JfgtIYvE5R1or89l9uEcg3o4=; b=bYcNVxg0fqOL+04x+i4PQwAJtpr6WmbCTdP4z0ByhEwQbnSQulxi0QutFrfq5oRpDHcBI1IH4XGDqmBnqsQuhYyAATRb3oajtxTmlxB+C0jJMUtmkX0lzhtvUA5UKAUhd/4HV/x8QnzU2ZJvQeqecCAQRCAQheMbpLnNUNNz8+Y= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1671465217225198.5868824425795; Mon, 19 Dec 2022 07:53:37 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p7IQW-0002i1-FH; Mon, 19 Dec 2022 10:51:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p7IQN-0002at-3d for qemu-devel@nongnu.org; Mon, 19 Dec 2022 10:51:31 -0500 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p7IQI-0000Zq-OP for qemu-devel@nongnu.org; Mon, 19 Dec 2022 10:51:29 -0500 Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-638-56dp-S0BMwmhsnXqbRvrbg-1; Mon, 19 Dec 2022 10:51:22 -0500 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.rdu2.redhat.com [10.11.54.3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 056B5185A794; Mon, 19 Dec 2022 15:51:22 +0000 (UTC) Received: from blackfin.pond.sub.org (unknown [10.39.195.91]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 867F71121314; Mon, 19 Dec 2022 15:51:21 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 57C1F21E68BD; Mon, 19 Dec 2022 16:51:20 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1671465086; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XekOz1xQDuh/VQxIQM5JfgtIYvE5R1or89l9uEcg3o4=; b=BD4dR4zZ8Sm9z6fZ29DEJSPtH7bB0I+eU7sGSgeSTtu9JM0WosIVUo8qnRJN89B5x0dwqA FJgAfD3o0eYnexOPbuNGLqmmBMYqlbznIo7y9e6dTQ5yWm9Kby9GvxKDWw6o+KgQxghSXv r9ME49vRARNVNpK2Opu2Sk+iPv3dH3Y= X-MC-Unique: 56dp-S0BMwmhsnXqbRvrbg-1 From: Markus Armbruster To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, "Michael S . Tsirkin" Subject: [PULL 02/13] pci: Move QMP commands to new hw/pci/pci-qmp-cmds.c Date: Mon, 19 Dec 2022 16:51:09 +0100 Message-Id: <20221219155120.2273041-3-armbru@redhat.com> In-Reply-To: <20221219155120.2273041-1-armbru@redhat.com> References: <20221219155120.2273041-1-armbru@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.1 on 10.11.54.3 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1671465217998100003 Content-Type: text/plain; charset="utf-8" This moves these commands from MAINTAINERS section "QMP" to "PCI". Signed-off-by: Markus Armbruster Reviewed-by: Michael S. Tsirkin Message-Id: <20221201121133.3813857-3-armbru@redhat.com> [Commit message improved] --- hw/pci/pci-internal.h | 20 +++++ hw/pci/pci-qmp-cmds.c | 199 ++++++++++++++++++++++++++++++++++++++++++ hw/pci/pci.c | 186 +-------------------------------------- hw/pci/meson.build | 1 + 4 files changed, 224 insertions(+), 182 deletions(-) create mode 100644 hw/pci/pci-internal.h create mode 100644 hw/pci/pci-qmp-cmds.c diff --git a/hw/pci/pci-internal.h b/hw/pci/pci-internal.h new file mode 100644 index 0000000000..4903a26cbf --- /dev/null +++ b/hw/pci/pci-internal.h @@ -0,0 +1,20 @@ +#ifndef HW_PCI_PCI_INTERNAL_H +#define HW_PCI_PCI_INTERNAL_H + +#include "qemu/queue.h" + +typedef struct { + uint16_t class; + const char *desc; + const char *fw_name; + uint16_t fw_ign_bits; +} pci_class_desc; + +typedef QLIST_HEAD(, PCIHostState) PCIHostStateList; + +extern PCIHostStateList pci_host_bridges; + +const pci_class_desc *get_class_desc(int class); +PCIBus *pci_find_bus_nr(PCIBus *bus, int bus_num); + +#endif diff --git a/hw/pci/pci-qmp-cmds.c b/hw/pci/pci-qmp-cmds.c new file mode 100644 index 0000000000..5d9f4817f5 --- /dev/null +++ b/hw/pci/pci-qmp-cmds.c @@ -0,0 +1,199 @@ +/* + * QMP commands related to PCI + * + * Copyright (c) 2004 Fabrice Bellard + * + * Permission is hereby granted, free of charge, to any person obtaining a= copy + * of this software and associated documentation files (the "Software"), t= o deal + * in the Software without restriction, including without limitation the r= ights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or se= ll + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included= in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS= OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OT= HER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING= FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS = IN + * THE SOFTWARE. + */ + +#include "qemu/osdep.h" +#include "hw/pci/pci.h" +#include "hw/pci/pci_bridge.h" +#include "pci-internal.h" +#include "qapi/qapi-commands-pci.h" + +static PciDeviceInfoList *qmp_query_pci_devices(PCIBus *bus, int bus_num); + +static PciMemoryRegionList *qmp_query_pci_regions(const PCIDevice *dev) +{ + PciMemoryRegionList *head =3D NULL, **tail =3D &head; + int i; + + for (i =3D 0; i < PCI_NUM_REGIONS; i++) { + const PCIIORegion *r =3D &dev->io_regions[i]; + PciMemoryRegion *region; + + if (!r->size) { + continue; + } + + region =3D g_malloc0(sizeof(*region)); + + if (r->type & PCI_BASE_ADDRESS_SPACE_IO) { + region->type =3D g_strdup("io"); + } else { + region->type =3D g_strdup("memory"); + region->has_prefetch =3D true; + region->prefetch =3D !!(r->type & PCI_BASE_ADDRESS_MEM_PREFETC= H); + region->has_mem_type_64 =3D true; + region->mem_type_64 =3D !!(r->type & PCI_BASE_ADDRESS_MEM_TYPE= _64); + } + + region->bar =3D i; + region->address =3D r->addr; + region->size =3D r->size; + + QAPI_LIST_APPEND(tail, region); + } + + return head; +} + +static PciBridgeInfo *qmp_query_pci_bridge(PCIDevice *dev, PCIBus *bus, + int bus_num) +{ + PciBridgeInfo *info; + PciMemoryRange *range; + + info =3D g_new0(PciBridgeInfo, 1); + + info->bus =3D g_new0(PciBusInfo, 1); + info->bus->number =3D dev->config[PCI_PRIMARY_BUS]; + info->bus->secondary =3D dev->config[PCI_SECONDARY_BUS]; + info->bus->subordinate =3D dev->config[PCI_SUBORDINATE_BUS]; + + range =3D info->bus->io_range =3D g_new0(PciMemoryRange, 1); + range->base =3D pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_IO); + range->limit =3D pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_IO); + + range =3D info->bus->memory_range =3D g_new0(PciMemoryRange, 1); + range->base =3D pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_MEMORY= ); + range->limit =3D pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_MEMO= RY); + + range =3D info->bus->prefetchable_range =3D g_new0(PciMemoryRange, 1); + range->base =3D pci_bridge_get_base(dev, PCI_BASE_ADDRESS_MEM_PREFETCH= ); + range->limit =3D pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_MEM_PREFET= CH); + + if (dev->config[PCI_SECONDARY_BUS] !=3D 0) { + PCIBus *child_bus =3D pci_find_bus_nr(bus, + dev->config[PCI_SECONDARY_BUS]= ); + if (child_bus) { + info->has_devices =3D true; + info->devices =3D qmp_query_pci_devices(child_bus, + dev->config[PCI_SECONDARY_BUS]= ); + } + } + + return info; +} + +static PciDeviceInfo *qmp_query_pci_device(PCIDevice *dev, PCIBus *bus, + int bus_num) +{ + const pci_class_desc *desc; + PciDeviceInfo *info; + uint8_t type; + int class; + + info =3D g_new0(PciDeviceInfo, 1); + info->bus =3D bus_num; + info->slot =3D PCI_SLOT(dev->devfn); + info->function =3D PCI_FUNC(dev->devfn); + + info->class_info =3D g_new0(PciDeviceClass, 1); + class =3D pci_get_word(dev->config + PCI_CLASS_DEVICE); + info->class_info->q_class =3D class; + desc =3D get_class_desc(class); + if (desc->desc) { + info->class_info->desc =3D g_strdup(desc->desc); + } + + info->id =3D g_new0(PciDeviceId, 1); + info->id->vendor =3D pci_get_word(dev->config + PCI_VENDOR_ID); + info->id->device =3D pci_get_word(dev->config + PCI_DEVICE_ID); + info->regions =3D qmp_query_pci_regions(dev); + info->qdev_id =3D g_strdup(dev->qdev.id ? dev->qdev.id : ""); + + info->irq_pin =3D dev->config[PCI_INTERRUPT_PIN]; + if (dev->config[PCI_INTERRUPT_PIN] !=3D 0) { + info->has_irq =3D true; + info->irq =3D dev->config[PCI_INTERRUPT_LINE]; + } + + type =3D dev->config[PCI_HEADER_TYPE] & ~PCI_HEADER_TYPE_MULTI_FUNCTIO= N; + if (type =3D=3D PCI_HEADER_TYPE_BRIDGE) { + info->pci_bridge =3D qmp_query_pci_bridge(dev, bus, bus_num); + } else if (type =3D=3D PCI_HEADER_TYPE_NORMAL) { + info->id->has_subsystem =3D info->id->has_subsystem_vendor =3D tru= e; + info->id->subsystem =3D pci_get_word(dev->config + PCI_SUBSYSTEM_I= D); + info->id->subsystem_vendor =3D + pci_get_word(dev->config + PCI_SUBSYSTEM_VENDOR_ID); + } else if (type =3D=3D PCI_HEADER_TYPE_CARDBUS) { + info->id->has_subsystem =3D info->id->has_subsystem_vendor =3D tru= e; + info->id->subsystem =3D pci_get_word(dev->config + PCI_CB_SUBSYSTE= M_ID); + info->id->subsystem_vendor =3D + pci_get_word(dev->config + PCI_CB_SUBSYSTEM_VENDOR_ID); + } + + return info; +} + +static PciDeviceInfoList *qmp_query_pci_devices(PCIBus *bus, int bus_num) +{ + PciDeviceInfoList *head =3D NULL, **tail =3D &head; + PCIDevice *dev; + int devfn; + + for (devfn =3D 0; devfn < ARRAY_SIZE(bus->devices); devfn++) { + dev =3D bus->devices[devfn]; + if (dev) { + QAPI_LIST_APPEND(tail, qmp_query_pci_device(dev, bus, bus_num)= ); + } + } + + return head; +} + +static PciInfo *qmp_query_pci_bus(PCIBus *bus, int bus_num) +{ + PciInfo *info =3D NULL; + + bus =3D pci_find_bus_nr(bus, bus_num); + if (bus) { + info =3D g_malloc0(sizeof(*info)); + info->bus =3D bus_num; + info->devices =3D qmp_query_pci_devices(bus, bus_num); + } + + return info; +} + +PciInfoList *qmp_query_pci(Error **errp) +{ + PciInfoList *head =3D NULL, **tail =3D &head; + PCIHostState *host_bridge; + + QLIST_FOREACH(host_bridge, &pci_host_bridges, next) { + QAPI_LIST_APPEND(tail, + qmp_query_pci_bus(host_bridge->bus, + pci_bus_num(host_bridge->bus))); + } + + return head; +} diff --git a/hw/pci/pci.c b/hw/pci/pci.c index d70a567490..7310a82cee 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -47,8 +47,8 @@ #include "hw/hotplug.h" #include "hw/boards.h" #include "qapi/error.h" -#include "qapi/qapi-commands-pci.h" #include "qemu/cutils.h" +#include "pci-internal.h" =20 //#define DEBUG_PCI #ifdef DEBUG_PCI @@ -234,7 +234,6 @@ static const TypeInfo cxl_bus_info =3D { .class_init =3D pcie_bus_class_init, }; =20 -static PCIBus *pci_find_bus_nr(PCIBus *bus, int bus_num); static void pci_update_mappings(PCIDevice *d); static void pci_irq_handler(void *opaque, int irq_num, int level); static void pci_add_option_rom(PCIDevice *pdev, bool is_default_rom, Error= **); @@ -243,7 +242,7 @@ static void pci_del_option_rom(PCIDevice *pdev); static uint16_t pci_default_sub_vendor_id =3D PCI_SUBVENDOR_ID_REDHAT_QUMR= ANET; static uint16_t pci_default_sub_device_id =3D PCI_SUBDEVICE_ID_QEMU; =20 -static QLIST_HEAD(, PCIHostState) pci_host_bridges; +PCIHostStateList pci_host_bridges; =20 int pci_bar(PCIDevice *d, int reg) { @@ -1662,13 +1661,6 @@ int pci_swizzle_map_irq_fn(PCIDevice *pci_dev, int p= in) /***********************************************************/ /* monitor info on PCI */ =20 -typedef struct { - uint16_t class; - const char *desc; - const char *fw_name; - uint16_t fw_ign_bits; -} pci_class_desc; - static const pci_class_desc pci_class_descriptions[] =3D { { 0x0001, "VGA controller", "display"}, @@ -1776,7 +1768,7 @@ void pci_for_each_device(PCIBus *bus, int bus_num, } } =20 -static const pci_class_desc *get_class_desc(int class) +const pci_class_desc *get_class_desc(int class) { const pci_class_desc *desc; =20 @@ -1788,176 +1780,6 @@ static const pci_class_desc *get_class_desc(int cla= ss) return desc; } =20 -static PciDeviceInfoList *qmp_query_pci_devices(PCIBus *bus, int bus_num); - -static PciMemoryRegionList *qmp_query_pci_regions(const PCIDevice *dev) -{ - PciMemoryRegionList *head =3D NULL, **tail =3D &head; - int i; - - for (i =3D 0; i < PCI_NUM_REGIONS; i++) { - const PCIIORegion *r =3D &dev->io_regions[i]; - PciMemoryRegion *region; - - if (!r->size) { - continue; - } - - region =3D g_malloc0(sizeof(*region)); - - if (r->type & PCI_BASE_ADDRESS_SPACE_IO) { - region->type =3D g_strdup("io"); - } else { - region->type =3D g_strdup("memory"); - region->has_prefetch =3D true; - region->prefetch =3D !!(r->type & PCI_BASE_ADDRESS_MEM_PREFETC= H); - region->has_mem_type_64 =3D true; - region->mem_type_64 =3D !!(r->type & PCI_BASE_ADDRESS_MEM_TYPE= _64); - } - - region->bar =3D i; - region->address =3D r->addr; - region->size =3D r->size; - - QAPI_LIST_APPEND(tail, region); - } - - return head; -} - -static PciBridgeInfo *qmp_query_pci_bridge(PCIDevice *dev, PCIBus *bus, - int bus_num) -{ - PciBridgeInfo *info; - PciMemoryRange *range; - - info =3D g_new0(PciBridgeInfo, 1); - - info->bus =3D g_new0(PciBusInfo, 1); - info->bus->number =3D dev->config[PCI_PRIMARY_BUS]; - info->bus->secondary =3D dev->config[PCI_SECONDARY_BUS]; - info->bus->subordinate =3D dev->config[PCI_SUBORDINATE_BUS]; - - range =3D info->bus->io_range =3D g_new0(PciMemoryRange, 1); - range->base =3D pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_IO); - range->limit =3D pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_IO); - - range =3D info->bus->memory_range =3D g_new0(PciMemoryRange, 1); - range->base =3D pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_MEMORY= ); - range->limit =3D pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_MEMO= RY); - - range =3D info->bus->prefetchable_range =3D g_new0(PciMemoryRange, 1); - range->base =3D pci_bridge_get_base(dev, PCI_BASE_ADDRESS_MEM_PREFETCH= ); - range->limit =3D pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_MEM_PREFET= CH); - - if (dev->config[PCI_SECONDARY_BUS] !=3D 0) { - PCIBus *child_bus =3D pci_find_bus_nr(bus, - dev->config[PCI_SECONDARY_BUS]= ); - if (child_bus) { - info->has_devices =3D true; - info->devices =3D qmp_query_pci_devices(child_bus, - dev->config[PCI_SECONDARY_BUS]= ); - } - } - - return info; -} - -static PciDeviceInfo *qmp_query_pci_device(PCIDevice *dev, PCIBus *bus, - int bus_num) -{ - const pci_class_desc *desc; - PciDeviceInfo *info; - uint8_t type; - int class; - - info =3D g_new0(PciDeviceInfo, 1); - info->bus =3D bus_num; - info->slot =3D PCI_SLOT(dev->devfn); - info->function =3D PCI_FUNC(dev->devfn); - - info->class_info =3D g_new0(PciDeviceClass, 1); - class =3D pci_get_word(dev->config + PCI_CLASS_DEVICE); - info->class_info->q_class =3D class; - desc =3D get_class_desc(class); - if (desc->desc) { - info->class_info->desc =3D g_strdup(desc->desc); - } - - info->id =3D g_new0(PciDeviceId, 1); - info->id->vendor =3D pci_get_word(dev->config + PCI_VENDOR_ID); - info->id->device =3D pci_get_word(dev->config + PCI_DEVICE_ID); - info->regions =3D qmp_query_pci_regions(dev); - info->qdev_id =3D g_strdup(dev->qdev.id ? dev->qdev.id : ""); - - info->irq_pin =3D dev->config[PCI_INTERRUPT_PIN]; - if (dev->config[PCI_INTERRUPT_PIN] !=3D 0) { - info->has_irq =3D true; - info->irq =3D dev->config[PCI_INTERRUPT_LINE]; - } - - type =3D dev->config[PCI_HEADER_TYPE] & ~PCI_HEADER_TYPE_MULTI_FUNCTIO= N; - if (type =3D=3D PCI_HEADER_TYPE_BRIDGE) { - info->pci_bridge =3D qmp_query_pci_bridge(dev, bus, bus_num); - } else if (type =3D=3D PCI_HEADER_TYPE_NORMAL) { - info->id->has_subsystem =3D info->id->has_subsystem_vendor =3D tru= e; - info->id->subsystem =3D pci_get_word(dev->config + PCI_SUBSYSTEM_I= D); - info->id->subsystem_vendor =3D - pci_get_word(dev->config + PCI_SUBSYSTEM_VENDOR_ID); - } else if (type =3D=3D PCI_HEADER_TYPE_CARDBUS) { - info->id->has_subsystem =3D info->id->has_subsystem_vendor =3D tru= e; - info->id->subsystem =3D pci_get_word(dev->config + PCI_CB_SUBSYSTE= M_ID); - info->id->subsystem_vendor =3D - pci_get_word(dev->config + PCI_CB_SUBSYSTEM_VENDOR_ID); - } - - return info; -} - -static PciDeviceInfoList *qmp_query_pci_devices(PCIBus *bus, int bus_num) -{ - PciDeviceInfoList *head =3D NULL, **tail =3D &head; - PCIDevice *dev; - int devfn; - - for (devfn =3D 0; devfn < ARRAY_SIZE(bus->devices); devfn++) { - dev =3D bus->devices[devfn]; - if (dev) { - QAPI_LIST_APPEND(tail, qmp_query_pci_device(dev, bus, bus_num)= ); - } - } - - return head; -} - -static PciInfo *qmp_query_pci_bus(PCIBus *bus, int bus_num) -{ - PciInfo *info =3D NULL; - - bus =3D pci_find_bus_nr(bus, bus_num); - if (bus) { - info =3D g_malloc0(sizeof(*info)); - info->bus =3D bus_num; - info->devices =3D qmp_query_pci_devices(bus, bus_num); - } - - return info; -} - -PciInfoList *qmp_query_pci(Error **errp) -{ - PciInfoList *head =3D NULL, **tail =3D &head; - PCIHostState *host_bridge; - - QLIST_FOREACH(host_bridge, &pci_host_bridges, next) { - QAPI_LIST_APPEND(tail, - qmp_query_pci_bus(host_bridge->bus, - pci_bus_num(host_bridge->bus))); - } - - return head; -} - /* Initialize a PCI NIC. */ PCIDevice *pci_nic_init_nofail(NICInfo *nd, PCIBus *rootbus, const char *default_model, @@ -2106,7 +1928,7 @@ static bool pci_root_bus_in_range(PCIBus *bus, int bu= s_num) return false; } =20 -static PCIBus *pci_find_bus_nr(PCIBus *bus, int bus_num) +PCIBus *pci_find_bus_nr(PCIBus *bus, int bus_num) { PCIBus *sec; =20 diff --git a/hw/pci/meson.build b/hw/pci/meson.build index 5aff7ed1c6..40721f1514 100644 --- a/hw/pci/meson.build +++ b/hw/pci/meson.build @@ -5,6 +5,7 @@ pci_ss.add(files( 'pci.c', 'pci_bridge.c', 'pci_host.c', + 'pci-qmp-cmds.c', 'pcie_sriov.c', 'shpc.c', 'slotid_cap.c' --=20 2.37.3