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Fri, 16 Dec 2022 20:49:14 +0000 Received: by hu-devc-lv-u18-c.qualcomm.com (Postfix, from userid 47164) id 0D40950011D; Fri, 16 Dec 2022 12:49:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type : content-type : content-transfer-encoding; s=qcppdkim1; bh=iaC8G5rkIs15l+QPNmN1n1vwy5rD4m/lDduhmnhE4XA=; b=hDkDQKUMn9WVhlIb3LknpSYX6rQc4BALHntmx5kodcaP+bPkHZc7xye/l8KyyukPzY/U jpNr5LqVNZBhOtkJZ2cHmrI+eQTj9lTxFesw/9ocjoncTT9CtQR3ZB/fEOVz9+KXWs7Q YEfl68yGiwyRfAc3XWNAzEWWLR/eiTQGvEuYMIzHx0xceDWg4wRoJQzyqqEsqA9er0N1 wEnfeWwcBr9iA59CO35Oe7GRckarPm9e4caNRsDI1zrmYVNSWDFAcKvUfqWUiVts8qAT rIQAtDhIRhajUJaq0BIOPxBatzI7/dr10qtrfniPIcNHulz1Ar6CLScfSxVoovD1ZEMO og== From: Taylor Simpson To: qemu-devel@nongnu.org Cc: tsimpson@quicinc.com, richard.henderson@linaro.org, philmd@linaro.org, peter.maydell@linaro.org, bcain@quicinc.com, quic_mathbern@quicinc.com, stefanha@redhat.com, =?UTF-8?q?Niccol=C3=B2=20Izzo?= , Alessandro Di Federico , Anton Johansson Subject: [PULL 16/21] target/hexagon: introduce new helper functions Date: Fri, 16 Dec 2022 12:48:40 -0800 Message-Id: <20221216204845.19290-17-tsimpson@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221216204845.19290-1-tsimpson@quicinc.com> References: <20221216204845.19290-1-tsimpson@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: v1wakmaJczuvNTT0M4htTigwWk97FhQs X-Proofpoint-ORIG-GUID: v1wakmaJczuvNTT0M4htTigwWk97FhQs X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-16_14,2022-12-15_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1011 mlxscore=0 mlxlogscore=250 adultscore=0 phishscore=0 impostorscore=0 malwarescore=0 suspectscore=0 spamscore=0 bulkscore=0 lowpriorityscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2212160185 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=tsimpson@qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @quicinc.com) X-ZM-MESSAGEID: 1671223787469100004 Content-Type: text/plain; charset="utf-8" From: Niccol=C3=B2 Izzo These helpers will be employed by the idef-parser generated code, to correctly implement instruction semantics. "Helper" functions, in the context of this patch, refers to functions which provide a manual TCG implementation of certain features. Signed-off-by: Alessandro Di Federico Signed-off-by: Niccol=C3=B2 Izzo Signed-off-by: Anton Johansson Signed-off-by: Taylor Simpson Reviewed-by: Taylor Simpson Message-Id: <20220923173831.227551-6-anjo@rev.ng> --- target/hexagon/genptr.h | 13 ++++ target/hexagon/macros.h | 9 +++ target/hexagon/genptr.c | 146 +++++++++++++++++++++++++++++++++++++++- 3 files changed, 166 insertions(+), 2 deletions(-) diff --git a/target/hexagon/genptr.h b/target/hexagon/genptr.h index e126c46255..591b059698 100644 --- a/target/hexagon/genptr.h +++ b/target/hexagon/genptr.h @@ -33,9 +33,22 @@ void gen_store1i(TCGv_env cpu_env, TCGv vaddr, int32_t s= rc, uint32_t slot); void gen_store2i(TCGv_env cpu_env, TCGv vaddr, int32_t src, uint32_t slot); void gen_store4i(TCGv_env cpu_env, TCGv vaddr, int32_t src, uint32_t slot); void gen_store8i(TCGv_env cpu_env, TCGv vaddr, int64_t src, uint32_t slot); +TCGv gen_read_reg(TCGv result, int num); TCGv gen_read_preg(TCGv pred, uint8_t num); void gen_log_reg_write(int rnum, TCGv val); void gen_log_pred_write(DisasContext *ctx, int pnum, TCGv val); +void gen_set_usr_field(int field, TCGv val); +void gen_set_usr_fieldi(int field, int x); +void gen_set_usr_field_if(int field, TCGv val); +void gen_sat_i32(TCGv dest, TCGv source, int width); +void gen_sat_i32_ovfl(TCGv ovfl, TCGv dest, TCGv source, int width); +void gen_satu_i32(TCGv dest, TCGv source, int width); +void gen_satu_i32_ovfl(TCGv ovfl, TCGv dest, TCGv source, int width); +void gen_sat_i64(TCGv_i64 dest, TCGv_i64 source, int width); +void gen_sat_i64_ovfl(TCGv ovfl, TCGv_i64 dest, TCGv_i64 source, int width= ); +void gen_satu_i64(TCGv_i64 dest, TCGv_i64 source, int width); +void gen_satu_i64_ovfl(TCGv ovfl, TCGv_i64 dest, TCGv_i64 source, int widt= h); +void gen_add_sat_i64(TCGv_i64 ret, TCGv_i64 a, TCGv_i64 b); TCGv gen_8bitsof(TCGv result, TCGv value); void gen_set_byte_i64(int N, TCGv_i64 result, TCGv src); TCGv gen_get_byte(TCGv result, int N, TCGv src, bool sign); diff --git a/target/hexagon/macros.h b/target/hexagon/macros.h index 1a31542010..cd64bb8eec 100644 --- a/target/hexagon/macros.h +++ b/target/hexagon/macros.h @@ -197,7 +197,16 @@ #define MEM_STORE8(VA, DATA, SLOT) log_store64(env, VA, DATA, 8, SLOT) #endif =20 +#ifdef QEMU_GENERATE +static inline void gen_cancel(uint32_t slot) +{ + tcg_gen_ori_tl(hex_slot_cancelled, hex_slot_cancelled, 1 << slot); +} + +#define CANCEL gen_cancel(slot); +#else #define CANCEL cancel_slot(env, slot) +#endif =20 #define LOAD_CANCEL(EA) do { CANCEL; } while (0) =20 diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c index 3fe279ce8c..6cf2e0ed43 100644 --- a/target/hexagon/genptr.c +++ b/target/hexagon/genptr.c @@ -31,6 +31,12 @@ #include "gen_tcg_hvx.h" #include "genptr.h" =20 +TCGv gen_read_reg(TCGv result, int num) +{ + tcg_gen_mov_tl(result, hex_gpr[num]); + return result; +} + TCGv gen_read_preg(TCGv pred, uint8_t num) { tcg_gen_mov_tl(pred, hex_pred[num]); @@ -506,7 +512,7 @@ static void gen_write_new_pc_pcrel(DisasContext *ctx, i= nt pc_off, } } =20 -static void gen_set_usr_field(int field, TCGv val) +void gen_set_usr_field(int field, TCGv val) { tcg_gen_deposit_tl(hex_new_value[HEX_REG_USR], hex_new_value[HEX_REG_U= SR], val, @@ -514,7 +520,7 @@ static void gen_set_usr_field(int field, TCGv val) reg_field_info[field].width); } =20 -static void gen_set_usr_fieldi(int field, int x) +void gen_set_usr_fieldi(int field, int x) { if (reg_field_info[field].width =3D=3D 1) { target_ulong bit =3D 1 << reg_field_info[field].offset; @@ -1028,5 +1034,141 @@ void probe_noshuf_load(TCGv va, int s, int mi) gen_helper_probe_noshuf_load(cpu_env, va, size, mem_idx); } =20 +/* + * Note: Since this function might branch, `val` is + * required to be a `tcg_temp_local`. + */ +void gen_set_usr_field_if(int field, TCGv val) +{ + /* Sets the USR field if `val` is non-zero */ + if (reg_field_info[field].width =3D=3D 1) { + TCGv tmp =3D tcg_temp_new(); + tcg_gen_extract_tl(tmp, val, 0, reg_field_info[field].width); + tcg_gen_shli_tl(tmp, tmp, reg_field_info[field].offset); + tcg_gen_or_tl(hex_new_value[HEX_REG_USR], + hex_new_value[HEX_REG_USR], + tmp); + tcg_temp_free(tmp); + } else { + TCGLabel *skip_label =3D gen_new_label(); + tcg_gen_brcondi_tl(TCG_COND_EQ, val, 0, skip_label); + gen_set_usr_field(field, val); + gen_set_label(skip_label); + } +} + +void gen_sat_i32(TCGv dest, TCGv source, int width) +{ + TCGv max_val =3D tcg_constant_tl((1 << (width - 1)) - 1); + TCGv min_val =3D tcg_constant_tl(-(1 << (width - 1))); + tcg_gen_smin_tl(dest, source, max_val); + tcg_gen_smax_tl(dest, dest, min_val); +} + +void gen_sat_i32_ovfl(TCGv ovfl, TCGv dest, TCGv source, int width) +{ + gen_sat_i32(dest, source, width); + tcg_gen_setcond_tl(TCG_COND_NE, ovfl, source, dest); +} + +void gen_satu_i32(TCGv dest, TCGv source, int width) +{ + TCGv max_val =3D tcg_constant_tl((1 << width) - 1); + TCGv zero =3D tcg_constant_tl(0); + tcg_gen_movcond_tl(TCG_COND_GTU, dest, source, max_val, max_val, sourc= e); + tcg_gen_movcond_tl(TCG_COND_LT, dest, source, zero, zero, dest); +} + +void gen_satu_i32_ovfl(TCGv ovfl, TCGv dest, TCGv source, int width) +{ + gen_satu_i32(dest, source, width); + tcg_gen_setcond_tl(TCG_COND_NE, ovfl, source, dest); +} + +void gen_sat_i64(TCGv_i64 dest, TCGv_i64 source, int width) +{ + TCGv_i64 max_val =3D tcg_constant_i64((1LL << (width - 1)) - 1LL); + TCGv_i64 min_val =3D tcg_constant_i64(-(1LL << (width - 1))); + tcg_gen_smin_i64(dest, source, max_val); + tcg_gen_smax_i64(dest, dest, min_val); +} + +void gen_sat_i64_ovfl(TCGv ovfl, TCGv_i64 dest, TCGv_i64 source, int width) +{ + TCGv_i64 ovfl_64; + gen_sat_i64(dest, source, width); + ovfl_64 =3D tcg_temp_new_i64(); + tcg_gen_setcond_i64(TCG_COND_NE, ovfl_64, dest, source); + tcg_gen_trunc_i64_tl(ovfl, ovfl_64); + tcg_temp_free_i64(ovfl_64); +} + +void gen_satu_i64(TCGv_i64 dest, TCGv_i64 source, int width) +{ + TCGv_i64 max_val =3D tcg_constant_i64((1LL << width) - 1LL); + TCGv_i64 zero =3D tcg_constant_i64(0); + tcg_gen_movcond_i64(TCG_COND_GTU, dest, source, max_val, max_val, sour= ce); + tcg_gen_movcond_i64(TCG_COND_LT, dest, source, zero, zero, dest); +} + +void gen_satu_i64_ovfl(TCGv ovfl, TCGv_i64 dest, TCGv_i64 source, int widt= h) +{ + TCGv_i64 ovfl_64; + gen_satu_i64(dest, source, width); + ovfl_64 =3D tcg_temp_new_i64(); + tcg_gen_setcond_i64(TCG_COND_NE, ovfl_64, dest, source); + tcg_gen_trunc_i64_tl(ovfl, ovfl_64); + tcg_temp_free_i64(ovfl_64); +} + +/* Implements the fADDSAT64 macro in TCG */ +void gen_add_sat_i64(TCGv_i64 ret, TCGv_i64 a, TCGv_i64 b) +{ + TCGv_i64 sum =3D tcg_temp_local_new_i64(); + TCGv_i64 xor =3D tcg_temp_new_i64(); + TCGv_i64 cond1 =3D tcg_temp_new_i64(); + TCGv_i64 cond2 =3D tcg_temp_local_new_i64(); + TCGv_i64 cond3 =3D tcg_temp_new_i64(); + TCGv_i64 mask =3D tcg_constant_i64(0x8000000000000000ULL); + TCGv_i64 max_pos =3D tcg_constant_i64(0x7FFFFFFFFFFFFFFFLL); + TCGv_i64 max_neg =3D tcg_constant_i64(0x8000000000000000LL); + TCGv_i64 zero =3D tcg_constant_i64(0); + TCGLabel *no_ovfl_label =3D gen_new_label(); + TCGLabel *ovfl_label =3D gen_new_label(); + TCGLabel *ret_label =3D gen_new_label(); + + tcg_gen_add_i64(sum, a, b); + tcg_gen_xor_i64(xor, a, b); + + /* if (xor & mask) */ + tcg_gen_and_i64(cond1, xor, mask); + tcg_temp_free_i64(xor); + tcg_gen_brcondi_i64(TCG_COND_NE, cond1, 0, no_ovfl_label); + tcg_temp_free_i64(cond1); + + /* else if ((a ^ sum) & mask) */ + tcg_gen_xor_i64(cond2, a, sum); + tcg_gen_and_i64(cond2, cond2, mask); + tcg_gen_brcondi_i64(TCG_COND_NE, cond2, 0, ovfl_label); + tcg_temp_free_i64(cond2); + /* fallthrough to no_ovfl_label branch */ + + /* if branch */ + gen_set_label(no_ovfl_label); + tcg_gen_mov_i64(ret, sum); + tcg_gen_br(ret_label); + + /* else if branch */ + gen_set_label(ovfl_label); + tcg_gen_and_i64(cond3, sum, mask); + tcg_temp_free_i64(mask); + tcg_temp_free_i64(sum); + tcg_gen_movcond_i64(TCG_COND_NE, ret, cond3, zero, max_pos, max_neg); + tcg_temp_free_i64(cond3); + SET_USR_FIELD(USR_OVF, 1); + + gen_set_label(ret_label); +} + #include "tcg_funcs_generated.c.inc" #include "tcg_func_table_generated.c.inc" --=20 2.17.1