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([2806:102e:18:2efc:c63:85ed:4256:8ad0]) by smtp.gmail.com with ESMTPSA id a7-20020a056808098700b0035c073aa0d8sm5006831oic.18.2022.12.13.13.26.03 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Dec 2022 13:26:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=KxCamUeUIq5ZNxrpta7OQIQz8HOjJD91HgCQ1yrQkYo=; b=Qxo/R8wPpWtP4494uxwRpLrxb9EXVrp6X9O3PuPH3wdgijBb3GxxFGYx6SM3lDQCD0 8ratugMRfNr8QdrUAhr7WQTxyu/+vDfcuTPmlECbN6/aBdCQNEg2MkKxYRd21SEzfNcZ t/O5lPpEqcAsG2hDOBn12q5YSuEjtWxtqQhkaNib1NgZKFt87vvONqxF8Ja3QSzjn4J5 3vVvmLaFXKfYCkI4pD1P3EF7faCUg+v3UiCJCi32tn3T4mpWD7J98DRGRVszxfGdbCRL 8/QF9KL/kMoBYSHPS5/52RjvUkiCUmdYpNeBjpyoWYg/XRb1vMSdtiLvgagIZTRaeBkM XbYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=KxCamUeUIq5ZNxrpta7OQIQz8HOjJD91HgCQ1yrQkYo=; b=VxDK1qO7FiaQMXmvH8S3+9IXVTOrfs5d0P210EPYxZ6GUTwqDTi+5BfKAG6cyMgGo6 3Lf0VUwjv0lZq2ABhhdb5jT+w/VkbiPXZZNecSKjGyH94mkizm9HVlh3hxBzCQwAcDfD 5Ah0915WBhbKAnzOGtuITSWNdzwYTR1xtiBHsHXxrnQP77GP5a5nbEJRk+AHp7ZBw40h reL5pHC/nBFt+6JwrvO3qtwUvt3PJt+gZsrv4OmueqDwLf6F+MNKO39QBkYMsXkQN7/8 wd+U2RQJRl+f5TfRC5MOOwKvUC/OvfsgK5y8jKL9h04pJ+zRPodlUtZyOE6+M7oK3tmA iNVg== X-Gm-Message-State: ANoB5pkbp/+2+hz8L0Ej0DugQjL2EK+DZItfIXaR89BG9uXTkoOeRF+I /370SoqqpSSPAf6MQVzLJN2A+rrQRXWd6scf6Jk= X-Google-Smtp-Source: AA0mqf5iBsFpZs5wnT/TfxfAoNyD3Na9/GckSGT+vroLcnjy0NUWIrY06BYEm0CYXWyi9PfVJPWdJQ== X-Received: by 2002:aca:6503:0:b0:35e:4620:ee8b with SMTP id m3-20020aca6503000000b0035e4620ee8bmr9953867oim.33.1670966764313; Tue, 13 Dec 2022 13:26:04 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 20/27] tcg: Vary the allocation size for TCGOp Date: Tue, 13 Dec 2022 15:25:34 -0600 Message-Id: <20221213212541.1820840-21-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221213212541.1820840-1-richard.henderson@linaro.org> References: <20221213212541.1820840-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::22b; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x22b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670967376952100001 Content-Type: text/plain; charset="utf-8" We have been allocating a worst case number of arguments to support calls. Instead, allow the size to vary. By default leave space for 4 args, to maximize reuse, but allow calls to increase the number of args to 32. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- include/exec/helper-head.h | 2 -- include/tcg/tcg-op.h | 2 +- include/tcg/tcg.h | 54 +++++++++++++-------------------- accel/tcg/plugin-gen.c | 11 ++++--- tcg/optimize.c | 4 +-- tcg/tcg-op-vec.c | 8 ++--- tcg/tcg-op.c | 12 ++++---- tcg/tcg.c | 61 +++++++++++++++++++++++++------------- 8 files changed, 82 insertions(+), 72 deletions(-) diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h index e242fed46e..8bdf0f6ea2 100644 --- a/include/exec/helper-head.h +++ b/include/exec/helper-head.h @@ -133,6 +133,4 @@ #define DEF_HELPER_7(name, ret, t1, t2, t3, t4, t5, t6, t7) \ DEF_HELPER_FLAGS_7(name, 0, ret, t1, t2, t3, t4, t5, t6, t7) =20 -/* MAX_OPC_PARAM_IARGS must be set to n if last entry is DEF_HELPER_FLAGS_= n. */ - #endif /* EXEC_HELPER_HEAD_H */ diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h index 8176f194cb..79b1cf786f 100644 --- a/include/tcg/tcg-op.h +++ b/include/tcg/tcg-op.h @@ -818,7 +818,7 @@ static inline void tcg_gen_plugin_cb_start(unsigned fro= m, unsigned type, =20 static inline void tcg_gen_plugin_cb_end(void) { - tcg_emit_op(INDEX_op_plugin_cb_end); + tcg_emit_op(INDEX_op_plugin_cb_end, 0); } =20 #if TARGET_LONG_BITS =3D=3D 32 diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 8bcd60d0ed..d430ea10c8 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -38,20 +38,6 @@ /* XXX: make safe guess about sizes */ #define MAX_OP_PER_INSTR 266 =20 -#if HOST_LONG_BITS =3D=3D 32 -#define MAX_OPC_PARAM_PER_ARG 2 -#else -#define MAX_OPC_PARAM_PER_ARG 1 -#endif -#define MAX_OPC_PARAM_IARGS 7 -#define MAX_OPC_PARAM_OARGS 1 -#define MAX_OPC_PARAM_ARGS (MAX_OPC_PARAM_IARGS + MAX_OPC_PARAM_OARGS) - -/* A Call op needs up to 4 + 2N parameters on 32-bit archs, - * and up to 4 + N parameters on 64-bit archs - * (N =3D number of input arguments + output arguments). */ -#define MAX_OPC_PARAM (4 + (MAX_OPC_PARAM_PER_ARG * MAX_OPC_PARAM_ARGS)) - #define CPU_TEMP_BUF_NLONGS 128 #define TCG_STATIC_FRAME_SIZE (CPU_TEMP_BUF_NLONGS * sizeof(long)) =20 @@ -493,34 +479,34 @@ typedef struct TCGTempSet { unsigned long l[BITS_TO_LONGS(TCG_MAX_TEMPS)]; } TCGTempSet; =20 -/* While we limit helpers to 6 arguments, for 32-bit hosts, with padding, - this imples a max of 6*2 (64-bit in) + 2 (64-bit out) =3D 14 operands. - There are never more than 2 outputs, which means that we can store all - dead + sync data within 16 bits. */ -#define DEAD_ARG 4 -#define SYNC_ARG 1 -typedef uint16_t TCGLifeData; +/* + * With 1 128-bit output, a 32-bit host requires 4 output parameters, + * which leaves a maximum of 28 other slots. Which is enough for 7 + * 128-bit operands. + */ +#define DEAD_ARG (1 << 4) +#define SYNC_ARG (1 << 0) +typedef uint32_t TCGLifeData; =20 -/* The layout here is designed to avoid a bitfield crossing of - a 32-bit boundary, which would cause GCC to add extra padding. */ typedef struct TCGOp { - TCGOpcode opc : 8; /* 8 */ + TCGOpcode opc : 8; + unsigned nargs : 8; =20 /* Parameters for this opcode. See below. */ - unsigned param1 : 4; /* 12 */ - unsigned param2 : 4; /* 16 */ + unsigned param1 : 8; + unsigned param2 : 8; =20 /* Lifetime data of the operands. */ - unsigned life : 16; /* 32 */ + TCGLifeData life; =20 /* Next and previous opcodes. */ QTAILQ_ENTRY(TCGOp) link; =20 - /* Arguments for the opcode. */ - TCGArg args[MAX_OPC_PARAM]; - /* Register preferences for the output(s). */ TCGRegSet output_pref[2]; + + /* Arguments for the opcode. */ + TCGArg args[]; } TCGOp; =20 #define TCGOP_CALLI(X) (X)->param1 @@ -1014,10 +1000,12 @@ bool tcg_op_supported(TCGOpcode op); =20 void tcg_gen_callN(void *func, TCGTemp *ret, int nargs, TCGTemp **args); =20 -TCGOp *tcg_emit_op(TCGOpcode opc); +TCGOp *tcg_emit_op(TCGOpcode opc, unsigned nargs); void tcg_op_remove(TCGContext *s, TCGOp *op); -TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *op, TCGOpcode opc); -TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *op, TCGOpcode opc); +TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *op, + TCGOpcode opc, unsigned nargs); +TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *op, + TCGOpcode opc, unsigned nargs); =20 /** * tcg_remove_ops_after: diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index a6aaacd053..c7d6514840 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -258,10 +258,13 @@ static TCGOp *rm_ops(TCGOp *op) =20 static TCGOp *copy_op_nocheck(TCGOp **begin_op, TCGOp *op) { - *begin_op =3D QTAILQ_NEXT(*begin_op, link); - tcg_debug_assert(*begin_op); - op =3D tcg_op_insert_after(tcg_ctx, op, (*begin_op)->opc); - memcpy(op->args, (*begin_op)->args, sizeof(op->args)); + TCGOp *old_op =3D QTAILQ_NEXT(*begin_op, link); + unsigned nargs =3D old_op->nargs; + + *begin_op =3D old_op; + op =3D tcg_op_insert_after(tcg_ctx, op, old_op->opc, nargs); + memcpy(op->args, old_op->args, sizeof(op->args[0]) * nargs); + return op; } =20 diff --git a/tcg/optimize.c b/tcg/optimize.c index ae081ab29c..1afd50175b 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -962,7 +962,7 @@ static bool fold_addsub2(OptContext *ctx, TCGOp *op, bo= ol add) rh =3D op->args[1]; =20 /* The proper opcode is supplied by tcg_opt_gen_mov. */ - op2 =3D tcg_op_insert_before(ctx->tcg, op, 0); + op2 =3D tcg_op_insert_before(ctx->tcg, op, 0, 2); =20 tcg_opt_gen_movi(ctx, op, rl, al); tcg_opt_gen_movi(ctx, op2, rh, ah); @@ -1613,7 +1613,7 @@ static bool fold_multiply2(OptContext *ctx, TCGOp *op) rh =3D op->args[1]; =20 /* The proper opcode is supplied by tcg_opt_gen_mov. */ - op2 =3D tcg_op_insert_before(ctx->tcg, op, 0); + op2 =3D tcg_op_insert_before(ctx->tcg, op, 0, 2); =20 tcg_opt_gen_movi(ctx, op, rl, l); tcg_opt_gen_movi(ctx, op2, rh, h); diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c index 5bf100ea7d..966d41d65a 100644 --- a/tcg/tcg-op-vec.c +++ b/tcg/tcg-op-vec.c @@ -152,7 +152,7 @@ bool tcg_can_emit_vecop_list(const TCGOpcode *list, =20 void vec_gen_2(TCGOpcode opc, TCGType type, unsigned vece, TCGArg r, TCGAr= g a) { - TCGOp *op =3D tcg_emit_op(opc); + TCGOp *op =3D tcg_emit_op(opc, 2); TCGOP_VECL(op) =3D type - TCG_TYPE_V64; TCGOP_VECE(op) =3D vece; op->args[0] =3D r; @@ -162,7 +162,7 @@ void vec_gen_2(TCGOpcode opc, TCGType type, unsigned ve= ce, TCGArg r, TCGArg a) void vec_gen_3(TCGOpcode opc, TCGType type, unsigned vece, TCGArg r, TCGArg a, TCGArg b) { - TCGOp *op =3D tcg_emit_op(opc); + TCGOp *op =3D tcg_emit_op(opc, 3); TCGOP_VECL(op) =3D type - TCG_TYPE_V64; TCGOP_VECE(op) =3D vece; op->args[0] =3D r; @@ -173,7 +173,7 @@ void vec_gen_3(TCGOpcode opc, TCGType type, unsigned ve= ce, void vec_gen_4(TCGOpcode opc, TCGType type, unsigned vece, TCGArg r, TCGArg a, TCGArg b, TCGArg c) { - TCGOp *op =3D tcg_emit_op(opc); + TCGOp *op =3D tcg_emit_op(opc, 4); TCGOP_VECL(op) =3D type - TCG_TYPE_V64; TCGOP_VECE(op) =3D vece; op->args[0] =3D r; @@ -185,7 +185,7 @@ void vec_gen_4(TCGOpcode opc, TCGType type, unsigned ve= ce, static void vec_gen_6(TCGOpcode opc, TCGType type, unsigned vece, TCGArg r, TCGArg a, TCGArg b, TCGArg c, TCGArg d, TCGArg e) { - TCGOp *op =3D tcg_emit_op(opc); + TCGOp *op =3D tcg_emit_op(opc, 6); TCGOP_VECL(op) =3D type - TCG_TYPE_V64; TCGOP_VECE(op) =3D vece; op->args[0] =3D r; diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 6168327030..cd1cd4e736 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -33,20 +33,20 @@ =20 void tcg_gen_op1(TCGOpcode opc, TCGArg a1) { - TCGOp *op =3D tcg_emit_op(opc); + TCGOp *op =3D tcg_emit_op(opc, 1); op->args[0] =3D a1; } =20 void tcg_gen_op2(TCGOpcode opc, TCGArg a1, TCGArg a2) { - TCGOp *op =3D tcg_emit_op(opc); + TCGOp *op =3D tcg_emit_op(opc, 2); op->args[0] =3D a1; op->args[1] =3D a2; } =20 void tcg_gen_op3(TCGOpcode opc, TCGArg a1, TCGArg a2, TCGArg a3) { - TCGOp *op =3D tcg_emit_op(opc); + TCGOp *op =3D tcg_emit_op(opc, 3); op->args[0] =3D a1; op->args[1] =3D a2; op->args[2] =3D a3; @@ -54,7 +54,7 @@ void tcg_gen_op3(TCGOpcode opc, TCGArg a1, TCGArg a2, TCG= Arg a3) =20 void tcg_gen_op4(TCGOpcode opc, TCGArg a1, TCGArg a2, TCGArg a3, TCGArg a4) { - TCGOp *op =3D tcg_emit_op(opc); + TCGOp *op =3D tcg_emit_op(opc, 4); op->args[0] =3D a1; op->args[1] =3D a2; op->args[2] =3D a3; @@ -64,7 +64,7 @@ void tcg_gen_op4(TCGOpcode opc, TCGArg a1, TCGArg a2, TCG= Arg a3, TCGArg a4) void tcg_gen_op5(TCGOpcode opc, TCGArg a1, TCGArg a2, TCGArg a3, TCGArg a4, TCGArg a5) { - TCGOp *op =3D tcg_emit_op(opc); + TCGOp *op =3D tcg_emit_op(opc, 5); op->args[0] =3D a1; op->args[1] =3D a2; op->args[2] =3D a3; @@ -75,7 +75,7 @@ void tcg_gen_op5(TCGOpcode opc, TCGArg a1, TCGArg a2, TCG= Arg a3, void tcg_gen_op6(TCGOpcode opc, TCGArg a1, TCGArg a2, TCGArg a3, TCGArg a4, TCGArg a5, TCGArg a6) { - TCGOp *op =3D tcg_emit_op(opc); + TCGOp *op =3D tcg_emit_op(opc, 6); op->args[0] =3D a1; op->args[1] =3D a2; op->args[2] =3D a3; diff --git a/tcg/tcg.c b/tcg/tcg.c index aae4046e1b..ccbe947222 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1479,7 +1479,7 @@ bool tcg_op_supported(TCGOpcode op) and endian swap in tcg_reg_alloc_call(). */ void tcg_gen_callN(void *func, TCGTemp *ret, int nargs, TCGTemp **args) { - int i, real_args, nb_rets, pi; + int i, real_args, nb_rets, pi, max_args; unsigned typemask; const TCGHelperInfo *info; TCGOp *op; @@ -1513,7 +1513,13 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int nar= gs, TCGTemp **args) } } =20 - op =3D tcg_emit_op(INDEX_op_call); + /* + * A Call op needs up to 4 + 2N parameters on 32-bit archs, + * and up to 4 + N parameters on 64-bit archs + * (N =3D number of input arguments + output arguments). + */ + max_args =3D (64 / TCG_TARGET_REG_BITS) * nargs + 4; + op =3D tcg_emit_op(INDEX_op_call, max_args); =20 pi =3D 0; if (ret !=3D NULL) { @@ -1590,7 +1596,7 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int narg= s, TCGTemp **args) =20 /* Make sure the fields didn't overflow. */ tcg_debug_assert(TCGOP_CALLI(op) =3D=3D real_args); - tcg_debug_assert(pi <=3D ARRAY_SIZE(op->args)); + tcg_debug_assert(pi <=3D max_args); =20 if (TCG_TARGET_CALL_ARG_I32 =3D=3D TCG_CALL_ARG_EXTEND) { for (i =3D 0; i < nargs; ++i) { @@ -2294,41 +2300,56 @@ void tcg_remove_ops_after(TCGOp *op) } } =20 -static TCGOp *tcg_op_alloc(TCGOpcode opc) +static TCGOp *tcg_op_alloc(TCGOpcode opc, unsigned nargs) { TCGContext *s =3D tcg_ctx; - TCGOp *op; + TCGOp *op =3D NULL; =20 - if (likely(QTAILQ_EMPTY(&s->free_ops))) { - op =3D tcg_malloc(sizeof(TCGOp)); - } else { - op =3D QTAILQ_FIRST(&s->free_ops); - QTAILQ_REMOVE(&s->free_ops, op, link); + if (unlikely(!QTAILQ_EMPTY(&s->free_ops))) { + QTAILQ_FOREACH(op, &s->free_ops, link) { + if (nargs <=3D op->nargs) { + QTAILQ_REMOVE(&s->free_ops, op, link); + nargs =3D op->nargs; + goto found; + } + } } + + /* Most opcodes have 3 or 4 operands: reduce fragmentation. */ + nargs =3D MAX(4, nargs); + op =3D tcg_malloc(sizeof(TCGOp) + sizeof(TCGArg) * nargs); + + found: memset(op, 0, offsetof(TCGOp, link)); op->opc =3D opc; - s->nb_ops++; + op->nargs =3D nargs; =20 + /* Check for bitfield overflow. */ + tcg_debug_assert(op->nargs =3D=3D nargs); + + s->nb_ops++; return op; } =20 -TCGOp *tcg_emit_op(TCGOpcode opc) +TCGOp *tcg_emit_op(TCGOpcode opc, unsigned nargs) { - TCGOp *op =3D tcg_op_alloc(opc); + TCGOp *op =3D tcg_op_alloc(opc, nargs); QTAILQ_INSERT_TAIL(&tcg_ctx->ops, op, link); return op; } =20 -TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *old_op, TCGOpcode opc) +TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *old_op, + TCGOpcode opc, unsigned nargs) { - TCGOp *new_op =3D tcg_op_alloc(opc); + TCGOp *new_op =3D tcg_op_alloc(opc, nargs); QTAILQ_INSERT_BEFORE(old_op, new_op, link); return new_op; } =20 -TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *old_op, TCGOpcode opc) +TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *old_op, + TCGOpcode opc, unsigned nargs) { - TCGOp *new_op =3D tcg_op_alloc(opc); + TCGOp *new_op =3D tcg_op_alloc(opc, nargs); QTAILQ_INSERT_AFTER(&s->ops, old_op, new_op, link); return new_op; } @@ -2937,7 +2958,7 @@ static bool liveness_pass_2(TCGContext *s) TCGOpcode lopc =3D (arg_ts->type =3D=3D TCG_TYPE_I32 ? INDEX_op_ld_i32 : INDEX_op_ld_i64); - TCGOp *lop =3D tcg_op_insert_before(s, op, lopc); + TCGOp *lop =3D tcg_op_insert_before(s, op, lopc, 3); =20 lop->args[0] =3D temp_arg(dir_ts); lop->args[1] =3D temp_arg(arg_ts->mem_base); @@ -3003,7 +3024,7 @@ static bool liveness_pass_2(TCGContext *s) TCGOpcode sopc =3D (arg_ts->type =3D=3D TCG_TYPE_I32 ? INDEX_op_st_i32 : INDEX_op_st_i64); - TCGOp *sop =3D tcg_op_insert_after(s, op, sopc); + TCGOp *sop =3D tcg_op_insert_after(s, op, sopc, 3); TCGTemp *out_ts =3D dir_ts; =20 if (IS_DEAD_ARG(0)) { @@ -3039,7 +3060,7 @@ static bool liveness_pass_2(TCGContext *s) TCGOpcode sopc =3D (arg_ts->type =3D=3D TCG_TYPE_I32 ? INDEX_op_st_i32 : INDEX_op_st_i64); - TCGOp *sop =3D tcg_op_insert_after(s, op, sopc); + TCGOp *sop =3D tcg_op_insert_after(s, op, sopc, 3); =20 sop->args[0] =3D temp_arg(dir_ts); sop->args[1] =3D temp_arg(arg_ts->mem_base); --=20 2.34.1