From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670551715; cv=none; d=zohomail.com; s=zohoarc; b=JLyt+dj9+f8IK2yAkTSwWovUAtCrFT6wsHpoml38vNJuM8tJMSmWskFUUwnFB7HU72iFYlOy8vC78ctDvVzV8nN50dQi/6GbW/5CpJjNA8/8sAKboHH1VGa4JSV0MDDCLs3Ehq9LRjKRJskY2RCSWiGHnqn+DlR4zCe5gACiq+g= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670551715; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=tLBGpsh6MTEMtw6+WKTyIS5KlZ4TUnE33H/La06GVTk=; b=YMgf7QSgvbqbKiqSucQlzZCHJpdtNYCaB5H7wmQ4UhgG+R7E5eQXZSwiOEIUcrb5vmqj8/qFN3FCC1JNvPUAHWdcb0xe8wohTL8wi9TGIVUG613n/7hD9uYXyBOIMbl5lySHR5ilwuLtMXO3Wqtaa+zEpE2EdkAwGCPqghEitk8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1670551715381109.28904045188915; Thu, 8 Dec 2022 18:08:35 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3Slg-0005tW-84; Thu, 08 Dec 2022 21:05:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3Sle-0005sv-7P for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:38 -0500 Received: from mail-ot1-x32f.google.com ([2607:f8b0:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Slc-0001sJ-EG for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:37 -0500 Received: by mail-ot1-x32f.google.com with SMTP id m6-20020a9d7e86000000b0066ec505ae93so1979785otp.9 for ; Thu, 08 Dec 2022 18:05:35 -0800 (PST) Received: from stoup.. ([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.05.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:05:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tLBGpsh6MTEMtw6+WKTyIS5KlZ4TUnE33H/La06GVTk=; b=hdAAEQfc1XuN6rLOokMQgTRriEyyMhQE/SABt2hFLnm6XvBVKkF6nBGpPIL0g1IQ+N eQ9s3WB5V6IFhn8EMDflqqAWvkK2Wlttj7Mq2DCVLTVeyLr1pczw72xigV28iumbk6/0 8wPdmRFT5kSQraW58d7HEEixh+jCwBQ7NVYMulC/b2YX3U5qNOiBccdSUHZu2PE7P1c8 gh2ZRyWMGj0FGOzZfC7lHZOQkM6xBtuwCS5YzLfmKuJvBI4lhE7BCTkLSDmBMIFWJxUo Tq/M8Eqavb8giXm/AYCz+c6TkQE5tUzE7LeXcD4dK8PFc+fZ7ydUFN90sR9N5X+yPbPa ncJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tLBGpsh6MTEMtw6+WKTyIS5KlZ4TUnE33H/La06GVTk=; b=xsYwDtUiJdY1TJNYrFbz8EtS0PYm9O6CrSgRwGom99DVS2Jk+fF7uAMZ4HZDQKmOVt jq0YjN+WYLyp3lw5r8bXUpY9eMTByfRNYP/HPmVb/S99VeXE5ZmVsIByTAlb2I0f48bS m6UTZzrPpz6RA+mYTTE00Tyom+AhhxLRTUXH1FHWHS1SzOkIlyU78CitKTQRTNa4nv0J m82HRJXnx0LVTM5tioqkF5vndHBxYbes7+tQj3a/D3GAYdHlfAVIQLoGqINyi6Z0vVa7 mb28wPQKXQTaZbeg853w//kLcadJcLh/fYhDwmyPfc8fyHGNovEN9yWRu2JKdr/xermZ G80w== X-Gm-Message-State: ANoB5pklCJourwmxZCjm9/dyPvErWbWOpILi3Rd2R6TVpfe6IHjzQZ8F yjPExBGeYnx4hEtUpgiE21Xb1Mu6Kes1bvmMdzc= X-Google-Smtp-Source: AA0mqf5iKvn2cfjPRoMjwGn+ONKAO4j2dOgXGfNHq46f3oz1518RbFwFcynPooVhRzzz95y9MnsUxw== X-Received: by 2002:a05:6830:6113:b0:661:dfeb:a95f with SMTP id ca19-20020a056830611300b00661dfeba95fmr2827162otb.10.1670551534491; Thu, 08 Dec 2022 18:05:34 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 01/27] tcg/s390x: Use register pair allocation for div and mulu2 Date: Thu, 8 Dec 2022 20:05:04 -0600 Message-Id: <20221209020530.396391-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32f; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670551717448100003 Content-Type: text/plain; charset="utf-8" Previously we hard-coded R2 and R3. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target-con-set.h | 4 ++-- tcg/s390x/tcg-target-con-str.h | 8 +------ tcg/s390x/tcg-target.c.inc | 43 +++++++++++++++++++++++++--------- 3 files changed, 35 insertions(+), 20 deletions(-) diff --git a/tcg/s390x/tcg-target-con-set.h b/tcg/s390x/tcg-target-con-set.h index 426dd92e51..00ba727b70 100644 --- a/tcg/s390x/tcg-target-con-set.h +++ b/tcg/s390x/tcg-target-con-set.h @@ -29,8 +29,8 @@ C_O1_I2(v, v, v) C_O1_I3(v, v, v, v) C_O1_I4(r, r, ri, r, 0) C_O1_I4(r, r, ri, rI, 0) -C_O2_I2(b, a, 0, r) -C_O2_I3(b, a, 0, 1, r) +C_O2_I2(o, m, 0, r) +C_O2_I3(o, m, 0, 1, r) C_O2_I4(r, r, 0, 1, rA, r) C_O2_I4(r, r, 0, 1, ri, r) C_O2_I4(r, r, 0, 1, r, r) diff --git a/tcg/s390x/tcg-target-con-str.h b/tcg/s390x/tcg-target-con-str.h index 8bb0358ae5..76446aecae 100644 --- a/tcg/s390x/tcg-target-con-str.h +++ b/tcg/s390x/tcg-target-con-str.h @@ -11,13 +11,7 @@ REGS('r', ALL_GENERAL_REGS) REGS('L', ALL_GENERAL_REGS & ~SOFTMMU_RESERVE_REGS) REGS('v', ALL_VECTOR_REGS) -/* - * A (single) even/odd pair for division. - * TODO: Add something to the register allocator to allow - * this kind of regno+1 pairing to be done more generally. - */ -REGS('a', 1u << TCG_REG_R2) -REGS('b', 1u << TCG_REG_R3) +REGS('o', 0xaaaa) /* odd numbered general regs */ =20 /* * Define constraint letters for constants: diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index b9ba7b605e..cb00bb6999 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -2264,10 +2264,18 @@ static inline void tcg_out_op(TCGContext *s, TCGOpc= ode opc, break; =20 case INDEX_op_div2_i32: - tcg_out_insn(s, RR, DR, TCG_REG_R2, args[4]); + tcg_debug_assert(args[0] =3D=3D args[2]); + tcg_debug_assert(args[1] =3D=3D args[3]); + tcg_debug_assert((args[1] & 1) =3D=3D 0); + tcg_debug_assert(args[0] =3D=3D args[1] + 1); + tcg_out_insn(s, RR, DR, args[1], args[4]); break; case INDEX_op_divu2_i32: - tcg_out_insn(s, RRE, DLR, TCG_REG_R2, args[4]); + tcg_debug_assert(args[0] =3D=3D args[2]); + tcg_debug_assert(args[1] =3D=3D args[3]); + tcg_debug_assert((args[1] & 1) =3D=3D 0); + tcg_debug_assert(args[0] =3D=3D args[1] + 1); + tcg_out_insn(s, RRE, DLR, args[1], args[4]); break; =20 case INDEX_op_shl_i32: @@ -2521,17 +2529,30 @@ static inline void tcg_out_op(TCGContext *s, TCGOpc= ode opc, break; =20 case INDEX_op_div2_i64: - /* ??? We get an unnecessary sign-extension of the dividend - into R3 with this definition, but as we do in fact always - produce both quotient and remainder using INDEX_op_div_i64 - instead requires jumping through even more hoops. */ - tcg_out_insn(s, RRE, DSGR, TCG_REG_R2, args[4]); + /* + * ??? We get an unnecessary sign-extension of the dividend + * into op0 with this definition, but as we do in fact always + * produce both quotient and remainder using INDEX_op_div_i64 + * instead requires jumping through even more hoops. + */ + tcg_debug_assert(args[0] =3D=3D args[2]); + tcg_debug_assert(args[1] =3D=3D args[3]); + tcg_debug_assert((args[1] & 1) =3D=3D 0); + tcg_debug_assert(args[0] =3D=3D args[1] + 1); + tcg_out_insn(s, RRE, DSGR, args[1], args[4]); break; case INDEX_op_divu2_i64: - tcg_out_insn(s, RRE, DLGR, TCG_REG_R2, args[4]); + tcg_debug_assert(args[0] =3D=3D args[2]); + tcg_debug_assert(args[1] =3D=3D args[3]); + tcg_debug_assert((args[1] & 1) =3D=3D 0); + tcg_debug_assert(args[0] =3D=3D args[1] + 1); + tcg_out_insn(s, RRE, DLGR, args[1], args[4]); break; case INDEX_op_mulu2_i64: - tcg_out_insn(s, RRE, MLGR, TCG_REG_R2, args[3]); + tcg_debug_assert(args[0] =3D=3D args[2]); + tcg_debug_assert((args[1] & 1) =3D=3D 0); + tcg_debug_assert(args[0] =3D=3D args[1] + 1); + tcg_out_insn(s, RRE, MLGR, args[1], args[3]); break; =20 case INDEX_op_shl_i64: @@ -3226,10 +3247,10 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGO= pcode op) case INDEX_op_div2_i64: case INDEX_op_divu2_i32: case INDEX_op_divu2_i64: - return C_O2_I3(b, a, 0, 1, r); + return C_O2_I3(o, m, 0, 1, r); =20 case INDEX_op_mulu2_i64: - return C_O2_I2(b, a, 0, r); + return C_O2_I2(o, m, 0, r); =20 case INDEX_op_add2_i32: case INDEX_op_sub2_i32: --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670552157; cv=none; d=zohomail.com; s=zohoarc; b=iQWgmZjpRsZ6yoZ1BnhXjanBS6j8BkcJK/mF4oY2OrI6Wc4OhI5II5qMep6yRH0ITeH5quN1EQaP1mOEwuPiYd5NrcS/UwCvRZH1C7s1KhKIIkdHoui/b/0Yc+kR1CWkc4GVdEtL0/3rLUNWD7KU34XtLPrOOpuA4GIC014htKA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670552157; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Ozj5wc7NFmB3O/MgzepcpO4OOcL4F6DQsmKEPOxkO0Q=; b=CiZFr++2R1dV/nL5pZC0YyqOpcEfKK47bk8dDNi9iOYy/ON4XbHy1pD07hE62LSM7S53yJ4MsSxQzdXZnBjbXcMyl+GJkftztKDsrLP3ORaq0Y1XN65j7X30C0wHdmVLYaVlflDSE8nM84fekI2Wx0Pq5erAwukx5xFlLab495U= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1670552157748248.47017509265902; Thu, 8 Dec 2022 18:15:57 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3Slh-0005tu-TR; Thu, 08 Dec 2022 21:05:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3Slg-0005tM-0V for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:40 -0500 Received: from mail-ot1-x32e.google.com ([2607:f8b0:4864:20::32e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Sld-0001tk-UO for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:39 -0500 Received: by mail-ot1-x32e.google.com with SMTP id z14-20020a9d65ce000000b0067059c25facso1982760oth.6 for ; Thu, 08 Dec 2022 18:05:36 -0800 (PST) Received: from stoup.. ([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.05.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:05:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Ozj5wc7NFmB3O/MgzepcpO4OOcL4F6DQsmKEPOxkO0Q=; b=y/gHJby8tvHVNF1G2WZ2NqA7p73QZ9pgkqsLnUNGHo6lt3Fxd8nSecwCQf5tmhqnl/ jxkOyk1NZjALjN2swN3In96PdS6Q5rtgEa/wu3BBSHIPPPn0BuC4VYjbLUuqAjOfav6K l+vQhAOsJJxGSwpa4zYH5CbAWQt7mTOPF+0yLvKQv1HYxZWfuOGsa3U0IfgO92sNKmMi BurdAhZSfIMcLmp8xf0ZWdtb/3SofNUULS7OwDXo9sTs652S9+X30dQbLfWlfIWg2F+0 9W8Ct+vB2YCK6m8ue1XIgZENbkS47XuoJPHOxwTD7A2cmr4x4Ue64tAr73y6RcRyHGZN ex3A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ozj5wc7NFmB3O/MgzepcpO4OOcL4F6DQsmKEPOxkO0Q=; b=Sri6Fv+u2Z8kT4OtqhonxP8/+jSD+XC08YYQinomKFOnSA+b6Fjt/VbPET5rF7Om++ 96GGZLIjewkH1aePU4ToMMZ2r2/gZnXcYjNj156x+F9gkhK4Va5knvEtEQe1QW1FKWL+ JWNZgk2oZM4L0bHG14zu4VyljwZUkQy66Hy9g/KclKeUBr8TPQ0FPO20gAj2ENyKOEWT LpY9IlSmjDc8Qle3lRFo6Y6RuYDnk1a45Cwi9GrDQY1X7F0wkkoIOn8PJliDnxIEMJ7u 7Ug2LgRRPf+9GnbptVv8CT8KJHGr6E1ElR53ckoHqHmjKrUD7DrrAXA3hEAHUZBTZW1b RaSQ== X-Gm-Message-State: ANoB5pnAEo/IaLmu016AUcE7D0OIUn8H6iyz9SqC1sORpMVt0FwyC8yD Z+3kdYSJmKIMlg46txjN/vl+2HNOn6P6DQ4NU70= X-Google-Smtp-Source: AA0mqf6Lz2ykSKoFDKPTA9bWA/N0iZAaYa4ETyHJJMdU5Nty1yy6VGcqV2ABNv0N49fA1y+nK7mOUA== X-Received: by 2002:a9d:17e8:0:b0:66d:a04b:eeac with SMTP id j95-20020a9d17e8000000b0066da04beeacmr1692862otj.30.1670551535584; Thu, 08 Dec 2022 18:05:35 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 02/27] tcg/s390x: Remove TCG_REG_TB Date: Thu, 8 Dec 2022 20:05:05 -0600 Message-Id: <20221209020530.396391-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32e; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670552159827100005 Content-Type: text/plain; charset="utf-8" This reverts 829e1376d940 ("tcg/s390: Introduce TCG_REG_TB"), and several follow-up patches. The primary motivation is to reduce the less-tested code paths, pre-z10. Secondarily, this allows the unconditional use of TCG_TARGET_HAS_direct_jump, which might be more important for performance than any slight increase in code size. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- v4: Do not simplify tgen_ori, tgen_xori. --- tcg/s390x/tcg-target.c.inc | 97 +++----------------------------------- 1 file changed, 6 insertions(+), 91 deletions(-) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index cb00bb6999..ba4bb6a629 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -65,12 +65,6 @@ /* A scratch register that may be be used throughout the backend. */ #define TCG_TMP0 TCG_REG_R1 =20 -/* A scratch register that holds a pointer to the beginning of the TB. - We don't need this when we have pc-relative loads with the general - instructions extension facility. */ -#define TCG_REG_TB TCG_REG_R12 -#define USE_REG_TB (!HAVE_FACILITY(GEN_INST_EXT)) - #ifndef CONFIG_SOFTMMU #define TCG_GUEST_BASE_REG TCG_REG_R13 #endif @@ -813,8 +807,8 @@ static bool maybe_out_small_movi(TCGContext *s, TCGType= type, } =20 /* load a register with an immediate value */ -static void tcg_out_movi_int(TCGContext *s, TCGType type, TCGReg ret, - tcg_target_long sval, bool in_prologue) +static void tcg_out_movi(TCGContext *s, TCGType type, + TCGReg ret, tcg_target_long sval) { tcg_target_ulong uval; =20 @@ -853,14 +847,6 @@ static void tcg_out_movi_int(TCGContext *s, TCGType ty= pe, TCGReg ret, tcg_out_insn(s, RIL, LARL, ret, off); return; } - } else if (USE_REG_TB && !in_prologue) { - ptrdiff_t off =3D tcg_tbrel_diff(s, (void *)sval); - if (off =3D=3D sextract64(off, 0, 20)) { - /* This is certain to be an address within TB, and therefore - OFF will be negative; don't try RX_LA. */ - tcg_out_insn(s, RXY, LAY, ret, TCG_REG_TB, TCG_REG_NONE, off); - return; - } } =20 /* A 32-bit unsigned value can be loaded in 2 insns. And given @@ -876,10 +862,6 @@ static void tcg_out_movi_int(TCGContext *s, TCGType ty= pe, TCGReg ret, if (HAVE_FACILITY(GEN_INST_EXT)) { tcg_out_insn(s, RIL, LGRL, ret, 0); new_pool_label(s, sval, R_390_PC32DBL, s->code_ptr - 2, 2); - } else if (USE_REG_TB && !in_prologue) { - tcg_out_insn(s, RXY, LG, ret, TCG_REG_TB, TCG_REG_NONE, 0); - new_pool_label(s, sval, R_390_20, s->code_ptr - 2, - tcg_tbrel_diff(s, NULL)); } else { TCGReg base =3D ret ? ret : TCG_TMP0; tcg_out_insn(s, RIL, LARL, base, 0); @@ -888,12 +870,6 @@ static void tcg_out_movi_int(TCGContext *s, TCGType ty= pe, TCGReg ret, } } =20 -static void tcg_out_movi(TCGContext *s, TCGType type, - TCGReg ret, tcg_target_long sval) -{ - tcg_out_movi_int(s, type, ret, sval, false); -} - /* Emit a load/store type instruction. Inputs are: DATA: The register to be loaded or stored. BASE+OFS: The effective address. @@ -1037,13 +1013,6 @@ static void tcg_out_ld_abs(TCGContext *s, TCGType ty= pe, return; } } - if (USE_REG_TB) { - ptrdiff_t disp =3D tcg_tbrel_diff(s, abs); - if (disp =3D=3D sextract64(disp, 0, 20)) { - tcg_out_ld(s, type, dest, TCG_REG_TB, disp); - return; - } - } =20 tcg_out_movi(s, TCG_TYPE_PTR, dest, addr & ~0xffff); tcg_out_ld(s, type, dest, dest, addr & 0xffff); @@ -1243,17 +1212,7 @@ static void tgen_andi(TCGContext *s, TCGType type, T= CGReg dest, uint64_t val) return; } =20 - /* Use the constant pool if USE_REG_TB, but not for small constants. = */ - if (USE_REG_TB) { - if (!maybe_out_small_movi(s, type, TCG_TMP0, val)) { - tcg_out_insn(s, RXY, NG, dest, TCG_REG_TB, TCG_REG_NONE, 0); - new_pool_label(s, val & valid, R_390_20, s->code_ptr - 2, - tcg_tbrel_diff(s, NULL)); - return; - } - } else { - tcg_out_movi(s, type, TCG_TMP0, val); - } + tcg_out_movi(s, type, TCG_TMP0, val); if (type =3D=3D TCG_TYPE_I32) { tcg_out_insn(s, RR, NR, dest, TCG_TMP0); } else { @@ -1297,17 +1256,12 @@ static void tgen_ori(TCGContext *s, TCGType type, T= CGReg dest, uint64_t val) } } =20 - /* Use the constant pool if USE_REG_TB, but not for small constants. = */ if (maybe_out_small_movi(s, type, TCG_TMP0, val)) { if (type =3D=3D TCG_TYPE_I32) { tcg_out_insn(s, RR, OR, dest, TCG_TMP0); } else { tcg_out_insn(s, RRE, OGR, dest, TCG_TMP0); } - } else if (USE_REG_TB) { - tcg_out_insn(s, RXY, OG, dest, TCG_REG_TB, TCG_REG_NONE, 0); - new_pool_label(s, val, R_390_20, s->code_ptr - 2, - tcg_tbrel_diff(s, NULL)); } else { /* Perform the OR via sequential modifications to the high and low parts. Do this via recursion to handle 16-bit vs 32-bit @@ -1332,17 +1286,12 @@ static void tgen_xori(TCGContext *s, TCGType type, = TCGReg dest, uint64_t val) } } =20 - /* Use the constant pool if USE_REG_TB, but not for small constants. = */ if (maybe_out_small_movi(s, type, TCG_TMP0, val)) { if (type =3D=3D TCG_TYPE_I32) { tcg_out_insn(s, RR, XR, dest, TCG_TMP0); } else { tcg_out_insn(s, RRE, XGR, dest, TCG_TMP0); } - } else if (USE_REG_TB) { - tcg_out_insn(s, RXY, XG, dest, TCG_REG_TB, TCG_REG_NONE, 0); - new_pool_label(s, val, R_390_20, s->code_ptr - 2, - tcg_tbrel_diff(s, NULL)); } else { /* Perform the xor by parts. */ tcg_debug_assert(HAVE_FACILITY(EXT_IMM)); @@ -1395,19 +1344,6 @@ static int tgen_cmp(TCGContext *s, TCGType type, TCG= Cond c, TCGReg r1, if (maybe_out_small_movi(s, type, TCG_TMP0, c2)) { c2 =3D TCG_TMP0; /* fall through to reg-reg */ - } else if (USE_REG_TB) { - if (type =3D=3D TCG_TYPE_I32) { - op =3D (is_unsigned ? RXY_CLY : RXY_CY); - tcg_out_insn_RXY(s, op, r1, TCG_REG_TB, TCG_REG_NONE, 0); - new_pool_label(s, (uint32_t)c2, R_390_20, s->code_ptr - 2, - 4 - tcg_tbrel_diff(s, NULL)); - } else { - op =3D (is_unsigned ? RXY_CLG : RXY_CG); - tcg_out_insn_RXY(s, op, r1, TCG_REG_TB, TCG_REG_NONE, 0); - new_pool_label(s, c2, R_390_20, s->code_ptr - 2, - tcg_tbrel_diff(s, NULL)); - } - goto exit; } else { if (type =3D=3D TCG_TYPE_I32) { op =3D (is_unsigned ? RIL_CLRL : RIL_CRL); @@ -2109,35 +2045,21 @@ static inline void tcg_out_op(TCGContext *s, TCGOpc= ode opc, if (!QEMU_PTR_IS_ALIGNED(s->code_ptr + 1, 4)) { tcg_out16(s, NOP); } - tcg_debug_assert(!USE_REG_TB); tcg_out16(s, RIL_BRCL | (S390_CC_ALWAYS << 4)); s->tb_jmp_insn_offset[a0] =3D tcg_current_code_size(s); s->code_ptr +=3D 2; } else { /* load address stored at s->tb_jmp_target_addr + a0 */ - tcg_out_ld_abs(s, TCG_TYPE_PTR, TCG_REG_TB, + tcg_out_ld_abs(s, TCG_TYPE_PTR, TCG_TMP0, tcg_splitwx_to_rx(s->tb_jmp_target_addr + a0)); /* and go there */ - tcg_out_insn(s, RR, BCR, S390_CC_ALWAYS, TCG_REG_TB); + tcg_out_insn(s, RR, BCR, S390_CC_ALWAYS, TCG_TMP0); } set_jmp_reset_offset(s, a0); - - /* For the unlinked path of goto_tb, we need to reset - TCG_REG_TB to the beginning of this TB. */ - if (USE_REG_TB) { - int ofs =3D -tcg_current_code_size(s); - /* All TB are restricted to 64KiB by unwind info. */ - tcg_debug_assert(ofs =3D=3D sextract64(ofs, 0, 20)); - tcg_out_insn(s, RXY, LAY, TCG_REG_TB, - TCG_REG_TB, TCG_REG_NONE, ofs); - } break; =20 case INDEX_op_goto_ptr: a0 =3D args[0]; - if (USE_REG_TB) { - tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_TB, a0); - } tcg_out_insn(s, RR, BCR, S390_CC_ALWAYS, a0); break; =20 @@ -3405,9 +3327,6 @@ static void tcg_target_init(TCGContext *s) /* XXX many insns can't be used with R0, so we better avoid it for now= */ tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0); tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK); - if (USE_REG_TB) { - tcg_regset_set_reg(s->reserved_regs, TCG_REG_TB); - } } =20 #define FRAME_SIZE ((int)(TCG_TARGET_CALL_STACK_OFFSET \ @@ -3428,16 +3347,12 @@ static void tcg_target_qemu_prologue(TCGContext *s) =20 #ifndef CONFIG_SOFTMMU if (guest_base >=3D 0x80000) { - tcg_out_movi_int(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, guest_base, = true); + tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, guest_base); tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG); } #endif =20 tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]); - if (USE_REG_TB) { - tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_TB, - tcg_target_call_iarg_regs[1]); - } =20 /* br %r3 (go to TB) */ tcg_out_insn(s, RR, BCR, S390_CC_ALWAYS, tcg_target_call_iarg_regs[1]); --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670551662; cv=none; d=zohomail.com; s=zohoarc; b=TZJgVmG6kM28AlPOLCYBJWDhuQQeRGeFFlM5fR1TkMtxmdZQx1NcV68JO7+95ab5Kx3E/aDbfuQd1iar/5r6FBBUOBdsD0gKao1J7UACb5GWLi4/W2fCUBpl70uH6L+NRj+efCMxc2KOsUKKm8Jd3bvNAsBsmpU9fWtEPW7b02c= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670551662; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Pil2vyVFKco0OazESrG0YmMd/pBt8GQeFupUzgGbxf4=; b=hLVx+JrOYuHLoaGZN+wX4mJmx35XiTt+zar9ykZxyOBcEUouOh1P2m5K0y8IF7pQxANqmyiOt7X4wl4wvHjlHkFLHGzYew7ErY0J7THfIdHcN0ACNsBEOzQ3CXT9EQyUYG7t8s1w4jET6eM+0se55a569wp7Y1JO0yQ7uRhZWBo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1670551662616847.3097040583018; Thu, 8 Dec 2022 18:07:42 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3Slh-0005ti-8O; Thu, 08 Dec 2022 21:05:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3Slf-0005tK-Gv for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:39 -0500 Received: from mail-ot1-x32b.google.com ([2607:f8b0:4864:20::32b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Sld-0001ty-Uv for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:39 -0500 Received: by mail-ot1-x32b.google.com with SMTP id db10-20020a0568306b0a00b0066d43e80118so1997471otb.1 for ; Thu, 08 Dec 2022 18:05:37 -0800 (PST) Received: from stoup.. ([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.05.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:05:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Pil2vyVFKco0OazESrG0YmMd/pBt8GQeFupUzgGbxf4=; b=ry5/y++6gLLCnyzf8/9gUl43QqpdeM0/ATSfKq0DHTcAwYYVx8Q6IfTI5N/E9eSJSp f7ciP9Xdti+gKiCj3ZrjTSBadrytEAKVz+KwNzWLXOQh89Cru/T9dqg10JGdoucJviUf /qWS4cXZY3czHOFoQ0D+NdRYG7XBZszXKgunvnB/7w252IsN3kdpVKcjcVV6LLU/ktGN RjPwU3AbL2CeoMLAupGUtvwvhE5D82NfBvA3T9l7PJ3+5eD8dy3fi08fURjov4xTcTrQ Qng1rUtKzaLuTLwWA0Uc/hQnp4RlzPw33U6HVLZe+AG2fKrvypa6feGMGBCZ/Ql8SICs Ax6A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Pil2vyVFKco0OazESrG0YmMd/pBt8GQeFupUzgGbxf4=; b=fZF9CvImMWLNd1V981Dg5HmqDhYHUwsSRcJRF+isFJg0PXRjiTP4b9nxPC2W3tvAj3 lgv4Y6cDVgOb+uPVl2b6ZsVJFclxR/blyibf5qPYwXgNedOJqBIdaeXpLSdlg7LgK+gZ lN+d5KGK29+oYhd5hY+Ho/uGfb47EBJf9kFJGoqYRRmyGmpD55SKJIN9BNaaEm3Lyzyz EVDOLs9B1UV2+AJKiMC/lnHnTQXLTuPy39GZQR8JsoU643dJFnSRjW2xS5n75up+SC2P zyV+/pUt22bz5pL2Cn2PjkL4393JqCsjgOorxRakVlIZ+dgXFZ0LSGu0l8DxnUwDMe3I no0g== X-Gm-Message-State: ANoB5pkLLwK5Dd3RQgrXz8lFV4J7yy6j3QSgmE6e1Dt/605omzqu2pbP 42gXQNdfvqRT2xnY7+mmp/JDslqh+uf7d+mgqN4= X-Google-Smtp-Source: AA0mqf5GTrIqHe0jT6A90e0t5xk36G6tQXHsiK7WrrQB7oogO8G7lbGevTx0C5lDiZqJ3rPZmZFcCQ== X-Received: by 2002:a05:6830:26c3:b0:670:6c81:6e55 with SMTP id m3-20020a05683026c300b006706c816e55mr2021004otu.3.1670551536709; Thu, 08 Dec 2022 18:05:36 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 03/27] tcg/s390x: Always set TCG_TARGET_HAS_direct_jump Date: Thu, 8 Dec 2022 20:05:06 -0600 Message-Id: <20221209020530.396391-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32b; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670551663149100001 Content-Type: text/plain; charset="utf-8" Since USE_REG_TB is removed, there is no need to load the target TB address into a register. Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich --- tcg/s390x/tcg-target.h | 2 +- tcg/s390x/tcg-target.c.inc | 48 +++++++------------------------------- 2 files changed, 10 insertions(+), 40 deletions(-) diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h index 22d70d431b..645f522058 100644 --- a/tcg/s390x/tcg-target.h +++ b/tcg/s390x/tcg-target.h @@ -103,7 +103,7 @@ extern uint64_t s390_facilities[3]; #define TCG_TARGET_HAS_mulsh_i32 0 #define TCG_TARGET_HAS_extrl_i64_i32 0 #define TCG_TARGET_HAS_extrh_i64_i32 0 -#define TCG_TARGET_HAS_direct_jump HAVE_FACILITY(GEN_INST_EXT) +#define TCG_TARGET_HAS_direct_jump 1 #define TCG_TARGET_HAS_qemu_st8_i32 0 =20 #define TCG_TARGET_HAS_div2_i64 1 diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index ba4bb6a629..2cdd0d7a92 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -996,28 +996,6 @@ static inline bool tcg_out_sti(TCGContext *s, TCGType = type, TCGArg val, return false; } =20 -/* load data from an absolute host address */ -static void tcg_out_ld_abs(TCGContext *s, TCGType type, - TCGReg dest, const void *abs) -{ - intptr_t addr =3D (intptr_t)abs; - - if (HAVE_FACILITY(GEN_INST_EXT) && !(addr & 1)) { - ptrdiff_t disp =3D tcg_pcrel_diff(s, abs) >> 1; - if (disp =3D=3D (int32_t)disp) { - if (type =3D=3D TCG_TYPE_I32) { - tcg_out_insn(s, RIL, LRL, dest, disp); - } else { - tcg_out_insn(s, RIL, LGRL, dest, disp); - } - return; - } - } - - tcg_out_movi(s, TCG_TYPE_PTR, dest, addr & ~0xffff); - tcg_out_ld(s, type, dest, dest, addr & 0xffff); -} - static inline void tcg_out_risbg(TCGContext *s, TCGReg dest, TCGReg src, int msb, int lsb, int ofs, int z) { @@ -2037,24 +2015,16 @@ static inline void tcg_out_op(TCGContext *s, TCGOpc= ode opc, =20 case INDEX_op_goto_tb: a0 =3D args[0]; - if (s->tb_jmp_insn_offset) { - /* - * branch displacement must be aligned for atomic patching; - * see if we need to add extra nop before branch - */ - if (!QEMU_PTR_IS_ALIGNED(s->code_ptr + 1, 4)) { - tcg_out16(s, NOP); - } - tcg_out16(s, RIL_BRCL | (S390_CC_ALWAYS << 4)); - s->tb_jmp_insn_offset[a0] =3D tcg_current_code_size(s); - s->code_ptr +=3D 2; - } else { - /* load address stored at s->tb_jmp_target_addr + a0 */ - tcg_out_ld_abs(s, TCG_TYPE_PTR, TCG_TMP0, - tcg_splitwx_to_rx(s->tb_jmp_target_addr + a0)); - /* and go there */ - tcg_out_insn(s, RR, BCR, S390_CC_ALWAYS, TCG_TMP0); + /* + * branch displacement must be aligned for atomic patching; + * see if we need to add extra nop before branch + */ + if (!QEMU_PTR_IS_ALIGNED(s->code_ptr + 1, 4)) { + tcg_out16(s, NOP); } + tcg_out16(s, RIL_BRCL | (S390_CC_ALWAYS << 4)); + s->tb_jmp_insn_offset[a0] =3D tcg_current_code_size(s); + s->code_ptr +=3D 2; set_jmp_reset_offset(s, a0); break; =20 --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.05.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:05:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=N4yQZvLrLzDnvwFEth2EWeDyowrOx4C5jmZrW9T8lUY=; b=gWbrq6DZrKrkLOawEIUIEv4Nct0ve73wXBdxn0/7M9oPwJbOLdXZZ0PW5yXis0cnKn NFDry45k8fG/8bu9MndBD0Pwat7uejJQR1W15w3+iyAG5dwyk2CMoPweTB0n/Jc9IeIB te7uhEA51zNwWLcnJLgLfiFK0vxcGtiMPbUv4L1RkQYDT93VvAXs4dJjPnbaV9qFSAGr NloflS5dduVtfv3T98wqq4hfTbcaSVy2ZwlltZS5t0YfEuVgOmZpWt1KAnWLh/y9Amg5 yJys8/g+yshAd/N2HF6I0xcJIDDYBAMyRzbtBi4UKDjvQNvMgJQXf1D2hWQa98zo0go0 Z5qg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=N4yQZvLrLzDnvwFEth2EWeDyowrOx4C5jmZrW9T8lUY=; b=ERC4PLE/W4AVJvyaLtKY1WeKYOcLSpjuFgaxGVbpRMu9aALseYWcXKLpq5yqkQMCgB qGQ2HBHqEQQm1uLhBx3Ca8VKnWs7DsbuvkBz560S49hByG02UJtTecbz4jt7mq7z0g+e iyCcYqBvYUn93VQgrwhItWyherhfEGKnSFdv8NWEBwJqJrPDunad8HaHg+fCdTtQvqgK 6mi6y6OTfCTlw0dxMuUE5TjG62Vdt0bkh6AA9EB6oPfPMEGBVL+OeyBS5sovu5JI7YLv wREG1mPvLgH4wWXtMBFf15yAxfLUxM1+jD3dvHNI4ZrYMXMmWEnlKb7VZmobwu9K5fZU LnuQ== X-Gm-Message-State: ANoB5pkDeGvFwH3pdjkoDR/h6psydS4RwzbeSMiveTbxWBdzDEpAh9cW RmVEAtRv3HO1LVRqPPxKkHEAwcd0AH5rk+Fs83Q= X-Google-Smtp-Source: AA0mqf7bySXefhWEnNqQ/WfHaXIJJRpvB4osE510bSeaBLjQ5zAqkpvoTz3oi0BtuN5QjK8wWUsO5g== X-Received: by 2002:a05:6830:1081:b0:670:6419:c3ee with SMTP id y1-20020a056830108100b006706419c3eemr1730385oto.16.1670551537868; Thu, 08 Dec 2022 18:05:37 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 04/27] tcg/s390x: Remove USE_LONG_BRANCHES Date: Thu, 8 Dec 2022 20:05:07 -0600 Message-Id: <20221209020530.396391-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32b; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670552101545100001 Content-Type: text/plain; charset="utf-8" The size of a compiled TB is limited by the uint16_t used by gen_insn_end_off[] -- there is no need for a 32-bit branch. Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich --- tcg/s390x/tcg-target.c.inc | 9 --------- 1 file changed, 9 deletions(-) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index 2cdd0d7a92..dea889ffa1 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -33,11 +33,6 @@ #include "../tcg-pool.c.inc" #include "elf.h" =20 -/* ??? The translation blocks produced by TCG are generally small enough to - be entirely reachable with a 16-bit displacement. Leaving the option f= or - a 32-bit displacement here Just In Case. */ -#define USE_LONG_BRANCHES 0 - #define TCG_CT_CONST_S16 0x100 #define TCG_CT_CONST_S32 0x200 #define TCG_CT_CONST_S33 0x400 @@ -1525,10 +1520,6 @@ static void tgen_branch(TCGContext *s, int cc, TCGLa= bel *l) { if (l->has_value) { tgen_gotoi(s, cc, l->u.value_ptr); - } else if (USE_LONG_BRANCHES) { - tcg_out16(s, RIL_BRCL | (cc << 4)); - tcg_out_reloc(s, s->code_ptr, R_390_PC32DBL, l, 2); - s->code_ptr +=3D 2; } else { tcg_out16(s, RI_BRC | (cc << 4)); tcg_out_reloc(s, s->code_ptr, R_390_PC16DBL, l, 2); --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670552090; cv=none; d=zohomail.com; s=zohoarc; b=hFlC56evWxE8T6f3CktN5INuoJc/3vCTWg82jfC67F9PjrbsgF8Sd/ZbxrwikSMCef7H0e63yX53/8caPotHcoiKuMqtwlkJj28q+G+l4XR9/I0r/F6m72unV2j5gUWeAj8zZLG3tq8K9TTc9M3zLj0O6y+fAV19F7u3YVKSgGQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670552090; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=26da5o9nlyxSfOnK98M7FqxwGpV7sc71vV3Cvt0qTgQ=; b=PbV8R3xqKzjb+qqwfG00iNNNKWiI9jNsyOb8qztmgyYAQMHayDdOgrEYRxmYsajJEYWzs20Jk+LG9DDeXm8uSMq8Afi5BnwsgZ319OQKH5ju2jWvkMxnBHE+UMEJQyqlvraB9f6Cx8aBh05xlafMa70ZWdXZ+EPDEUP9LpZXK7I= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1670552090250779.9806801871151; Thu, 8 Dec 2022 18:14:50 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3Slj-0005uI-Ka; Thu, 08 Dec 2022 21:05:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3Slh-0005ts-Oe for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:41 -0500 Received: from mail-ot1-x32c.google.com ([2607:f8b0:4864:20::32c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Slg-0001uc-4P for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:41 -0500 Received: by mail-ot1-x32c.google.com with SMTP id t19-20020a9d7753000000b0066d77a3d474so1974074otl.10 for ; Thu, 08 Dec 2022 18:05:39 -0800 (PST) Received: from stoup.. ([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.05.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:05:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=26da5o9nlyxSfOnK98M7FqxwGpV7sc71vV3Cvt0qTgQ=; b=IW4Ig2jNKq+qMOe2Mcv802CjGrPXR4SSoK5VSeRLKDIVVVRLU9wxg9L/oMuIXetvc/ w1lkfcjXWekx6uXwt+rKA+cjVc/CasZBCILe9WXw0VWxi9HXcF5gnYeAERXd411p+Rcr IIZt3i//vmAimv9HcZgriIczBROycP5/DGFgcXuKkaad4D9S9e0/eNCXQAqXucS5WSlS jqjPueCC1geyUIQ/hOITPonvXySQh5vaWi3O8gYyjcve9B7W7/u8hFaaXL9AnhFzPofm cZ4yeGtx3WlGPygf+TA5kh2xJdiO9ZW2YJKplYheqwmUK15hPZ1r6d+1V9MCp9W3Jn47 /BBQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=26da5o9nlyxSfOnK98M7FqxwGpV7sc71vV3Cvt0qTgQ=; b=RucM4MA9YRICBLn1B5UWzOYAvfbJnF8eV1L4QwdY2KeliGDIVkNCAOQgDU1KrtLz8/ PkFTLcopTdVeee1jB7JAFD4sEyUCRS6/PJwepOYJipnJ2VnNI5jzFB6X6d32y44poE0z Con2XpSXcdjzuiyH2JKtJQ2CEwr6kUZmGnsmV8AKYjaD8gqWtk+z6RxhcV9jfR4w9nDX N+OQxDNnn33vTnWQVXsh3fdi/0ATz2NWa+ft4hermw3gDA1sObeULmR+goTeTAjneSpT m+RwGHjqMaehF6q5EMtt93EZZneMx36ycgblhfpVdHODCW1SiE15mmuuPqEiUzTL1q6U AkFQ== X-Gm-Message-State: ANoB5pne1P+7CJMCf3SWEj4O/cSmirQDnjVR1Gx3klHeYpvLNi1MU3Av UXRwPIETx6jR4cDi8Jt2mPYfMfNm/cLvBlk6gEc= X-Google-Smtp-Source: AA0mqf4Qo/nW9RtbUEbXmP5V/hm0SX5r4H2+Pw0zypNPJvoo2jGBDfUtHFOeAg24Dvm463sP1YM+4g== X-Received: by 2002:a9d:74d1:0:b0:66d:c4f:761f with SMTP id a17-20020a9d74d1000000b0066d0c4f761fmr1796301otl.15.1670551538980; Thu, 08 Dec 2022 18:05:38 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 05/27] tcg/s390x: Check for long-displacement facility at startup Date: Thu, 8 Dec 2022 20:05:08 -0600 Message-Id: <20221209020530.396391-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32c; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670552091502100001 Content-Type: text/plain; charset="utf-8" We are already assuming the existance of long-displacement, but were not being explicit about it. This has been present since z990. Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich --- tcg/s390x/tcg-target.h | 6 ++++-- tcg/s390x/tcg-target.c.inc | 15 +++++++++++++++ 2 files changed, 19 insertions(+), 2 deletions(-) diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h index 645f522058..7f230ed243 100644 --- a/tcg/s390x/tcg-target.h +++ b/tcg/s390x/tcg-target.h @@ -52,11 +52,13 @@ typedef enum TCGReg { =20 #define TCG_TARGET_NB_REGS 64 =20 -/* A list of relevant facilities used by this translator. Some of these - are required for proper operation, and these are checked at startup. */ +/* Facilities required for proper operation; checked at startup. */ =20 #define FACILITY_ZARCH_ACTIVE 2 #define FACILITY_LONG_DISP 18 + +/* Facilities that are checked at runtime. */ + #define FACILITY_EXT_IMM 21 #define FACILITY_GEN_INST_EXT 34 #define FACILITY_LOAD_ON_COND 45 diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index dea889ffa1..1fcefba7ba 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -3211,6 +3211,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpc= ode op) static void query_s390_facilities(void) { unsigned long hwcap =3D qemu_getauxval(AT_HWCAP); + const char *which; =20 /* Is STORE FACILITY LIST EXTENDED available? Honestly, I believe this is present on all 64-bit systems, but let's check for it anyway. */ @@ -3232,6 +3233,20 @@ static void query_s390_facilities(void) if (!(hwcap & HWCAP_S390_VXRS)) { s390_facilities[2] =3D 0; } + + /* + * Check for all required facilities. + * ZARCH_ACTIVE is done via preprocessor check for 64-bit. + */ + if (!HAVE_FACILITY(LONG_DISP)) { + which =3D "long-displacement"; + goto fail; + } + return; + + fail: + error_report("%s: missing required facility %s", __func__, which); + exit(EXIT_FAILURE); } =20 static void tcg_target_init(TCGContext *s) --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670551584; cv=none; d=zohomail.com; s=zohoarc; b=L9OHb3+10G9rHUoTSe7sJV6W1arr5tIXT5Y3mvZKu9F0zCEjtWAps9EvUq4Og2/4mLqBR+cCvKPGey5S/pORyzJFxtglBTKxsAagotAdM3x2aHCMyetVNdHECiHIdib9W9ZSKmncYoXIXLmEcgDybcyVMB8nBg96+oeFJ05qsB8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670551584; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=25Ko++yQBwy/H4R6FsmmzZ4rxqjqQk1kf6nKToI9X2c=; b=mSoA8sCZomdVGN3Z92zbB8d+A4b4KtEmTPsg0hQKhXFQZacZIrskexUWlpxKudub9yzX+410f7YYaQ6uFN4x7Y1d53cSNQc9f6r7TNH51/aIulmLXgQq7io8CpuQX6P4lMV8xiowLwWpldmLqu8sWfwm23ih4JMBPRAaUVoz3kA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1670551584714689.1607233141715; Thu, 8 Dec 2022 18:06:24 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3Sll-0005vo-Nx; Thu, 08 Dec 2022 21:05:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3Slj-0005uR-PY for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:43 -0500 Received: from mail-ot1-x32d.google.com ([2607:f8b0:4864:20::32d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Slh-0001uu-H0 for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:43 -0500 Received: by mail-ot1-x32d.google.com with SMTP id p10-20020a9d76ca000000b0066d6c6bce58so1981557otl.7 for ; Thu, 08 Dec 2022 18:05:41 -0800 (PST) Received: from stoup.. ([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.05.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:05:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=25Ko++yQBwy/H4R6FsmmzZ4rxqjqQk1kf6nKToI9X2c=; b=w1LNY/z9M5+tQTYoUyce6ZYfpNjdpx0dZylEnzCSQeshaTzijtC8/FrgKdN4cL7w6r dara7nLuGGNITmgyjwVgLXg2dVkiqBf9kRt1N9Mf1D60Aumjv6723jV9uwWRF+blX8e0 MJLO9ncxGe6x0C1+vV6dfmRmpg7qywlyhWBYoqKRBWsXifLnWyu1GSdqyOdyn8hVilYF A9xDp0SYzl+RQb0Do3Avx1QwNylX5tAJZUrHoB1GCC/1p1hqsdtF8M645P8UAc5qZhKF Gq0xbfHJUKQ7b5JOexEMpbnjRBkCNvOcuU9Nb0Z2027kcD/p+CnxaoNrCr5tBvZNauc0 u7Pw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=25Ko++yQBwy/H4R6FsmmzZ4rxqjqQk1kf6nKToI9X2c=; b=F6t5kVzhpDTmWjqW5HvlRLDpYFTtIPD5tqQ38m4M31O7Ar3RPZF0HM78Q0aXruHtmu h0tpylfEIiOo3PVF5vUu4BIOQX5tvLv6ZC4ds3fwbtSfSbS7dBztAl4u/eTQQy8gA/tf B1ApJ4dOzU8JUlyfeWzE4FsL/H49D07hPzWiCq/cCJQWqKP5to6Lfl2LclJV0/mKRDhw y9saAi9SlsmMZj1E8tDjCv2hoaFOoStmvJhdPyag12bTy8u66mvKOqC6ChImkLX3jj8w he9PR7d+cn1zq+I/RIkz3UR4go4cHzML+wKoFJubwWkc7Y8tGfB/tnaQ9WJNEnVrAArR 4oBA== X-Gm-Message-State: ANoB5pmuizIrTzEOnGkaIK0xJ48DyzN03t2vSXDPylN2+/6KohN+bvvK l0RR9gH5f75upBAn5WYNL5xy6wnEMNbppqAA020= X-Google-Smtp-Source: AA0mqf4Le9QTJCDWlaCoHjYnAUCksqMRGrVE8UItA0yvDq4hoFcLg6JVNyvb2cuSbgVe80IbffWV8g== X-Received: by 2002:a05:6830:378b:b0:66e:61be:1a90 with SMTP id bi11-20020a056830378b00b0066e61be1a90mr2060896otb.23.1670551540073; Thu, 08 Dec 2022 18:05:40 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 06/27] tcg/s390x: Check for extended-immediate facility at startup Date: Thu, 8 Dec 2022 20:05:09 -0600 Message-Id: <20221209020530.396391-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32d; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670551586394100001 Content-Type: text/plain; charset="utf-8" The extended-immediate facility was introduced in z9-109, which itself was end-of-life in 2017. Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich --- tcg/s390x/tcg-target.h | 4 +- tcg/s390x/tcg-target.c.inc | 231 +++++++++++-------------------------- 2 files changed, 72 insertions(+), 163 deletions(-) diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h index 7f230ed243..126ba1048a 100644 --- a/tcg/s390x/tcg-target.h +++ b/tcg/s390x/tcg-target.h @@ -56,10 +56,10 @@ typedef enum TCGReg { =20 #define FACILITY_ZARCH_ACTIVE 2 #define FACILITY_LONG_DISP 18 +#define FACILITY_EXT_IMM 21 =20 /* Facilities that are checked at runtime. */ =20 -#define FACILITY_EXT_IMM 21 #define FACILITY_GEN_INST_EXT 34 #define FACILITY_LOAD_ON_COND 45 #define FACILITY_FAST_BCR_SER FACILITY_LOAD_ON_COND @@ -126,7 +126,7 @@ extern uint64_t s390_facilities[3]; #define TCG_TARGET_HAS_eqv_i64 0 #define TCG_TARGET_HAS_nand_i64 0 #define TCG_TARGET_HAS_nor_i64 0 -#define TCG_TARGET_HAS_clz_i64 HAVE_FACILITY(EXT_IMM) +#define TCG_TARGET_HAS_clz_i64 1 #define TCG_TARGET_HAS_ctz_i64 0 #define TCG_TARGET_HAS_ctpop_i64 0 #define TCG_TARGET_HAS_deposit_i64 HAVE_FACILITY(GEN_INST_EXT) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index 1fcefba7ba..42e161cc7e 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -819,19 +819,17 @@ static void tcg_out_movi(TCGContext *s, TCGType type, } =20 /* Try all 48-bit insns that can load it in one go. */ - if (HAVE_FACILITY(EXT_IMM)) { - if (sval =3D=3D (int32_t)sval) { - tcg_out_insn(s, RIL, LGFI, ret, sval); - return; - } - if (uval <=3D 0xffffffff) { - tcg_out_insn(s, RIL, LLILF, ret, uval); - return; - } - if ((uval & 0xffffffff) =3D=3D 0) { - tcg_out_insn(s, RIL, LLIHF, ret, uval >> 32); - return; - } + if (sval =3D=3D (int32_t)sval) { + tcg_out_insn(s, RIL, LGFI, ret, sval); + return; + } + if (uval <=3D 0xffffffff) { + tcg_out_insn(s, RIL, LLILF, ret, uval); + return; + } + if ((uval & 0xffffffff) =3D=3D 0) { + tcg_out_insn(s, RIL, LLIHF, ret, uval >> 32); + return; } =20 /* Try for PC-relative address load. For odd addresses, @@ -844,15 +842,6 @@ static void tcg_out_movi(TCGContext *s, TCGType type, } } =20 - /* A 32-bit unsigned value can be loaded in 2 insns. And given - that LLILL, LLIHL, LLILF above did not succeed, we know that - both insns are required. */ - if (uval <=3D 0xffffffff) { - tcg_out_insn(s, RI, LLILL, ret, uval); - tcg_out_insn(s, RI, IILH, ret, uval >> 16); - return; - } - /* Otherwise, stuff it in the constant pool. */ if (HAVE_FACILITY(GEN_INST_EXT)) { tcg_out_insn(s, RIL, LGRL, ret, 0); @@ -1002,82 +991,22 @@ static inline void tcg_out_risbg(TCGContext *s, TCGR= eg dest, TCGReg src, =20 static void tgen_ext8s(TCGContext *s, TCGType type, TCGReg dest, TCGReg sr= c) { - if (HAVE_FACILITY(EXT_IMM)) { - tcg_out_insn(s, RRE, LGBR, dest, src); - return; - } - - if (type =3D=3D TCG_TYPE_I32) { - if (dest =3D=3D src) { - tcg_out_sh32(s, RS_SLL, dest, TCG_REG_NONE, 24); - } else { - tcg_out_sh64(s, RSY_SLLG, dest, src, TCG_REG_NONE, 24); - } - tcg_out_sh32(s, RS_SRA, dest, TCG_REG_NONE, 24); - } else { - tcg_out_sh64(s, RSY_SLLG, dest, src, TCG_REG_NONE, 56); - tcg_out_sh64(s, RSY_SRAG, dest, dest, TCG_REG_NONE, 56); - } + tcg_out_insn(s, RRE, LGBR, dest, src); } =20 static void tgen_ext8u(TCGContext *s, TCGType type, TCGReg dest, TCGReg sr= c) { - if (HAVE_FACILITY(EXT_IMM)) { - tcg_out_insn(s, RRE, LLGCR, dest, src); - return; - } - - if (dest =3D=3D src) { - tcg_out_movi(s, type, TCG_TMP0, 0xff); - src =3D TCG_TMP0; - } else { - tcg_out_movi(s, type, dest, 0xff); - } - if (type =3D=3D TCG_TYPE_I32) { - tcg_out_insn(s, RR, NR, dest, src); - } else { - tcg_out_insn(s, RRE, NGR, dest, src); - } + tcg_out_insn(s, RRE, LLGCR, dest, src); } =20 static void tgen_ext16s(TCGContext *s, TCGType type, TCGReg dest, TCGReg s= rc) { - if (HAVE_FACILITY(EXT_IMM)) { - tcg_out_insn(s, RRE, LGHR, dest, src); - return; - } - - if (type =3D=3D TCG_TYPE_I32) { - if (dest =3D=3D src) { - tcg_out_sh32(s, RS_SLL, dest, TCG_REG_NONE, 16); - } else { - tcg_out_sh64(s, RSY_SLLG, dest, src, TCG_REG_NONE, 16); - } - tcg_out_sh32(s, RS_SRA, dest, TCG_REG_NONE, 16); - } else { - tcg_out_sh64(s, RSY_SLLG, dest, src, TCG_REG_NONE, 48); - tcg_out_sh64(s, RSY_SRAG, dest, dest, TCG_REG_NONE, 48); - } + tcg_out_insn(s, RRE, LGHR, dest, src); } =20 static void tgen_ext16u(TCGContext *s, TCGType type, TCGReg dest, TCGReg s= rc) { - if (HAVE_FACILITY(EXT_IMM)) { - tcg_out_insn(s, RRE, LLGHR, dest, src); - return; - } - - if (dest =3D=3D src) { - tcg_out_movi(s, type, TCG_TMP0, 0xffff); - src =3D TCG_TMP0; - } else { - tcg_out_movi(s, type, dest, 0xffff); - } - if (type =3D=3D TCG_TYPE_I32) { - tcg_out_insn(s, RR, NR, dest, src); - } else { - tcg_out_insn(s, RRE, NGR, dest, src); - } + tcg_out_insn(s, RRE, LLGHR, dest, src); } =20 static inline void tgen_ext32s(TCGContext *s, TCGReg dest, TCGReg src) @@ -1150,15 +1079,13 @@ static void tgen_andi(TCGContext *s, TCGType type, = TCGReg dest, uint64_t val) tgen_ext32u(s, dest, dest); return; } - if (HAVE_FACILITY(EXT_IMM)) { - if ((val & valid) =3D=3D 0xff) { - tgen_ext8u(s, TCG_TYPE_I64, dest, dest); - return; - } - if ((val & valid) =3D=3D 0xffff) { - tgen_ext16u(s, TCG_TYPE_I64, dest, dest); - return; - } + if ((val & valid) =3D=3D 0xff) { + tgen_ext8u(s, TCG_TYPE_I64, dest, dest); + return; + } + if ((val & valid) =3D=3D 0xffff) { + tgen_ext16u(s, TCG_TYPE_I64, dest, dest); + return; } =20 /* Try all 32-bit insns that can perform it in one go. */ @@ -1171,13 +1098,11 @@ static void tgen_andi(TCGContext *s, TCGType type, = TCGReg dest, uint64_t val) } =20 /* Try all 48-bit insns that can perform it in one go. */ - if (HAVE_FACILITY(EXT_IMM)) { - for (i =3D 0; i < 2; i++) { - tcg_target_ulong mask =3D ~(0xffffffffull << i * 32); - if (((val | ~valid) & mask) =3D=3D mask) { - tcg_out_insn_RIL(s, nif_insns[i], dest, val >> i * 32); - return; - } + for (i =3D 0; i < 2; i++) { + tcg_target_ulong mask =3D ~(0xffffffffull << i * 32); + if (((val | ~valid) & mask) =3D=3D mask) { + tcg_out_insn_RIL(s, nif_insns[i], dest, val >> i * 32); + return; } } if (HAVE_FACILITY(GEN_INST_EXT) && risbg_mask(val)) { @@ -1219,13 +1144,11 @@ static void tgen_ori(TCGContext *s, TCGType type, T= CGReg dest, uint64_t val) } =20 /* Try all 48-bit insns that can perform it in one go. */ - if (HAVE_FACILITY(EXT_IMM)) { - for (i =3D 0; i < 2; i++) { - tcg_target_ulong mask =3D (0xffffffffull << i * 32); - if ((val & mask) !=3D 0 && (val & ~mask) =3D=3D 0) { - tcg_out_insn_RIL(s, oif_insns[i], dest, val >> i * 32); - return; - } + for (i =3D 0; i < 2; i++) { + tcg_target_ulong mask =3D (0xffffffffull << i * 32); + if ((val & mask) !=3D 0 && (val & ~mask) =3D=3D 0) { + tcg_out_insn_RIL(s, oif_insns[i], dest, val >> i * 32); + return; } } =20 @@ -1239,7 +1162,6 @@ static void tgen_ori(TCGContext *s, TCGType type, TCG= Reg dest, uint64_t val) /* Perform the OR via sequential modifications to the high and low parts. Do this via recursion to handle 16-bit vs 32-bit masks in each half. */ - tcg_debug_assert(HAVE_FACILITY(EXT_IMM)); tgen_ori(s, type, dest, val & 0x00000000ffffffffull); tgen_ori(s, type, dest, val & 0xffffffff00000000ull); } @@ -1248,15 +1170,13 @@ static void tgen_ori(TCGContext *s, TCGType type, T= CGReg dest, uint64_t val) static void tgen_xori(TCGContext *s, TCGType type, TCGReg dest, uint64_t v= al) { /* Try all 48-bit insns that can perform it in one go. */ - if (HAVE_FACILITY(EXT_IMM)) { - if ((val & 0xffffffff00000000ull) =3D=3D 0) { - tcg_out_insn(s, RIL, XILF, dest, val); - return; - } - if ((val & 0x00000000ffffffffull) =3D=3D 0) { - tcg_out_insn(s, RIL, XIHF, dest, val >> 32); - return; - } + if ((val & 0xffffffff00000000ull) =3D=3D 0) { + tcg_out_insn(s, RIL, XILF, dest, val); + return; + } + if ((val & 0x00000000ffffffffull) =3D=3D 0) { + tcg_out_insn(s, RIL, XIHF, dest, val >> 32); + return; } =20 if (maybe_out_small_movi(s, type, TCG_TMP0, val)) { @@ -1267,7 +1187,6 @@ static void tgen_xori(TCGContext *s, TCGType type, TC= GReg dest, uint64_t val) } } else { /* Perform the xor by parts. */ - tcg_debug_assert(HAVE_FACILITY(EXT_IMM)); if (val & 0xffffffff) { tcg_out_insn(s, RIL, XILF, dest, val); } @@ -1301,16 +1220,15 @@ static int tgen_cmp(TCGContext *s, TCGType type, TC= GCond c, TCGReg r1, goto exit; } =20 - if (HAVE_FACILITY(EXT_IMM)) { - if (type =3D=3D TCG_TYPE_I32) { - op =3D (is_unsigned ? RIL_CLFI : RIL_CFI); - tcg_out_insn_RIL(s, op, r1, c2); - goto exit; - } else if (c2 =3D=3D (is_unsigned ? (TCGArg)(uint32_t)c2 : (TC= GArg)(int32_t)c2)) { - op =3D (is_unsigned ? RIL_CLGFI : RIL_CGFI); - tcg_out_insn_RIL(s, op, r1, c2); - goto exit; - } + if (type =3D=3D TCG_TYPE_I32) { + op =3D (is_unsigned ? RIL_CLFI : RIL_CFI); + tcg_out_insn_RIL(s, op, r1, c2); + goto exit; + } + if (c2 =3D=3D (is_unsigned ? (TCGArg)(uint32_t)c2 : (TCGArg)(int32= _t)c2)) { + op =3D (is_unsigned ? RIL_CLGFI : RIL_CGFI); + tcg_out_insn_RIL(s, op, r1, c2); + goto exit; } =20 /* Use the constant pool, but not for small constants. */ @@ -1318,16 +1236,9 @@ static int tgen_cmp(TCGContext *s, TCGType type, TCG= Cond c, TCGReg r1, c2 =3D TCG_TMP0; /* fall through to reg-reg */ } else { - if (type =3D=3D TCG_TYPE_I32) { - op =3D (is_unsigned ? RIL_CLRL : RIL_CRL); - tcg_out_insn_RIL(s, op, r1, 0); - new_pool_label(s, (uint32_t)c2, R_390_PC32DBL, - s->code_ptr - 2, 2 + 4); - } else { - op =3D (is_unsigned ? RIL_CLGRL : RIL_CGRL); - tcg_out_insn_RIL(s, op, r1, 0); - new_pool_label(s, c2, R_390_PC32DBL, s->code_ptr - 2, 2); - } + op =3D (is_unsigned ? RIL_CLGRL : RIL_CGRL); + tcg_out_insn_RIL(s, op, r1, 0); + new_pool_label(s, c2, R_390_PC32DBL, s->code_ptr - 2, 2); goto exit; } } @@ -2072,10 +1983,8 @@ static inline void tcg_out_op(TCGContext *s, TCGOpco= de opc, tcg_out_insn(s, RI, AHI, a0, a2); break; } - if (HAVE_FACILITY(EXT_IMM)) { - tcg_out_insn(s, RIL, AFI, a0, a2); - break; - } + tcg_out_insn(s, RIL, AFI, a0, a2); + break; } tcg_out_mem(s, RX_LA, RXY_LAY, a0, a1, TCG_REG_NONE, a2); } else if (a0 =3D=3D a1) { @@ -2326,17 +2235,17 @@ static inline void tcg_out_op(TCGContext *s, TCGOpc= ode opc, tcg_out_insn(s, RI, AGHI, a0, a2); break; } - if (HAVE_FACILITY(EXT_IMM)) { - if (a2 =3D=3D (int32_t)a2) { - tcg_out_insn(s, RIL, AGFI, a0, a2); - break; - } else if (a2 =3D=3D (uint32_t)a2) { - tcg_out_insn(s, RIL, ALGFI, a0, a2); - break; - } else if (-a2 =3D=3D (uint32_t)-a2) { - tcg_out_insn(s, RIL, SLGFI, a0, -a2); - break; - } + if (a2 =3D=3D (int32_t)a2) { + tcg_out_insn(s, RIL, AGFI, a0, a2); + break; + } + if (a2 =3D=3D (uint32_t)a2) { + tcg_out_insn(s, RIL, ALGFI, a0, a2); + break; + } + if (-a2 =3D=3D (uint32_t)-a2) { + tcg_out_insn(s, RIL, SLGFI, a0, -a2); + break; } } tcg_out_mem(s, RX_LA, RXY_LAY, a0, a1, TCG_REG_NONE, a2); @@ -3137,15 +3046,11 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGO= pcode op) =20 case INDEX_op_add2_i32: case INDEX_op_sub2_i32: - return (HAVE_FACILITY(EXT_IMM) - ? C_O2_I4(r, r, 0, 1, ri, r) - : C_O2_I4(r, r, 0, 1, r, r)); + return C_O2_I4(r, r, 0, 1, ri, r); =20 case INDEX_op_add2_i64: case INDEX_op_sub2_i64: - return (HAVE_FACILITY(EXT_IMM) - ? C_O2_I4(r, r, 0, 1, rA, r) - : C_O2_I4(r, r, 0, 1, r, r)); + return C_O2_I4(r, r, 0, 1, rA, r); =20 case INDEX_op_st_vec: return C_O0_I2(v, r); @@ -3242,6 +3147,10 @@ static void query_s390_facilities(void) which =3D "long-displacement"; goto fail; } + if (!HAVE_FACILITY(EXT_IMM)) { + which =3D "extended-immediate"; + goto fail; + } return; =20 fail: --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670552018; cv=none; d=zohomail.com; s=zohoarc; b=l69qjGYHPNrc0zr/jIbPPHTIlpYf49MDsniLzs4k/VeGmnew67tOCX9VYYTd7bIDxhbuSnm8giu/3YwRai1Lm8Eglg0idF5unX1oCC2oy8ldyy+Cf4x6dhIchEZOir4d0Pu58DpmKhquxcznHZFP/L/K/jHQHPfuAWZBe2PVPG4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670552018; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=oaWPLzYHFjhFB1tuAfWhCD/kpjISuCEiRwLxQm7Lwyo=; b=VJt5UNVmOxVCZTGVSEI1cqeZjw/QRpyyEGuwoAIHjV0r6duQAFJKViRc4Ez2VOJ2ANcFcOFqP2jfjz4aEW5+h3QXNGCHBvz1lmycEauLoayZFKJqzgK3SWLeFGN8UNSByAynm22f8wuJn6G6sCodL77DvQp0XJdkHeig2RyqH70= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1670552018985187.26689148908042; Thu, 8 Dec 2022 18:13:38 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3Slm-0005wX-TA; Thu, 08 Dec 2022 21:05:46 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3Slk-0005ua-Cj for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:44 -0500 Received: from mail-ot1-x331.google.com ([2607:f8b0:4864:20::331]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Sli-0001vI-DW for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:44 -0500 Received: by mail-ot1-x331.google.com with SMTP id cn2-20020a056830658200b0066c74617e3dso1997404otb.2 for ; Thu, 08 Dec 2022 18:05:41 -0800 (PST) Received: from stoup.. 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Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich --- tcg/s390x/tcg-target.h | 10 ++-- tcg/s390x/tcg-target.c.inc | 100 ++++++++++++++++--------------------- 2 files changed, 49 insertions(+), 61 deletions(-) diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h index 126ba1048a..d47e8ba66a 100644 --- a/tcg/s390x/tcg-target.h +++ b/tcg/s390x/tcg-target.h @@ -57,10 +57,10 @@ typedef enum TCGReg { #define FACILITY_ZARCH_ACTIVE 2 #define FACILITY_LONG_DISP 18 #define FACILITY_EXT_IMM 21 +#define FACILITY_GEN_INST_EXT 34 =20 /* Facilities that are checked at runtime. */ =20 -#define FACILITY_GEN_INST_EXT 34 #define FACILITY_LOAD_ON_COND 45 #define FACILITY_FAST_BCR_SER FACILITY_LOAD_ON_COND #define FACILITY_DISTINCT_OPS FACILITY_LOAD_ON_COND @@ -92,8 +92,8 @@ extern uint64_t s390_facilities[3]; #define TCG_TARGET_HAS_clz_i32 0 #define TCG_TARGET_HAS_ctz_i32 0 #define TCG_TARGET_HAS_ctpop_i32 0 -#define TCG_TARGET_HAS_deposit_i32 HAVE_FACILITY(GEN_INST_EXT) -#define TCG_TARGET_HAS_extract_i32 HAVE_FACILITY(GEN_INST_EXT) +#define TCG_TARGET_HAS_deposit_i32 1 +#define TCG_TARGET_HAS_extract_i32 1 #define TCG_TARGET_HAS_sextract_i32 0 #define TCG_TARGET_HAS_extract2_i32 0 #define TCG_TARGET_HAS_movcond_i32 1 @@ -129,8 +129,8 @@ extern uint64_t s390_facilities[3]; #define TCG_TARGET_HAS_clz_i64 1 #define TCG_TARGET_HAS_ctz_i64 0 #define TCG_TARGET_HAS_ctpop_i64 0 -#define TCG_TARGET_HAS_deposit_i64 HAVE_FACILITY(GEN_INST_EXT) -#define TCG_TARGET_HAS_extract_i64 HAVE_FACILITY(GEN_INST_EXT) +#define TCG_TARGET_HAS_deposit_i64 1 +#define TCG_TARGET_HAS_extract_i64 1 #define TCG_TARGET_HAS_sextract_i64 0 #define TCG_TARGET_HAS_extract2_i64 0 #define TCG_TARGET_HAS_movcond_i64 1 diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index 42e161cc7e..f0b581293c 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -843,15 +843,8 @@ static void tcg_out_movi(TCGContext *s, TCGType type, } =20 /* Otherwise, stuff it in the constant pool. */ - if (HAVE_FACILITY(GEN_INST_EXT)) { - tcg_out_insn(s, RIL, LGRL, ret, 0); - new_pool_label(s, sval, R_390_PC32DBL, s->code_ptr - 2, 2); - } else { - TCGReg base =3D ret ? ret : TCG_TMP0; - tcg_out_insn(s, RIL, LARL, base, 0); - new_pool_label(s, sval, R_390_PC32DBL, s->code_ptr - 2, 2); - tcg_out_insn(s, RXY, LG, ret, base, TCG_REG_NONE, 0); - } + tcg_out_insn(s, RIL, LGRL, ret, 0); + new_pool_label(s, sval, R_390_PC32DBL, s->code_ptr - 2, 2); } =20 /* Emit a load/store type instruction. Inputs are: @@ -1105,7 +1098,7 @@ static void tgen_andi(TCGContext *s, TCGType type, TC= GReg dest, uint64_t val) return; } } - if (HAVE_FACILITY(GEN_INST_EXT) && risbg_mask(val)) { + if (risbg_mask(val)) { tgen_andi_risbg(s, dest, dest, val); return; } @@ -1460,48 +1453,47 @@ static void tgen_brcond(TCGContext *s, TCGType type= , TCGCond c, TCGReg r1, TCGArg c2, int c2const, TCGLabel *l) { int cc; + bool is_unsigned =3D is_unsigned_cond(c); + bool in_range; + S390Opcode opc; =20 - if (HAVE_FACILITY(GEN_INST_EXT)) { - bool is_unsigned =3D is_unsigned_cond(c); - bool in_range; - S390Opcode opc; + cc =3D tcg_cond_to_s390_cond[c]; =20 - cc =3D tcg_cond_to_s390_cond[c]; + if (!c2const) { + opc =3D (type =3D=3D TCG_TYPE_I32 + ? (is_unsigned ? RIE_CLRJ : RIE_CRJ) + : (is_unsigned ? RIE_CLGRJ : RIE_CGRJ)); + tgen_compare_branch(s, opc, cc, r1, c2, l); + return; + } =20 - if (!c2const) { - opc =3D (type =3D=3D TCG_TYPE_I32 - ? (is_unsigned ? RIE_CLRJ : RIE_CRJ) - : (is_unsigned ? RIE_CLGRJ : RIE_CGRJ)); - tgen_compare_branch(s, opc, cc, r1, c2, l); - return; - } - - /* COMPARE IMMEDIATE AND BRANCH RELATIVE has an 8-bit immediate fi= eld. - If the immediate we've been given does not fit that range, we'll - fall back to separate compare and branch instructions using the - larger comparison range afforded by COMPARE IMMEDIATE. */ - if (type =3D=3D TCG_TYPE_I32) { - if (is_unsigned) { - opc =3D RIE_CLIJ; - in_range =3D (uint32_t)c2 =3D=3D (uint8_t)c2; - } else { - opc =3D RIE_CIJ; - in_range =3D (int32_t)c2 =3D=3D (int8_t)c2; - } + /* + * COMPARE IMMEDIATE AND BRANCH RELATIVE has an 8-bit immediate field. + * If the immediate we've been given does not fit that range, we'll + * fall back to separate compare and branch instructions using the + * larger comparison range afforded by COMPARE IMMEDIATE. + */ + if (type =3D=3D TCG_TYPE_I32) { + if (is_unsigned) { + opc =3D RIE_CLIJ; + in_range =3D (uint32_t)c2 =3D=3D (uint8_t)c2; } else { - if (is_unsigned) { - opc =3D RIE_CLGIJ; - in_range =3D (uint64_t)c2 =3D=3D (uint8_t)c2; - } else { - opc =3D RIE_CGIJ; - in_range =3D (int64_t)c2 =3D=3D (int8_t)c2; - } + opc =3D RIE_CIJ; + in_range =3D (int32_t)c2 =3D=3D (int8_t)c2; } - if (in_range) { - tgen_compare_imm_branch(s, opc, cc, r1, c2, l); - return; + } else { + if (is_unsigned) { + opc =3D RIE_CLGIJ; + in_range =3D (uint64_t)c2 =3D=3D (uint8_t)c2; + } else { + opc =3D RIE_CGIJ; + in_range =3D (int64_t)c2 =3D=3D (int8_t)c2; } } + if (in_range) { + tgen_compare_imm_branch(s, opc, cc, r1, c2, l); + return; + } =20 cc =3D tgen_cmp(s, type, c, r1, c2, c2const, false); tgen_branch(s, cc, l); @@ -1659,7 +1651,7 @@ static TCGReg tcg_out_tlb_read(TCGContext *s, TCGReg = addr_reg, MemOp opc, cross pages using the address of the last byte of the access. */ a_off =3D (a_bits >=3D s_bits ? 0 : s_mask - a_mask); tlb_mask =3D (uint64_t)TARGET_PAGE_MASK | a_mask; - if (HAVE_FACILITY(GEN_INST_EXT) && a_off =3D=3D 0) { + if (a_off =3D=3D 0) { tgen_andi_risbg(s, TCG_REG_R3, addr_reg, tlb_mask); } else { tcg_out_insn(s, RX, LA, TCG_REG_R3, addr_reg, TCG_REG_NONE, a_off); @@ -2972,17 +2964,9 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOp= code op) : C_O1_I2(r, 0, ri)); =20 case INDEX_op_mul_i32: - /* If we have the general-instruction-extensions, then we have - MULTIPLY SINGLE IMMEDIATE with a signed 32-bit, otherwise we - have only MULTIPLY HALFWORD IMMEDIATE, with a signed 16-bit. */ - return (HAVE_FACILITY(GEN_INST_EXT) - ? C_O1_I2(r, 0, ri) - : C_O1_I2(r, 0, rI)); - + return C_O1_I2(r, 0, ri); case INDEX_op_mul_i64: - return (HAVE_FACILITY(GEN_INST_EXT) - ? C_O1_I2(r, 0, rJ) - : C_O1_I2(r, 0, rI)); + return C_O1_I2(r, 0, rJ); =20 case INDEX_op_shl_i32: case INDEX_op_shr_i32: @@ -3151,6 +3135,10 @@ static void query_s390_facilities(void) which =3D "extended-immediate"; goto fail; } + if (!HAVE_FACILITY(GEN_INST_EXT)) { + which =3D "general-instructions-extension"; + goto fail; + } return; =20 fail: --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670552147; cv=none; d=zohomail.com; s=zohoarc; b=WGDf5g+wNOx21FsTKMjQk8/PVEHiSYDSGoX7Vh9zYCobpFUuHutNx+CugIq7JyDj8wr+w8FEd3grAbUAGr6qYtmzNUQUbdXiUsLVpQg5pm22s2VCxIaqe4qufYwsp47xXsNQpL72RVqvmsXiw8HixdyV/A8Z/xHTed5EoGVG1pY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670552147; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=h4n6658V8gzuBQVeX0F+T4ObLOLK7n60xjvBN2Tekig=; b=XMe/PzJpo9hbb8m7VHGvq9FvwfWfs6FB7Av8Qx3ChX3+sZJex4eJtGbJb2DGbGpOAKPpqv8NaRX2vvtp78vGei/IFQ5+I3oPjXCJjjQwv3uftSdRZTdANkU30C+ECyKnM/5P4PLbsPcjCXp4W3gApqyQDSp5U1WFzgdCe1f6bqg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1670552147944776.2988940665462; Thu, 8 Dec 2022 18:15:47 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3Slm-0005w6-8H; Thu, 08 Dec 2022 21:05:46 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3Sll-0005vE-DK for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:45 -0500 Received: from mail-ot1-x335.google.com ([2607:f8b0:4864:20::335]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Slj-0001vW-LQ for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:45 -0500 Received: by mail-ot1-x335.google.com with SMTP id l8-20020a056830054800b006705fd35eceso1976110otb.12 for ; Thu, 08 Dec 2022 18:05:43 -0800 (PST) Received: from stoup.. ([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.05.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:05:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=h4n6658V8gzuBQVeX0F+T4ObLOLK7n60xjvBN2Tekig=; b=ZaH47SsZ5p/Af+izYy/fULz6+LtGGrw8NgJVoKzVBkBxO2dRonww80HhSf/Z00SLSs rT6cYFNodAGaMIkxTLLfO9CyOtHobz8qyh/dFjGfwKwy3XPHxCqJJvUaHtKOrM2xaKXL 2yi1VhlaNi6B8ZzKZsQNYgs06s6EabT6+X3I5x9tV+XSdmj/Ccu/ARGbzveT/jFhpj1R 5d0PthhEGQkU2W9lnQLIn4fV3kz6R1vLKaWBnLzow/JdK8PIoiXP4wA6civSUj4Wwi9S TJn5R/k8r+Ilw29zibY1J+9tHG2NA9ZLcQZm9y2gW0lCjjmRWpFYYo4mBqPpE7IVMNwH Gwsw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=h4n6658V8gzuBQVeX0F+T4ObLOLK7n60xjvBN2Tekig=; b=RzHvpCiH46v2QdNWwHZt6bqOR24X6gr2NdycfZRfgCjCrdoecrOfffFwFncIkMJyMR EHtUy2vqYh0RCqTJRZteOYN7AGHj11zRi6a5qeySrwqZ7dhI6nrvQpnxTBc5cTVdSr7G TzdrS8AKQF/bIbFnxz2npBmeXwvmhknVT2zYj8ed5pSUisSBoTx8+Y+vyHmXFn5j4m2P 6BRHKE8Mn36vHkAoNKVpo5RnrvRjWpQ3paYDs8fem6RlFZx3CmRPccMEVXe3lPghV+q/ e/miYkla5GW5xMJi2I90mqDzwhMnx2HVNe/HCrVIxbc5tuySz/GXEiv6CellOtLDWlq/ eS/A== X-Gm-Message-State: ANoB5pnsA78aloOhpHaAsr4P13QeWVL53XPk0H85Gc6cdLUQXFst85PO JxT7PX28BHta5whLw9gsTF/hkJlii9N/xMV5I14= X-Google-Smtp-Source: AA0mqf74uP3aWSTsUL7bnnMRtgmx6khK0dSY3XbUJs1vIMBfYLnRgA5MBqjRTl5BPrX5s7IxTh6KTw== X-Received: by 2002:a9d:30f:0:b0:670:5bc0:fd66 with SMTP id 15-20020a9d030f000000b006705bc0fd66mr1753608otv.30.1670551542325; Thu, 08 Dec 2022 18:05:42 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 08/27] tcg/s390x: Check for load-on-condition facility at startup Date: Thu, 8 Dec 2022 20:05:11 -0600 Message-Id: <20221209020530.396391-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::335; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670552149799100003 Content-Type: text/plain; charset="utf-8" The general-instruction-extension facility was introduced in z196, which itself was end-of-life in 2021. In addition, z196 is the minimum CPU supported by our set of supported operating systems: RHEL 7 (z196), SLES 12 (z196) and Ubuntu 16.04 (zEC12). Check for facility number 45, which will be the consilidated check for several facilities. Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich --- tcg/s390x/tcg-target.h | 6 ++-- tcg/s390x/tcg-target.c.inc | 72 +++++++++++++------------------------- 2 files changed, 27 insertions(+), 51 deletions(-) diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h index d47e8ba66a..31d5510d2d 100644 --- a/tcg/s390x/tcg-target.h +++ b/tcg/s390x/tcg-target.h @@ -58,12 +58,12 @@ typedef enum TCGReg { #define FACILITY_LONG_DISP 18 #define FACILITY_EXT_IMM 21 #define FACILITY_GEN_INST_EXT 34 +#define FACILITY_45 45 =20 /* Facilities that are checked at runtime. */ =20 -#define FACILITY_LOAD_ON_COND 45 -#define FACILITY_FAST_BCR_SER FACILITY_LOAD_ON_COND -#define FACILITY_DISTINCT_OPS FACILITY_LOAD_ON_COND +#define FACILITY_FAST_BCR_SER 45 +#define FACILITY_DISTINCT_OPS 45 #define FACILITY_LOAD_ON_COND2 53 #define FACILITY_VECTOR 129 #define FACILITY_VECTOR_ENH1 135 diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index f0b581293c..29a64ad0fe 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -1252,7 +1252,6 @@ static void tgen_setcond(TCGContext *s, TCGType type,= TCGCond cond, TCGReg dest, TCGReg c1, TCGArg c2, int c2const) { int cc; - bool have_loc; =20 /* With LOC2, we can always emit the minimum 3 insns. */ if (HAVE_FACILITY(LOAD_ON_COND2)) { @@ -1263,9 +1262,6 @@ static void tgen_setcond(TCGContext *s, TCGType type,= TCGCond cond, return; } =20 - have_loc =3D HAVE_FACILITY(LOAD_ON_COND); - - /* For HAVE_LOC, only the paths through GTU/GT/LEU/LE are smaller. */ restart: switch (cond) { case TCG_COND_NE: @@ -1310,59 +1306,35 @@ static void tgen_setcond(TCGContext *s, TCGType typ= e, TCGCond cond, case TCG_COND_LT: case TCG_COND_GE: /* Swap operands so that we can use LEU/GTU/GT/LE. */ - if (c2const) { - if (have_loc) { - break; - } - tcg_out_movi(s, type, TCG_TMP0, c2); - c2 =3D c1; - c2const =3D 0; - c1 =3D TCG_TMP0; - } else { + if (!c2const) { TCGReg t =3D c1; c1 =3D c2; c2 =3D t; + cond =3D tcg_swap_cond(cond); + goto restart; } - cond =3D tcg_swap_cond(cond); - goto restart; + break; =20 default: g_assert_not_reached(); } =20 cc =3D tgen_cmp(s, type, cond, c1, c2, c2const, false); - if (have_loc) { - /* Emit: d =3D 0, t =3D 1, d =3D (cc ? t : d). */ - tcg_out_movi(s, TCG_TYPE_I64, dest, 0); - tcg_out_movi(s, TCG_TYPE_I64, TCG_TMP0, 1); - tcg_out_insn(s, RRF, LOCGR, dest, TCG_TMP0, cc); - } else { - /* Emit: d =3D 1; if (cc) goto over; d =3D 0; over: */ - tcg_out_movi(s, type, dest, 1); - tcg_out_insn(s, RI, BRC, cc, (4 + 4) >> 1); - tcg_out_movi(s, type, dest, 0); - } + /* Emit: d =3D 0, t =3D 1, d =3D (cc ? t : d). */ + tcg_out_movi(s, TCG_TYPE_I64, dest, 0); + tcg_out_movi(s, TCG_TYPE_I64, TCG_TMP0, 1); + tcg_out_insn(s, RRF, LOCGR, dest, TCG_TMP0, cc); } =20 static void tgen_movcond(TCGContext *s, TCGType type, TCGCond c, TCGReg de= st, TCGReg c1, TCGArg c2, int c2const, TCGArg v3, int v3const) { - int cc; - if (HAVE_FACILITY(LOAD_ON_COND)) { - cc =3D tgen_cmp(s, type, c, c1, c2, c2const, false); - if (v3const) { - tcg_out_insn(s, RIE, LOCGHI, dest, v3, cc); - } else { - tcg_out_insn(s, RRF, LOCGR, dest, v3, cc); - } + int cc =3D tgen_cmp(s, type, c, c1, c2, c2const, false); + if (v3const) { + tcg_out_insn(s, RIE, LOCGHI, dest, v3, cc); } else { - c =3D tcg_invert_cond(c); - cc =3D tgen_cmp(s, type, c, c1, c2, c2const, false); - - /* Emit: if (cc) goto over; dest =3D r3; over: */ - tcg_out_insn(s, RI, BRC, cc, (4 + 4) >> 1); - tcg_out_insn(s, RRE, LGR, dest, v3); + tcg_out_insn(s, RRF, LOCGR, dest, v3, cc); } } =20 @@ -1382,14 +1354,8 @@ static void tgen_clz(TCGContext *s, TCGReg dest, TCG= Reg a1, } else { tcg_out_mov(s, TCG_TYPE_I64, dest, a2); } - if (HAVE_FACILITY(LOAD_ON_COND)) { - /* Emit: if (one bit found) dest =3D r0. */ - tcg_out_insn(s, RRF, LOCGR, dest, TCG_REG_R0, 2); - } else { - /* Emit: if (no one bit found) goto over; dest =3D r0; over: = */ - tcg_out_insn(s, RI, BRC, 8, (4 + 4) >> 1); - tcg_out_insn(s, RRE, LGR, dest, TCG_REG_R0); - } + /* Emit: if (one bit found) dest =3D r0. */ + tcg_out_insn(s, RRF, LOCGR, dest, TCG_REG_R0, 2); } } =20 @@ -3124,6 +3090,7 @@ static void query_s390_facilities(void) } =20 /* + * Minimum supported cpu revision is z196. * Check for all required facilities. * ZARCH_ACTIVE is done via preprocessor check for 64-bit. */ @@ -3139,6 +3106,15 @@ static void query_s390_facilities(void) which =3D "general-instructions-extension"; goto fail; } + /* + * Facility 45 is a big bin that contains: distinct-operands, + * fast-BCR-serialization, high-word, population-count, + * interlocked-access-1, and load/store-on-condition-1 + */ + if (!HAVE_FACILITY(45)) { + which =3D "45"; + goto fail; + } return; =20 fail: --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670551649; cv=none; d=zohomail.com; s=zohoarc; b=DzGQtf+RzjJCOA6/EJLoYiGweBJ6xUTr/hCa4NYIPPnwU8lCefDNq64u3v26VoWpSofZXJidSCxWuHfWV2uXS1AlHiKVR6BxAFQCt4QcOqmflCNn+v+0ul0rP8HbkdgbrtmL6qqRD9FhJmeimidm/zZ1VwnM9A+0SpOaodK4vDw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670551649; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=/3AO0EWlMT0lILOrDJMjNk2wMlVf+vs0sOwevFdt0Qk=; b=Qss/cFA9IAXPUdwUpxjaEtTJK5rb3w1kUNTbBoFRg15a7lbpsw8u0UqZYz3ginENBV9xqdov2Tj4qkJO0MTrGkDBhg/T7AZALKQi0WNc8ANZOQn21IVBUtNrpp26bsJr1dNzPDf87Bifh1N76FXuWj3c4xcbOCXMwHabBGnRVl0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 167055164945934.401004610958125; Thu, 8 Dec 2022 18:07:29 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3Slr-0005x2-Qq; Thu, 08 Dec 2022 21:05:51 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3Slm-0005w8-A3 for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:46 -0500 Received: from mail-oi1-x234.google.com ([2607:f8b0:4864:20::234]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Slk-0001vq-PO for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:46 -0500 Received: by mail-oi1-x234.google.com with SMTP id l127so3259646oia.8 for ; Thu, 08 Dec 2022 18:05:44 -0800 (PST) Received: from stoup.. ([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.05.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:05:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/3AO0EWlMT0lILOrDJMjNk2wMlVf+vs0sOwevFdt0Qk=; b=JTY/iGJ9C5Mr36xPA84a7WAqdtyZMxSRgvmPxpL/EEwLe0arnbuOrhzUT/4D1j0nV3 sD3r/e/PgH456CzMlL3gmmZHMuq+/RNeQgCuMGoeemjkjjiqKY45FatuFA2bTvTk6UrS B2ZoovvhvPX6NQ/tqufF9ag4Q6WjLzlgQdFRyGeE8nDI3rWBhdABpWE+/R2pJFli1yIl KPJLsO8B8VaMjPHCravd45nbQLjckPFVN8vXh0l5A4GRuAsrofoXd0FTcjXHWz3o/mGV hRWURbVH+huTbvbsiVcJo4jVpO3UnLZpQNEx7JMCh7mg0NiRlz6DeA7Ob8qmerVB8/08 GEOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/3AO0EWlMT0lILOrDJMjNk2wMlVf+vs0sOwevFdt0Qk=; b=dRJGd+veUpzh4COw+nlUrGjEwJZJbPVXObu+aOeRBDQZvKSQLQmBk49ufCSsKwPhNU I4MK4Xe7uy60OWmwAmzJz1s4UE4WDDrwLf9en3WcJq5V/BqrBeWOmydLqfKJ+uW/uFCZ g60CVWcuP3Qd8mSPUXtCzOnrsBgADs3tIby2KXIK3wO7IbvWQALxhb72suOVY32Z7LpZ oysVOejH9lUSQPDNYxGXVSlVVCvA0PUVFCckKNgI45gmsfjzOtk7uANC0EgbWzJDN/+K j4k0zgRi2tt5y7T99KbpqhjiWW+KPCWUK/jnvuy1zYjOXcG83TxF8OyEff1/nfnAlHV8 KNpg== X-Gm-Message-State: ANoB5pncfHarCSQgAq7cFIz8IkSCim36VHJZUPAeQdZlKJ6Fimt8vmg9 1zH6mtWfU9/lOK91gfoU81+/WMbWKjyqH6m94s4= X-Google-Smtp-Source: AA0mqf7BSj0uwH9jJJ0y9+Ch2+uxlsnYq0Q+bR7b2WwTjR9iPd3X+qe8DMFwgCt6Zq9UqWkVOR1wwg== X-Received: by 2002:a54:4503:0:b0:35b:822:8d71 with SMTP id l3-20020a544503000000b0035b08228d71mr1542981oil.9.1670551543460; Thu, 08 Dec 2022 18:05:43 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 09/27] tcg/s390x: Remove FAST_BCR_SER facility check Date: Thu, 8 Dec 2022 20:05:12 -0600 Message-Id: <20221209020530.396391-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::234; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x234.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670551650811100001 Content-Type: text/plain; charset="utf-8" The fast-bcr-serialization facility is bundled into facility 45, along with load-on-condition. We are checking this at startup. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- tcg/s390x/tcg-target.h | 1 - tcg/s390x/tcg-target.c.inc | 3 ++- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h index 31d5510d2d..fc9ae82700 100644 --- a/tcg/s390x/tcg-target.h +++ b/tcg/s390x/tcg-target.h @@ -62,7 +62,6 @@ typedef enum TCGReg { =20 /* Facilities that are checked at runtime. */ =20 -#define FACILITY_FAST_BCR_SER 45 #define FACILITY_DISTINCT_OPS 45 #define FACILITY_LOAD_ON_COND2 53 #define FACILITY_VECTOR 129 diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index 29a64ad0fe..dd58f0cdb5 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -2431,7 +2431,8 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcod= e opc, /* The host memory model is quite strong, we simply need to serialize the instruction stream. */ if (args[0] & TCG_MO_ST_LD) { - tcg_out_insn(s, RR, BCR, HAVE_FACILITY(FAST_BCR_SER) ? 14 : 15= , 0); + /* fast-bcr-serialization facility (45) is present */ + tcg_out_insn(s, RR, BCR, 14, 0); } break; =20 --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670552157; cv=none; d=zohomail.com; s=zohoarc; b=IyUmLVFw4xWaOHFXYCHjWZ8Z5hMePP8r9s7d6LFDQwikXdaMiSQPDpNsI9xmLwuG/V+BLxWg43vZe9XlhwYpaXIoZe8uEdr6CArd0DFwFuPMnp8ZGP23uoVmpW1xpbGVsHZYR2IGogYUqnhPhMTvoq5XAomVXJ1/Z5d0rIrXD5A= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670552157; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=8dJchTnb5uNiKNB26rXc8pPkHP1mXmQfsp6Yr2QLErc=; b=JSSQZg9DJN4NR8xf/6xTA3ySn1oLdYRJ5CwvsZg7ijl9N5wtQGjhy3mDEwoNMYzYfnZvsDzu6QKPNN7M/F6bpmjzahGe3BaTys5g/Z4I5G1I+oDbrNRYQx8RWKFQ6cj3Bl+MZk35O5KmUTNnHXlPdfSK/GDHZoKDQxBPeEBrNVs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1670552157908915.4682801113279; Thu, 8 Dec 2022 18:15:57 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3Slu-0005y9-GQ; Thu, 08 Dec 2022 21:05:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3Sln-0005wr-9t for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:47 -0500 Received: from mail-ot1-x32a.google.com ([2607:f8b0:4864:20::32a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Sll-0001w4-M5 for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:47 -0500 Received: by mail-ot1-x32a.google.com with SMTP id l8-20020a056830054800b006705fd35eceso1976152otb.12 for ; Thu, 08 Dec 2022 18:05:45 -0800 (PST) Received: from stoup.. ([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.05.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:05:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8dJchTnb5uNiKNB26rXc8pPkHP1mXmQfsp6Yr2QLErc=; b=KUBnXHO2/NXDiZ3Z+wRw+tlJznXRr0B93swlrGi0GU68T7nYPakQm3ahodaW1bShym 9tUBrQ9s2RCXr4fFFfaE8TY9Y22yfbQp9f5YS/lcU5PJ5Wrlfb14an0+49BojaxSvaXk zM3H6cOtSrrPJoEMKHDQCLJh8D4p2DiC/WTMfMsciYAAhJrAeCY7IV3gcYoa34M3C/oE iMvaleAVdR3wkXcVkCe0JuJmtNTK9jaM1od89L9ogCFwBVDOzrmRmEW2q1PUnPstRPwJ Q83WDwr339XejQAu//fierr2FlEtYu24PnL//O+Dm6z8eti0JqeYOHY7GaHRkp0hLRbd X+0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8dJchTnb5uNiKNB26rXc8pPkHP1mXmQfsp6Yr2QLErc=; b=KhL9kzMK1zsUxCe/dDU5fBu7uwljcZf62gH7k8+y1XgG+q9R3VDZiD7v7xb0uUvTk9 XfJwP3rFtCdCh/n2RZqCNEDNE4WzAvO1mmnI/fsy2yjNw8ofpGkJJZAXOoVlvml7UIQR UdoHasrAZ7CNgySuJzx9u8GIFqUSu/uIZuLsCmfsA3+9GlD79LO/bHtfNbFG82Zwd2Zl et8sTg6yT7DW7Q0yEBietbhVWgfeaFh1sCWsp6hCwIXQ6GVuFs20pvV4DJCuc7iWxAoq AxJtQfkvzetxRNZDu4QDEK8B8e0/XCzPqkAOpOT9wqoM6xZrm0IZhdxLTPpC0UcRGmsj Lr4A== X-Gm-Message-State: ANoB5pnIIb59FKBGDtm2n3CH1iPmur4OqRxJDc6d4a1cBB4NXulZTsUs QTRn0X2YxDCZ7XjbI7QVGsHaETqGy359k2nCU+4= X-Google-Smtp-Source: AA0mqf5FIBYlcNg/exbp3iAwK7oAoOgAzFrL+qpe1JOoDA2VVGu/DMGbfcT4EL+fLvCo+mFfYrlkKQ== X-Received: by 2002:a9d:161:0:b0:670:6615:a9e8 with SMTP id 88-20020a9d0161000000b006706615a9e8mr2314094otu.34.1670551544590; Thu, 08 Dec 2022 18:05:44 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 10/27] tcg/s390x: Remove DISTINCT_OPERANDS facility check Date: Thu, 8 Dec 2022 20:05:13 -0600 Message-Id: <20221209020530.396391-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32a; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670552159787100003 Content-Type: text/plain; charset="utf-8" The distinct-operands facility is bundled into facility 45, along with load-on-condition. We are checking this at startup. Remove the a0 =3D=3D a1 checks for 64-bit sub, and, or, xor, as there is no space savings for avoiding the distinct-operands insn. Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich --- tcg/s390x/tcg-target.h | 1 - tcg/s390x/tcg-target.c.inc | 16 ++-------------- 2 files changed, 2 insertions(+), 15 deletions(-) diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h index fc9ae82700..db10a39381 100644 --- a/tcg/s390x/tcg-target.h +++ b/tcg/s390x/tcg-target.h @@ -62,7 +62,6 @@ typedef enum TCGReg { =20 /* Facilities that are checked at runtime. */ =20 -#define FACILITY_DISTINCT_OPS 45 #define FACILITY_LOAD_ON_COND2 53 #define FACILITY_VECTOR 129 #define FACILITY_VECTOR_ENH1 135 diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index dd58f0cdb5..e4403ffabf 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -2218,8 +2218,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcod= e opc, if (const_args[2]) { a2 =3D -a2; goto do_addi_64; - } else if (a0 =3D=3D a1) { - tcg_out_insn(s, RRE, SGR, a0, a2); } else { tcg_out_insn(s, RRF, SGRK, a0, a1, a2); } @@ -2230,8 +2228,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcod= e opc, if (const_args[2]) { tcg_out_mov(s, TCG_TYPE_I64, a0, a1); tgen_andi(s, TCG_TYPE_I64, args[0], args[2]); - } else if (a0 =3D=3D a1) { - tcg_out_insn(s, RRE, NGR, args[0], args[2]); } else { tcg_out_insn(s, RRF, NGRK, a0, a1, a2); } @@ -2241,8 +2237,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcod= e opc, if (const_args[2]) { tcg_out_mov(s, TCG_TYPE_I64, a0, a1); tgen_ori(s, TCG_TYPE_I64, a0, a2); - } else if (a0 =3D=3D a1) { - tcg_out_insn(s, RRE, OGR, a0, a2); } else { tcg_out_insn(s, RRF, OGRK, a0, a1, a2); } @@ -2252,8 +2246,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcod= e opc, if (const_args[2]) { tcg_out_mov(s, TCG_TYPE_I64, a0, a1); tgen_xori(s, TCG_TYPE_I64, a0, a2); - } else if (a0 =3D=3D a1) { - tcg_out_insn(s, RRE, XGR, a0, a2); } else { tcg_out_insn(s, RRF, XGRK, a0, a1, a2); } @@ -2926,9 +2918,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpc= ode op) case INDEX_op_or_i64: case INDEX_op_xor_i32: case INDEX_op_xor_i64: - return (HAVE_FACILITY(DISTINCT_OPS) - ? C_O1_I2(r, r, ri) - : C_O1_I2(r, 0, ri)); + return C_O1_I2(r, r, ri); =20 case INDEX_op_mul_i32: return C_O1_I2(r, 0, ri); @@ -2938,9 +2928,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpc= ode op) case INDEX_op_shl_i32: case INDEX_op_shr_i32: case INDEX_op_sar_i32: - return (HAVE_FACILITY(DISTINCT_OPS) - ? C_O1_I2(r, r, ri) - : C_O1_I2(r, 0, ri)); + return C_O1_I2(r, r, ri); =20 case INDEX_op_brcond_i32: case INDEX_op_brcond_i64: --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670552165; cv=none; d=zohomail.com; s=zohoarc; b=Dx5m50VRbHrCNmKncf6rddaOv9my3+KDoovAF3Lpq5xDWA6gqvBPuYmMwOHvQ3Yv8fqD8WrQxNncISrKh3mAeeX/XnUGxqeHAGAu4a3MpSaQ/R1mi44qcj5hHyY1c9wWXJq4Fmlqj9o0mq7Qfk62BH6uVLUeAnuZJpBRFGt2laY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670552165; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=81bUyJ3q1hrBplCCzLWitqxn9dUaRZZOJiTy7eZWBno=; b=aVRjEtmtexmB7zzGHL/GjRfizAxe4AlRdfeRJ4T8TBPO8vg6ozOF31J7BR6rTnhFK49HX+3SC4Ikrmk7q9IXPly53J9PI1lUMWzqQi/NUiHqtp2ikRrqZyQCEEVLAeOid2KXvSe3boH0AebjXwvS4yuJTex5Cj7gpGwftM03UJA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1670552164993490.47788713374075; Thu, 8 Dec 2022 18:16:04 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3Slu-0005y8-GM; Thu, 08 Dec 2022 21:05:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3Slo-0005x3-Cq for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:51 -0500 Received: from mail-oi1-x22d.google.com ([2607:f8b0:4864:20::22d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Slm-0001wJ-Qo for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:48 -0500 Received: by mail-oi1-x22d.google.com with SMTP id k189so3263420oif.7 for ; Thu, 08 Dec 2022 18:05:46 -0800 (PST) Received: from stoup.. ([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.05.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:05:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=81bUyJ3q1hrBplCCzLWitqxn9dUaRZZOJiTy7eZWBno=; b=lNuCi2cDRXWwqgayG1kfNaqGV7g8CdyZtJTRCzSvqUZrDdKIOYgmXxBhODc53L0jcU IA//zxgDJ58LgilMRjSiO2IsZOhV6nGJCBdoFeueecdad4fC0lHWb/Be5ZIAQEgBJNC5 zaeUO2yMt68nRad9BSI03ri5OKpza1YWfSpAu1E9YYoDwVTFVT/Sx5s1jJuwfh+UTKgb fU3u9vjpwl4svPT/KK8H4LIv+izyihntGIr8fFFXJt3rm8IIgoV1Te3W+EoAHtyj/iqQ h8D74eDAB5We+b0Wp8axs/lHUfs4KzutYDYj1Yle22HqhoMv+e51c4R7CnLpQ31s+dYN SW5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=81bUyJ3q1hrBplCCzLWitqxn9dUaRZZOJiTy7eZWBno=; b=cHdE2Wn5MyHzj4e7gFCdQdMBIURw6ZlOGaRB6lx9SZ1aMx/1NfonxlreBBzKkbZdkf bww7kuW98kX+AauCb94IqBdhfpFYj6kJmsv/Sljc1XAK4OqgxM6hZ1Mip4ktsEk3PoQT smK9FFs0pJM3xkgXblzWVzgqJi3qJv4gMKlkTVKaHFBeHV49PmTZSQ0zihtuRuZBpCiQ Vgr+3fPzkUucoFM0MuA0niuDr2JTeyXtFeb0xUmB0XV70CKaNxQhgNhnPErqc2l7YU/j WjoYJAUAttbKK+2QuMAc+T9cKUA+O94U+c2+XndV31brI8yL81EovBtM6t39Fe94UTC7 dcNA== X-Gm-Message-State: ANoB5plkgKuQHkSH9j7+q43zx0IGf/m6O/hiPLjcDP6uPEUp4VEwZAXl 5GL1po2seciCmKfm5QqvEF+VijYAuGV8iX5TWDI= X-Google-Smtp-Source: AA0mqf615tEUYFCK8gOU9uNQavRE+UbXGURSdi7YCzN6WDeiAKrpOKsZhMBIC0Jq9dk8JYMOnuSalw== X-Received: by 2002:a05:6808:296:b0:35b:bebf:f89c with SMTP id z22-20020a056808029600b0035bbebff89cmr1779789oic.15.1670551545673; Thu, 08 Dec 2022 18:05:45 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 11/27] tcg/s390x: Use LARL+AGHI for odd addresses Date: Thu, 8 Dec 2022 20:05:14 -0600 Message-Id: <20221209020530.396391-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::22d; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x22d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670552165852100001 Content-Type: text/plain; charset="utf-8" Add one instead of dropping odd addresses to the constant pool. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.c.inc | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index e4403ffabf..6cf07152a5 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -806,6 +806,7 @@ static void tcg_out_movi(TCGContext *s, TCGType type, TCGReg ret, tcg_target_long sval) { tcg_target_ulong uval; + ptrdiff_t pc_off; =20 /* Try all 32-bit insns that can load it in one go. */ if (maybe_out_small_movi(s, type, ret, sval)) { @@ -832,14 +833,14 @@ static void tcg_out_movi(TCGContext *s, TCGType type, return; } =20 - /* Try for PC-relative address load. For odd addresses, - attempt to use an offset from the start of the TB. */ - if ((sval & 1) =3D=3D 0) { - ptrdiff_t off =3D tcg_pcrel_diff(s, (void *)sval) >> 1; - if (off =3D=3D (int32_t)off) { - tcg_out_insn(s, RIL, LARL, ret, off); - return; + /* Try for PC-relative address load. For odd addresses, add one. */ + pc_off =3D tcg_pcrel_diff(s, (void *)sval) >> 1; + if (pc_off =3D=3D (int32_t)pc_off) { + tcg_out_insn(s, RIL, LARL, ret, pc_off); + if (sval & 1) { + tcg_out_insn(s, RI, AGHI, ret, 1); } + return; } =20 /* Otherwise, stuff it in the constant pool. */ --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670552228; cv=none; d=zohomail.com; s=zohoarc; b=UCcrfXlVCmMUg6DpyutyqbDbwVoIlzt26d6R/b/7Hdq0IG0RaeOmcKY6j5oyXyZ++3WaGOeMmNHO+BhNRU0JIDa4nI3s8MWSLckacY0rXqvqvv7p20pYUZJRHGsemgbIaAGb94X7kfZ5vJXgAOqBDHbYEyPSN1jWaw4f4Lrv5R4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670552228; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=C23h7Yx8JzQKAeZMd/n6e9yoB9czBQRnkklZY0NaEjA=; b=UzMfil5kYStfmDNYE4e+b+SVzPtEia2dv/zNfRUmgF9Yjkx6PWBQ2zTSw2IJo6ifDnihsAMvozoi8/Nn2PSf/5+qJa131KBcuGPHfkzgFML7J5a5oQHjfhGOWqWsGNe5USv/Djt229WUmozJw/ngt4ubU3UIjmwnDbU3NXGghg8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 167055222880383.08909072963047; Thu, 8 Dec 2022 18:17:08 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3Slv-0005yT-56; Thu, 08 Dec 2022 21:05:55 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3Slt-0005xd-Jf for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:53 -0500 Received: from mail-ot1-x329.google.com ([2607:f8b0:4864:20::329]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Slr-0001wd-OO for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:53 -0500 Received: by mail-ot1-x329.google.com with SMTP id a7-20020a056830008700b0066c82848060so1994178oto.4 for ; Thu, 08 Dec 2022 18:05:47 -0800 (PST) Received: from stoup.. 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Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.c.inc | 57 +++++++++++++++++++++----------------- 1 file changed, 32 insertions(+), 25 deletions(-) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index 6cf07152a5..d38a602dd9 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -172,18 +172,19 @@ typedef enum S390Opcode { RRE_SLBGR =3D 0xb989, RRE_XGR =3D 0xb982, =20 - RRF_LOCR =3D 0xb9f2, - RRF_LOCGR =3D 0xb9e2, - RRF_NRK =3D 0xb9f4, - RRF_NGRK =3D 0xb9e4, - RRF_ORK =3D 0xb9f6, - RRF_OGRK =3D 0xb9e6, - RRF_SRK =3D 0xb9f9, - RRF_SGRK =3D 0xb9e9, - RRF_SLRK =3D 0xb9fb, - RRF_SLGRK =3D 0xb9eb, - RRF_XRK =3D 0xb9f7, - RRF_XGRK =3D 0xb9e7, + RRFa_NRK =3D 0xb9f4, + RRFa_NGRK =3D 0xb9e4, + RRFa_ORK =3D 0xb9f6, + RRFa_OGRK =3D 0xb9e6, + RRFa_SRK =3D 0xb9f9, + RRFa_SGRK =3D 0xb9e9, + RRFa_SLRK =3D 0xb9fb, + RRFa_SLGRK =3D 0xb9eb, + RRFa_XRK =3D 0xb9f7, + RRFa_XGRK =3D 0xb9e7, + + RRFc_LOCR =3D 0xb9f2, + RRFc_LOCGR =3D 0xb9e2, =20 RR_AR =3D 0x1a, RR_ALR =3D 0x1e, @@ -538,8 +539,14 @@ static void tcg_out_insn_RRE(TCGContext *s, S390Opcode= op, tcg_out32(s, (op << 16) | (r1 << 4) | r2); } =20 -static void tcg_out_insn_RRF(TCGContext *s, S390Opcode op, - TCGReg r1, TCGReg r2, int m3) +static void tcg_out_insn_RRFa(TCGContext *s, S390Opcode op, + TCGReg r1, TCGReg r2, TCGReg r3) +{ + tcg_out32(s, (op << 16) | (r3 << 12) | (r1 << 4) | r2); +} + +static void tcg_out_insn_RRFc(TCGContext *s, S390Opcode op, + TCGReg r1, TCGReg r2, int m3) { tcg_out32(s, (op << 16) | (m3 << 12) | (r1 << 4) | r2); } @@ -1324,7 +1331,7 @@ static void tgen_setcond(TCGContext *s, TCGType type,= TCGCond cond, /* Emit: d =3D 0, t =3D 1, d =3D (cc ? t : d). */ tcg_out_movi(s, TCG_TYPE_I64, dest, 0); tcg_out_movi(s, TCG_TYPE_I64, TCG_TMP0, 1); - tcg_out_insn(s, RRF, LOCGR, dest, TCG_TMP0, cc); + tcg_out_insn(s, RRFc, LOCGR, dest, TCG_TMP0, cc); } =20 static void tgen_movcond(TCGContext *s, TCGType type, TCGCond c, TCGReg de= st, @@ -1335,7 +1342,7 @@ static void tgen_movcond(TCGContext *s, TCGType type,= TCGCond c, TCGReg dest, if (v3const) { tcg_out_insn(s, RIE, LOCGHI, dest, v3, cc); } else { - tcg_out_insn(s, RRF, LOCGR, dest, v3, cc); + tcg_out_insn(s, RRFc, LOCGR, dest, v3, cc); } } =20 @@ -1356,7 +1363,7 @@ static void tgen_clz(TCGContext *s, TCGReg dest, TCGR= eg a1, tcg_out_mov(s, TCG_TYPE_I64, dest, a2); } /* Emit: if (one bit found) dest =3D r0. */ - tcg_out_insn(s, RRF, LOCGR, dest, TCG_REG_R0, 2); + tcg_out_insn(s, RRFc, LOCGR, dest, TCG_REG_R0, 2); } } =20 @@ -1960,7 +1967,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcod= e opc, } else if (a0 =3D=3D a1) { tcg_out_insn(s, RR, SR, a0, a2); } else { - tcg_out_insn(s, RRF, SRK, a0, a1, a2); + tcg_out_insn(s, RRFa, SRK, a0, a1, a2); } break; =20 @@ -1972,7 +1979,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcod= e opc, } else if (a0 =3D=3D a1) { tcg_out_insn(s, RR, NR, a0, a2); } else { - tcg_out_insn(s, RRF, NRK, a0, a1, a2); + tcg_out_insn(s, RRFa, NRK, a0, a1, a2); } break; case INDEX_op_or_i32: @@ -1983,7 +1990,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcod= e opc, } else if (a0 =3D=3D a1) { tcg_out_insn(s, RR, OR, a0, a2); } else { - tcg_out_insn(s, RRF, ORK, a0, a1, a2); + tcg_out_insn(s, RRFa, ORK, a0, a1, a2); } break; case INDEX_op_xor_i32: @@ -1994,7 +2001,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcod= e opc, } else if (a0 =3D=3D a1) { tcg_out_insn(s, RR, XR, args[0], args[2]); } else { - tcg_out_insn(s, RRF, XRK, a0, a1, a2); + tcg_out_insn(s, RRFa, XRK, a0, a1, a2); } break; =20 @@ -2220,7 +2227,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcod= e opc, a2 =3D -a2; goto do_addi_64; } else { - tcg_out_insn(s, RRF, SGRK, a0, a1, a2); + tcg_out_insn(s, RRFa, SGRK, a0, a1, a2); } break; =20 @@ -2230,7 +2237,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcod= e opc, tcg_out_mov(s, TCG_TYPE_I64, a0, a1); tgen_andi(s, TCG_TYPE_I64, args[0], args[2]); } else { - tcg_out_insn(s, RRF, NGRK, a0, a1, a2); + tcg_out_insn(s, RRFa, NGRK, a0, a1, a2); } break; case INDEX_op_or_i64: @@ -2239,7 +2246,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcod= e opc, tcg_out_mov(s, TCG_TYPE_I64, a0, a1); tgen_ori(s, TCG_TYPE_I64, a0, a2); } else { - tcg_out_insn(s, RRF, OGRK, a0, a1, a2); + tcg_out_insn(s, RRFa, OGRK, a0, a1, a2); } break; case INDEX_op_xor_i64: @@ -2248,7 +2255,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcod= e opc, tcg_out_mov(s, TCG_TYPE_I64, a0, a1); tgen_xori(s, TCG_TYPE_I64, a0, a2); } else { - tcg_out_insn(s, RRF, XGRK, a0, a1, a2); + tcg_out_insn(s, RRFa, XGRK, a0, a1, a2); } break; =20 --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670552347; cv=none; d=zohomail.com; s=zohoarc; b=lSZLki4D9UH+8stxEkMF7PdTWOBopznqlzoSGmU6Qmln1/ZdMeoGINU6LgDm5VdbOuVbJS0Lwd+hDYWMO5ZU2QdAFVZr/lCHh0q7IjIVbSvbsF3stWNrUWbf3AupE5dGohrr1JoYJ8raK0Ygfvxre71D20v27TIijNWM4kFs5tg= ARC-Message-Signature: i=1; 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([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.05.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:05:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=R/GryLdVxy6DbC9JdLFOg5oT779WNfnXadHx5Ifz/fE=; b=kTutfcM3BgDFkYEZmD2+7gjWxHkwtYVxlflt4Queht7GMlsatiGBo0gsRE988KDt0q 5eQ8QKkvk0HKKVZHQ/smUo1N3zoMkQEDiLPl40x0nh+8WjJUOf+/vylPDPk7Nq46gX+8 0gGSjPkhK1IjJ5rmRty5SDkx2fscWLRmLB4U7IcG+B83vXPzRklIKjD5Cw1d7CjN8M58 vFoUpS/5wOv/XVnVr01cg2uVRWsuo42/ETRf5pstYTIsEytAxaJJY/RclCsjIFhhQJsP vxJpZU7CmFutfHWDqrpnC9lRwDu5CCEceMhjtdyhVwBgNACkqIokCwm/KfcBLJkMmlfr lGuw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=R/GryLdVxy6DbC9JdLFOg5oT779WNfnXadHx5Ifz/fE=; b=VF26l5xJmkLupecYiPALLclzWM6wz1iyQq4thm93PTdCZJFJ26buR/6ZGPjgvRN830 xwUGT/SBul2fXcit50jO1tj5aDG0VScMB34Z0L37HwGO01BpIqbiRW8li9a2BD955HCR tC80vHml6dhiabuAUqSAg7Y/pJZ7Fza9rNIFDI2Kq8R1raJT8ViSAivQFjkWRxRDzy1Z 5JpnVrkOdW5HudTI88r3Id386ltawd8ztfvZ6pyxalba4OzRq38fqoXz0WQ6WRiyfTqv 8tXvIUipYgJXK+aMmcubv9Ra6/WQjbCPu6R1iTOpwBV9x8BU8OHftRBzhQmaWxN6aDZD U1hQ== X-Gm-Message-State: ANoB5pm33TjPDnkTlqAj1k8wQETBDbaIdBqoPsC/uTNmlqY10xwGvtqg NGiyFDpik1C2CtfEqxgoO2tmrJY/iPJ7FOg14s4= X-Google-Smtp-Source: AA0mqf6W387OwLgw0l1yN8YMj7sE9mEFhrGzaa6d/M6S5Oei08zYZ5n4C3pTTUk2BTmJ3KtPPzBwuA== X-Received: by 2002:a05:6808:1b23:b0:355:1de8:cd59 with SMTP id bx35-20020a0568081b2300b003551de8cd59mr2385992oib.23.1670551547942; Thu, 08 Dec 2022 18:05:47 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 13/27] tcg/s390x: Distinguish RIE formats Date: Thu, 8 Dec 2022 20:05:16 -0600 Message-Id: <20221209020530.396391-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::232; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x232.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670552348769100003 Content-Type: text/plain; charset="utf-8" There are multiple variations, with different fields. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.c.inc | 47 +++++++++++++++++++++----------------- 1 file changed, 26 insertions(+), 21 deletions(-) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index d38a602dd9..a81a82c70b 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -128,16 +128,19 @@ typedef enum S390Opcode { RI_OILL =3D 0xa50b, RI_TMLL =3D 0xa701, =20 - RIE_CGIJ =3D 0xec7c, - RIE_CGRJ =3D 0xec64, - RIE_CIJ =3D 0xec7e, - RIE_CLGRJ =3D 0xec65, - RIE_CLIJ =3D 0xec7f, - RIE_CLGIJ =3D 0xec7d, - RIE_CLRJ =3D 0xec77, - RIE_CRJ =3D 0xec76, - RIE_LOCGHI =3D 0xec46, - RIE_RISBG =3D 0xec55, + RIEb_CGRJ =3D 0xec64, + RIEb_CLGRJ =3D 0xec65, + RIEb_CLRJ =3D 0xec77, + RIEb_CRJ =3D 0xec76, + + RIEc_CGIJ =3D 0xec7c, + RIEc_CIJ =3D 0xec7e, + RIEc_CLGIJ =3D 0xec7d, + RIEc_CLIJ =3D 0xec7f, + + RIEf_RISBG =3D 0xec55, + + RIEg_LOCGHI =3D 0xec46, =20 RRE_AGR =3D 0xb908, RRE_ALGR =3D 0xb90a, @@ -556,7 +559,7 @@ static void tcg_out_insn_RI(TCGContext *s, S390Opcode o= p, TCGReg r1, int i2) tcg_out32(s, (op << 16) | (r1 << 20) | (i2 & 0xffff)); } =20 -static void tcg_out_insn_RIE(TCGContext *s, S390Opcode op, TCGReg r1, +static void tcg_out_insn_RIEg(TCGContext *s, S390Opcode op, TCGReg r1, int i2, int m3) { tcg_out16(s, (op & 0xff00) | (r1 << 4) | m3); @@ -985,9 +988,9 @@ static inline void tcg_out_risbg(TCGContext *s, TCGReg = dest, TCGReg src, int msb, int lsb, int ofs, int z) { /* Format RIE-f */ - tcg_out16(s, (RIE_RISBG & 0xff00) | (dest << 4) | src); + tcg_out16(s, (RIEf_RISBG & 0xff00) | (dest << 4) | src); tcg_out16(s, (msb << 8) | (z << 7) | lsb); - tcg_out16(s, (ofs << 8) | (RIE_RISBG & 0xff)); + tcg_out16(s, (ofs << 8) | (RIEf_RISBG & 0xff)); } =20 static void tgen_ext8s(TCGContext *s, TCGType type, TCGReg dest, TCGReg sr= c) @@ -1266,7 +1269,7 @@ static void tgen_setcond(TCGContext *s, TCGType type,= TCGCond cond, /* Emit: d =3D 0, d =3D (cc ? 1 : d). */ cc =3D tgen_cmp(s, type, cond, c1, c2, c2const, false); tcg_out_movi(s, TCG_TYPE_I64, dest, 0); - tcg_out_insn(s, RIE, LOCGHI, dest, 1, cc); + tcg_out_insn(s, RIEg, LOCGHI, dest, 1, cc); return; } =20 @@ -1340,7 +1343,7 @@ static void tgen_movcond(TCGContext *s, TCGType type,= TCGCond c, TCGReg dest, { int cc =3D tgen_cmp(s, type, c, c1, c2, c2const, false); if (v3const) { - tcg_out_insn(s, RIE, LOCGHI, dest, v3, cc); + tcg_out_insn(s, RIEg, LOCGHI, dest, v3, cc); } else { tcg_out_insn(s, RRFc, LOCGR, dest, v3, cc); } @@ -1409,6 +1412,7 @@ static void tgen_compare_branch(TCGContext *s, S390Op= code opc, int cc, TCGReg r1, TCGReg r2, TCGLabel *l) { tcg_out_reloc(s, s->code_ptr + 1, R_390_PC16DBL, l, 2); + /* Format RIE-b */ tcg_out16(s, (opc & 0xff00) | (r1 << 4) | r2); tcg_out16(s, 0); tcg_out16(s, cc << 12 | (opc & 0xff)); @@ -1418,6 +1422,7 @@ static void tgen_compare_imm_branch(TCGContext *s, S3= 90Opcode opc, int cc, TCGReg r1, int i2, TCGLabel *l) { tcg_out_reloc(s, s->code_ptr + 1, R_390_PC16DBL, l, 2); + /* Format RIE-c */ tcg_out16(s, (opc & 0xff00) | (r1 << 4) | cc); tcg_out16(s, 0); tcg_out16(s, (i2 << 8) | (opc & 0xff)); @@ -1435,8 +1440,8 @@ static void tgen_brcond(TCGContext *s, TCGType type, = TCGCond c, =20 if (!c2const) { opc =3D (type =3D=3D TCG_TYPE_I32 - ? (is_unsigned ? RIE_CLRJ : RIE_CRJ) - : (is_unsigned ? RIE_CLGRJ : RIE_CGRJ)); + ? (is_unsigned ? RIEb_CLRJ : RIEb_CRJ) + : (is_unsigned ? RIEb_CLGRJ : RIEb_CGRJ)); tgen_compare_branch(s, opc, cc, r1, c2, l); return; } @@ -1449,18 +1454,18 @@ static void tgen_brcond(TCGContext *s, TCGType type= , TCGCond c, */ if (type =3D=3D TCG_TYPE_I32) { if (is_unsigned) { - opc =3D RIE_CLIJ; + opc =3D RIEc_CLIJ; in_range =3D (uint32_t)c2 =3D=3D (uint8_t)c2; } else { - opc =3D RIE_CIJ; + opc =3D RIEc_CIJ; in_range =3D (int32_t)c2 =3D=3D (int8_t)c2; } } else { if (is_unsigned) { - opc =3D RIE_CLGIJ; + opc =3D RIEc_CLGIJ; in_range =3D (uint64_t)c2 =3D=3D (uint8_t)c2; } else { - opc =3D RIE_CGIJ; + opc =3D RIEc_CGIJ; in_range =3D (int64_t)c2 =3D=3D (int8_t)c2; } } --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670552269; cv=none; d=zohomail.com; s=zohoarc; b=c0RbDrEpDINCFiaHnjebTOSIvqdI9YII7KLJehf4ladtXYxbeyuybpq813fFsev++LQESRvVWMOBf9uYrm4B3UfaP9GGf+GTpDbQgfDTImk5KuZLighFg0NpoXOuhGNCXAo2wHgKUzwneV9/5zxC6f7VykHywAHPO3PO6WZRi5o= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670552269; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=hELIWO/9s4dMzjgjNIgr7btQwZnxqh26ctXstkwJ0Bg=; b=f1l3b5WORnmn+g9Um/F/TlbACf08D3hTGmOfrKONnorwzjoDdp8/UD4B3d75ZlfnMA+DtEhSqgqZA4Z5plNRfAD4nYyT+jvrD7PYAFOIdInsFB/pvH4Z5cqo5zUuUu3Li1G6UpiwYbDePrwNqkEnM0lpoAcj1l9ARiTWfNgyOPA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1670552269112542.6349077665192; Thu, 8 Dec 2022 18:17:49 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3Slz-00060s-7F; Thu, 08 Dec 2022 21:05:59 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3Slv-0005yX-5N for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:55 -0500 Received: from mail-oi1-x22e.google.com ([2607:f8b0:4864:20::22e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Slr-0001ww-Pr for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:54 -0500 Received: by mail-oi1-x22e.google.com with SMTP id m204so3275077oib.6 for ; Thu, 08 Dec 2022 18:05:49 -0800 (PST) Received: from stoup.. ([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.05.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:05:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hELIWO/9s4dMzjgjNIgr7btQwZnxqh26ctXstkwJ0Bg=; b=PmY/0yi7E0sBRGTMdrrpC8g9cpCcEMyasYw4e3mMWSl27uV7F02lHdB+FqrbYm1OST IhSLMk7Ai9SQTw7xQJk96OzX0FqB3wgkE0iHRslHkm267Gd1GjPU1xCzsqUbRopOzh51 B6itTn9SVO+LWOkKd2z4Xzm7phy3JuomkC9XkjlZrki5sRE/Fj0HTBSYovK9vmS2AnRt U/4yaE1EW2jF76qJXOKM+bH1vTXjj0Cv+JrBLwowHJoy4aX0oE3R/iXfapsrK5kJIRG8 iHGiyFoykWanvq5zLmTclAQsWic1xNM8FdoMdQSEuSC/LmUb6/2UQxW8QmE+CJpflw+t SkSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hELIWO/9s4dMzjgjNIgr7btQwZnxqh26ctXstkwJ0Bg=; b=8Kt6MJr9KuhzCSfkjBqSvcq8TRzo56oFSyj8QmbgbHRo/GXGWfR+1jxR4sYfP+ETkt r2aiNlYk721mqiHITkCr5h5vlJEnT6DiWWQClASBBIIjdh/H6fYmJo59GNvfWTu1CDc7 Vlfvyw6BGKblpZdDze4DBqh5HK+N1HU0KlcN6WkQkuzJif7TUaoNZM9npHwm0KzAU2GH 5hHNNnyOMRsRKHsXQs+ewOye3SNvXLDcTOuyPxfGPNR0xku9HbYkWxlq0/bn1CoNxkVB 3AAnUmxl2a1auW+nLjGTLMQ+V/uiJ+rxJzwo10YuU2Tp6paTTZyZnG+HjR+I8AQLbBnd 8wwA== X-Gm-Message-State: ANoB5pnXKLfddMyjuLnZsk39Qb1JpHmjelnD85m8BI1jb3HcmhL+VLXd IIe/su+oc9ja31lcWHDW39sYU3O0OePfs7sDm4o= X-Google-Smtp-Source: AA0mqf7l8THxSolhEsU3A4SctEVHm+3v7RQDOtSeVpypz3IOvG2H5agKeHUwvmxMlTf0QMzhHrxANw== X-Received: by 2002:a05:6808:218a:b0:35e:214f:11c0 with SMTP id be10-20020a056808218a00b0035e214f11c0mr2755255oib.22.1670551549028; Thu, 08 Dec 2022 18:05:49 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 14/27] tcg/s390x: Support MIE2 multiply single instructions Date: Thu, 8 Dec 2022 20:05:17 -0600 Message-Id: <20221209020530.396391-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::22e; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x22e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670552270277100001 Content-Type: text/plain; charset="utf-8" The MIE2 facility adds 3-operand versions of multiply. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target-con-set.h | 1 + tcg/s390x/tcg-target.h | 1 + tcg/s390x/tcg-target.c.inc | 34 ++++++++++++++++++++++++---------- 3 files changed, 26 insertions(+), 10 deletions(-) diff --git a/tcg/s390x/tcg-target-con-set.h b/tcg/s390x/tcg-target-con-set.h index 00ba727b70..33a82e3286 100644 --- a/tcg/s390x/tcg-target-con-set.h +++ b/tcg/s390x/tcg-target-con-set.h @@ -23,6 +23,7 @@ C_O1_I2(r, 0, ri) C_O1_I2(r, 0, rI) C_O1_I2(r, 0, rJ) C_O1_I2(r, r, ri) +C_O1_I2(r, r, rJ) C_O1_I2(r, rZ, r) C_O1_I2(v, v, r) C_O1_I2(v, v, v) diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h index db10a39381..1fb7b8fb1d 100644 --- a/tcg/s390x/tcg-target.h +++ b/tcg/s390x/tcg-target.h @@ -63,6 +63,7 @@ typedef enum TCGReg { /* Facilities that are checked at runtime. */ =20 #define FACILITY_LOAD_ON_COND2 53 +#define FACILITY_MISC_INSN_EXT2 58 #define FACILITY_VECTOR 129 #define FACILITY_VECTOR_ENH1 135 =20 diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index a81a82c70b..9634126ed1 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -175,6 +175,8 @@ typedef enum S390Opcode { RRE_SLBGR =3D 0xb989, RRE_XGR =3D 0xb982, =20 + RRFa_MSRKC =3D 0xb9fd, + RRFa_MSGRKC =3D 0xb9ed, RRFa_NRK =3D 0xb9f4, RRFa_NGRK =3D 0xb9e4, RRFa_ORK =3D 0xb9f6, @@ -2015,14 +2017,18 @@ static inline void tcg_out_op(TCGContext *s, TCGOpc= ode opc, break; =20 case INDEX_op_mul_i32: + a0 =3D args[0], a1 =3D args[1], a2 =3D (int32_t)args[2]; if (const_args[2]) { - if ((int32_t)args[2] =3D=3D (int16_t)args[2]) { - tcg_out_insn(s, RI, MHI, args[0], args[2]); + tcg_out_mov(s, TCG_TYPE_I32, a0, a1); + if (a2 =3D=3D (int16_t)a2) { + tcg_out_insn(s, RI, MHI, a0, a2); } else { - tcg_out_insn(s, RIL, MSFI, args[0], args[2]); + tcg_out_insn(s, RIL, MSFI, a0, a2); } + } else if (a0 =3D=3D a1) { + tcg_out_insn(s, RRE, MSR, a0, a2); } else { - tcg_out_insn(s, RRE, MSR, args[0], args[2]); + tcg_out_insn(s, RRFa, MSRKC, a0, a1, a2); } break; =20 @@ -2272,14 +2278,18 @@ static inline void tcg_out_op(TCGContext *s, TCGOpc= ode opc, break; =20 case INDEX_op_mul_i64: + a0 =3D args[0], a1 =3D args[1], a2 =3D args[2]; if (const_args[2]) { - if (args[2] =3D=3D (int16_t)args[2]) { - tcg_out_insn(s, RI, MGHI, args[0], args[2]); + tcg_out_mov(s, TCG_TYPE_I64, a0, a1); + if (a2 =3D=3D (int16_t)a2) { + tcg_out_insn(s, RI, MGHI, a0, a2); } else { - tcg_out_insn(s, RIL, MSGFI, args[0], args[2]); + tcg_out_insn(s, RIL, MSGFI, a0, a2); } + } else if (a0 =3D=3D a1) { + tcg_out_insn(s, RRE, MSGR, a0, a2); } else { - tcg_out_insn(s, RRE, MSGR, args[0], args[2]); + tcg_out_insn(s, RRFa, MSGRKC, a0, a1, a2); } break; =20 @@ -2934,9 +2944,13 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOp= code op) return C_O1_I2(r, r, ri); =20 case INDEX_op_mul_i32: - return C_O1_I2(r, 0, ri); + return (HAVE_FACILITY(MISC_INSN_EXT2) + ? C_O1_I2(r, r, ri) + : C_O1_I2(r, 0, ri)); case INDEX_op_mul_i64: - return C_O1_I2(r, 0, rJ); + return (HAVE_FACILITY(MISC_INSN_EXT2) + ? C_O1_I2(r, r, rJ) + : C_O1_I2(r, 0, rJ)); =20 case INDEX_op_shl_i32: case INDEX_op_shr_i32: --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670551801; cv=none; d=zohomail.com; s=zohoarc; b=F2E4nJDelSOG5p80kGaiYe+d5KYkaoHrvKceOiVm8+eZ9+8ZuOKoGS8ZtA0SEFfcfyMHT4ZFExC3guGYK6Ff2AKgghLl3+Jb761ulWM+lbr8ZfQNsn9cvB84aeyhZxA+u/jN5zJlmGTlQVHoBW1WfR6J0Egv20QC4G2YZIq9B4g= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670551801; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=NaBpyNP86SB9+qMhyajHTpSzcVMfDZDqPcSFABJu3pg=; b=DoEeQLm5ilkUcKuwyPUmbCV4ul+snCH53KxDCFxfQoHoE3GZS/W97DwCI9a/+Y7ZKDHXMsgRqQmVRna7R88AtL0PFfikrNhXAQoKPPJU+9P1QfexqK1KVggx4XIu2FewFqMc4Uwk39QK1byGnGy2W7k056VoYVHo1oESf1soC9E= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1670551801004234.9689675876939; Thu, 8 Dec 2022 18:10:01 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3Slw-0005zI-B3; Thu, 08 Dec 2022 21:05:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3Slu-0005yR-W0 for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:55 -0500 Received: from mail-ot1-x32d.google.com ([2607:f8b0:4864:20::32d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Slr-0001uu-Pl for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:54 -0500 Received: by mail-ot1-x32d.google.com with SMTP id p10-20020a9d76ca000000b0066d6c6bce58so1981748otl.7 for ; Thu, 08 Dec 2022 18:05:50 -0800 (PST) Received: from stoup.. ([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.05.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:05:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NaBpyNP86SB9+qMhyajHTpSzcVMfDZDqPcSFABJu3pg=; b=iSb+oWAm6ZpVGdkxuo575hxDyvaEngcAasqkI9TFLnygAP7S2xCHTR4lhtCQrDN1sS nNVzlBL9uMne0kDQqyBmyLkPT0QfbzqVWCVSXMuPCkJ5h/uA/3wrYjVryudJUZJkl8MM 7ds4bDNCMlOZn+AhIZ67q7lmivGI7eiJJtRCngAQ1hjH9qGQuzllW0NS8s8DZoboLccV SeUfvcB6ZwC4muAgXQTJ2lAw2mwp6H28GA7tx1PEIA7XH31X7NQX+NzcA4blG8Mc7iVK bmm2RW88J1vwdkmwivgPKBF9GheLFEckojxYfvt5S+zPjpCu2dx1fojKGI1zh2+7lPjy KrEA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NaBpyNP86SB9+qMhyajHTpSzcVMfDZDqPcSFABJu3pg=; b=vVUHV+VZYMqzMGriMyQ8iruRPU0boxLFn712PlGIgGp1QmLh+GzOyaNLhsY6vUVdc0 So+qN/InAXUATNay1IQsnoE/HiKreCWPDli9dbNgLDS7pOg7awkqAIsql/4T/4TQ6h1s eH9qr6bmiYIFq7rZPt1G/Ike5fYLMGYhzLHhSXIspBQ8kxm1LfdaTwqW7IrHMB+/dHsM L985egTDxRRPEyWsvpFsEdHk3xwqHOg/Jfwoor13P7kIA62pCZvPnlVpm7SNtnlCv88Q OJ6rxXUseHZeAqWcGrYipmGQfHGyiPZb63V9DeVqogTijoRYVVCI0B7E2Gcr10ePLf/E rt6Q== X-Gm-Message-State: ANoB5pkKyQdnxMiCLvo+a8Bij4Pm7BMFDhIHMtncIGvOf63bFeZ4Lcc2 CXH73H1aXCBCGG5PmjGTTPF2zEBO9xva4fMKQng= X-Google-Smtp-Source: AA0mqf5PLj9v1KPFbXeGYY1tnOiUp7Wo3pLUEHwyiBvNMBWovtswYOSjeBscYf3Ckv9fsdwwD0LzoA== X-Received: by 2002:a9d:5d18:0:b0:66d:a2:d0e with SMTP id b24-20020a9d5d18000000b0066d00a20d0emr1830979oti.15.1670551550190; Thu, 08 Dec 2022 18:05:50 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 15/27] tcg/s390x: Support MIE2 MGRK instruction Date: Thu, 8 Dec 2022 20:05:18 -0600 Message-Id: <20221209020530.396391-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32d; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670551801986100001 Content-Type: text/plain; charset="utf-8" The MIE2 facility adds a 3-operand signed 64x64->128 multiply. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target-con-set.h | 1 + tcg/s390x/tcg-target.h | 2 +- tcg/s390x/tcg-target.c.inc | 8 ++++++++ 3 files changed, 10 insertions(+), 1 deletion(-) diff --git a/tcg/s390x/tcg-target-con-set.h b/tcg/s390x/tcg-target-con-set.h index 33a82e3286..b1a89a88ba 100644 --- a/tcg/s390x/tcg-target-con-set.h +++ b/tcg/s390x/tcg-target-con-set.h @@ -31,6 +31,7 @@ C_O1_I3(v, v, v, v) C_O1_I4(r, r, ri, r, 0) C_O1_I4(r, r, ri, rI, 0) C_O2_I2(o, m, 0, r) +C_O2_I2(o, m, r, r) C_O2_I3(o, m, 0, 1, r) C_O2_I4(r, r, 0, 1, rA, r) C_O2_I4(r, r, 0, 1, ri, r) diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h index 1fb7b8fb1d..03ce11a34a 100644 --- a/tcg/s390x/tcg-target.h +++ b/tcg/s390x/tcg-target.h @@ -136,7 +136,7 @@ extern uint64_t s390_facilities[3]; #define TCG_TARGET_HAS_add2_i64 1 #define TCG_TARGET_HAS_sub2_i64 1 #define TCG_TARGET_HAS_mulu2_i64 1 -#define TCG_TARGET_HAS_muls2_i64 0 +#define TCG_TARGET_HAS_muls2_i64 HAVE_FACILITY(MISC_INSN_EXT2) #define TCG_TARGET_HAS_muluh_i64 0 #define TCG_TARGET_HAS_mulsh_i64 0 =20 diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index 9634126ed1..871fcb7683 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -175,6 +175,7 @@ typedef enum S390Opcode { RRE_SLBGR =3D 0xb989, RRE_XGR =3D 0xb982, =20 + RRFa_MGRK =3D 0xb9ec, RRFa_MSRKC =3D 0xb9fd, RRFa_MSGRKC =3D 0xb9ed, RRFa_NRK =3D 0xb9f4, @@ -2319,6 +2320,11 @@ static inline void tcg_out_op(TCGContext *s, TCGOpco= de opc, tcg_debug_assert(args[0] =3D=3D args[1] + 1); tcg_out_insn(s, RRE, MLGR, args[1], args[3]); break; + case INDEX_op_muls2_i64: + tcg_debug_assert((args[1] & 1) =3D=3D 0); + tcg_debug_assert(args[0] =3D=3D args[1] + 1); + tcg_out_insn(s, RRFa, MGRK, args[1], args[2], args[3]); + break; =20 case INDEX_op_shl_i64: op =3D RSY_SLLG; @@ -3009,6 +3015,8 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpc= ode op) =20 case INDEX_op_mulu2_i64: return C_O2_I2(o, m, 0, r); + case INDEX_op_muls2_i64: + return C_O2_I2(o, m, r, r); =20 case INDEX_op_add2_i32: case INDEX_op_sub2_i32: --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670552099; cv=none; d=zohomail.com; s=zohoarc; b=oEWsFDuP1ob4FXBO6Sp0vcNQ//ZUYcrTqSRwf/dEAnmjVpVhfujbFDYHW/JUfu8EFVbD/+u3XOj3eSlC7KSXetSmqBqgGrlnj9NIHzbyn8yt+XQnrRpwCt0kBQCTMndAwr4MyaK4NqCHWDIHuvzekcUxGHXFlasRr3kZCvNhWc4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670552099; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=6OEoXXqHMNZJwrhmfB7qxU47ScigEd04r0yEUlWf38k=; b=BW4fLTqN3xuB5J1WBAwDHPqMVoD15wAMA4x0jFLnWlR9LHJtDyKygGEgPQ5VmysoHLRIgxTCb/rF6o9sXQGLM7smZSaJ8IHEQo/Z/OqwcFKhEVqMdDp+ppEfSqAb1lPSh68euYQD3VLCBk+fKAocFuDe2qqx3GNRhFLs9yi/Rss= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1670552099953635.63139207134; Thu, 8 Dec 2022 18:14:59 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3Slv-0005z8-RI; Thu, 08 Dec 2022 21:05:55 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3Slu-0005yQ-VP for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:55 -0500 Received: from mail-ot1-x333.google.com ([2607:f8b0:4864:20::333]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Sls-0001x7-E9 for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:54 -0500 Received: by mail-ot1-x333.google.com with SMTP id m7-20020a9d6447000000b0066da0504b5eso1970371otl.13 for ; Thu, 08 Dec 2022 18:05:52 -0800 (PST) Received: from stoup.. ([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.05.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:05:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6OEoXXqHMNZJwrhmfB7qxU47ScigEd04r0yEUlWf38k=; b=yCYWPUOJ+s+a0Rb21laCjCP8vqGLlGtP6c7Zb6EyeB/CQ/3pOC8g1oGBFvjolTqjVG dQFhNkRgIbeLBnrCytlSkoWVqR8yIUV8Vphiqad6xx/It70f2AXfj6VNJn7YyOslhd/9 ZyVI8GQLg6Yd34kZlPLO0RvuGqUfu2a/sTwc1vQrt6lKH5s+zhlSD2AlaT14eZJ7tfdI CukVNcxJiRtL71+1OWqSeEMRP3enmd0yAKI56k8mmKgYEp3agX2EZJBlKlNnja5oa86R EO7RqODXej00Xm9KNY9IWGlf51xCk3LQdb39uxe9VZtTfF84LEMyTtly0VhI+t3w3F8v MYPA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6OEoXXqHMNZJwrhmfB7qxU47ScigEd04r0yEUlWf38k=; b=UKLrq5nGT0lPL4JpvTQVv/k5s3kCGAn8OGRTCZj0Itl887juFKdxiw4az9bDAZPlf9 Vk2ZDrku5lxDG0K0600rGHFk9/zfWZLn2+MRUNK75ACSvQ3tIi54jgVbAvCH7f22EguZ i+E+Dy8oOin7A+UVVppcs3luPcqdOK/YnHjs2N3TqQX9hEB7LmUWqiV5p/P+6AlSZrXU 9mmmrf+HDC40hAolmDUrf38W7wWM7QuCnNrQTLXDTvsfnbk+GQWc1mCC9jcn0VoQ38ws U82cOifev0hGdFeBBxM5Hrh14h9mFTIPoVvV4Q0nOU6mIrAYAR9UV6+SKRZobVJrUgFU UuDQ== X-Gm-Message-State: ANoB5pnQqWCMl84PaDMx2Owyb2wrblzJ/eUXA2dKZaXxht2lMdPKgIkE WlI65YtWxH2MQO1oeVRPtcoLKrW3VEG2tRNsfVQ= X-Google-Smtp-Source: AA0mqf4++8ea/fvlGjYFYU6Z3J//djA1zJ88MbkHDyzjQIWjIaAMl46zBIILIzPhBVpopQ0cjvwvCA== X-Received: by 2002:a05:6830:6482:b0:661:dfeb:ea4b with SMTP id ck2-20020a056830648200b00661dfebea4bmr2069078otb.10.1670551551359; Thu, 08 Dec 2022 18:05:51 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 16/27] tcg/s390x: Issue XILF directly for xor_i32 Date: Thu, 8 Dec 2022 20:05:19 -0600 Message-Id: <20221209020530.396391-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::333; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670552101620100005 Content-Type: text/plain; charset="utf-8" There is only one instruction that is applicable to a 32-bit immediate xor. Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich --- tcg/s390x/tcg-target.c.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index 871fcb7683..fc304327fc 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -2005,7 +2005,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcod= e opc, a0 =3D args[0], a1 =3D args[1], a2 =3D (uint32_t)args[2]; if (const_args[2]) { tcg_out_mov(s, TCG_TYPE_I32, a0, a1); - tgen_xori(s, TCG_TYPE_I32, a0, a2); + tcg_out_insn(s, RIL, XILF, a0, a2); } else if (a0 =3D=3D a1) { tcg_out_insn(s, RR, XR, args[0], args[2]); } else { --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670551918; cv=none; d=zohomail.com; s=zohoarc; b=MLirXvs2aLLjWRmZ6QP+73g0xOxLABlscWWnNbwVx8T3/25ap45s0AruXb6UnNyY92jBjZrwEw08djE82hDb2iveaMaVkuUN+LC7tel3Gi4fOMHDhCGVQtDoOigMD+ruKW4OfA1/Dc5EefYYqo3qr7xeCLC5A2EFcVOJOWWxtd8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670551918; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=ZZ4VRWcd/3v2ZpQqxpOvmExXeCfgt0ZAkQUAPsPFAv4=; b=DXMXIhGFl/SNiboTMjf3NaZzdZitZzbfQ9k2kbhLJWPa8YCv/gm1DYxzjw4GLi5ei4YPjgSqrAgJwghaiGIvxmXQDGlZ3wC14P+ukajq+lb62kAnw1AFJzywf7q5+0lZdAAJ0fJ1bykFvs1gR4wY7d8viucNvM+m2msgqTugq6U= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1670551918177837.9912541223822; Thu, 8 Dec 2022 18:11:58 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3Slw-0005zP-K8; Thu, 08 Dec 2022 21:05:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3Slv-0005z9-SF for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:55 -0500 Received: from mail-ot1-x32c.google.com ([2607:f8b0:4864:20::32c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Slt-0001xU-Ui for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:55 -0500 Received: by mail-ot1-x32c.google.com with SMTP id p24-20020a0568301d5800b0066e6dc09be5so1982002oth.8 for ; Thu, 08 Dec 2022 18:05:53 -0800 (PST) Received: from stoup.. ([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.05.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:05:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZZ4VRWcd/3v2ZpQqxpOvmExXeCfgt0ZAkQUAPsPFAv4=; b=XStexhSVBCjyCq9pMVOOtsEmM3gtG5ouAjxjxKEDK4f4IT3/b+X1akvSh5Jnjc+Bkk 7oT/A6RBtPm+mCtI767LBOH54HYZp/7DEq9iQsyUcJRkDdPQ7CjAAorvTgqJKzO6t1ni v1RTpD5Y1l57Yz1q2ug6A17y4uBuhUrMuuHh18ze8UVxAUPyVUATT2vxoTqhOoiM+9qI hgtFIQhniKB6RclNGB9y5z2GAwdXu/HtR2kmeGjQwPxaRSSK6ZgiQ0He6Rz/r+P4W08P oOSHMCfe0ggDHqm9FJdg1mYY7D20X83GS/ThgfUHSyS+jSD4WJo1ttJnWNkTzPiZmdWa IsMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZZ4VRWcd/3v2ZpQqxpOvmExXeCfgt0ZAkQUAPsPFAv4=; b=6YdieSRd5hm3/Y1kb5/L6d5FFoz3PLH9iuuwvhrUkW7jIsiagp+BFFEq1s62zlz9mH rTa90Xm4+Nl5V1R775HBR3ByKuTF6Rc61rTH7Bj++ifnpApcHZ/qc3G0YbRjYgMVj4EN jOdHHvoVz1dVBk0dgAI1xYnI+aulw35tZwufU0XpehZwAme3misIck9/Z8E/swakvUJt Mc7lVBvTX3IxMFeeb7tvmy1G7yQv2Al9aGZfn/hsEP0CyVzvS9d1uo+WRjpSwvi79ZLh fzoDV5anUUTloDlu+qCuRzFE7YAJS25dId+q+Rc6jM3uFIyBe6Pp29SRAi9R/ls8rFMU 19Kw== X-Gm-Message-State: ANoB5pmaENyTyBbQOh+2/F+UODqCNt0hJRuIB7c3bclJduFiYw7ydY+a RzM+fgOlRsa6RARPI0WCUUzOt3xCPFV+V4Lxdx8= X-Google-Smtp-Source: AA0mqf4FPeMl5TTfWjNt0SOyTHIAexovWpGuERpD0rPpfyhqBf2rUQNntu9JK4QSc0IarbjcPJmLcg== X-Received: by 2002:a9d:6511:0:b0:661:dfeb:ea2a with SMTP id i17-20020a9d6511000000b00661dfebea2amr1661759otl.15.1670551552666; Thu, 08 Dec 2022 18:05:52 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 17/27] tcg/s390x: Tighten constraints for or_i64 and xor_i64 Date: Thu, 8 Dec 2022 20:05:20 -0600 Message-Id: <20221209020530.396391-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32c; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670551918758100001 Content-Type: text/plain; charset="utf-8" Drop support for sequential OR and XOR, as the serial dependency is slower than loading the constant first. Let the register allocator handle such immediates by matching only what one insn can achieve. Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich --- tcg/s390x/tcg-target-con-set.h | 1 + tcg/s390x/tcg-target-con-str.h | 1 + tcg/s390x/tcg-target.c.inc | 114 ++++++++++++++++----------------- 3 files changed, 56 insertions(+), 60 deletions(-) diff --git a/tcg/s390x/tcg-target-con-set.h b/tcg/s390x/tcg-target-con-set.h index b1a89a88ba..34ae4c7743 100644 --- a/tcg/s390x/tcg-target-con-set.h +++ b/tcg/s390x/tcg-target-con-set.h @@ -24,6 +24,7 @@ C_O1_I2(r, 0, rI) C_O1_I2(r, 0, rJ) C_O1_I2(r, r, ri) C_O1_I2(r, r, rJ) +C_O1_I2(r, r, rK) C_O1_I2(r, rZ, r) C_O1_I2(v, v, r) C_O1_I2(v, v, v) diff --git a/tcg/s390x/tcg-target-con-str.h b/tcg/s390x/tcg-target-con-str.h index 76446aecae..7b910d6d11 100644 --- a/tcg/s390x/tcg-target-con-str.h +++ b/tcg/s390x/tcg-target-con-str.h @@ -20,4 +20,5 @@ REGS('o', 0xaaaa) /* odd numbered general regs */ CONST('A', TCG_CT_CONST_S33) CONST('I', TCG_CT_CONST_S16) CONST('J', TCG_CT_CONST_S32) +CONST('K', TCG_CT_CONST_P32) CONST('Z', TCG_CT_CONST_ZERO) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index fc304327fc..2a7410ba58 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -37,6 +37,7 @@ #define TCG_CT_CONST_S32 0x200 #define TCG_CT_CONST_S33 0x400 #define TCG_CT_CONST_ZERO 0x800 +#define TCG_CT_CONST_P32 0x1000 =20 #define ALL_GENERAL_REGS MAKE_64BIT_MASK(0, 16) #define ALL_VECTOR_REGS MAKE_64BIT_MASK(32, 32) @@ -507,6 +508,28 @@ static bool patch_reloc(tcg_insn_unit *src_rw, int typ= e, return false; } =20 +static int is_const_p16(uint64_t val) +{ + for (int i =3D 0; i < 4; ++i) { + uint64_t mask =3D 0xffffull << (i * 16); + if ((val & ~mask) =3D=3D 0) { + return i; + } + } + return -1; +} + +static int is_const_p32(uint64_t val) +{ + if ((val & 0xffffffff00000000ull) =3D=3D 0) { + return 0; + } + if ((val & 0x00000000ffffffffull) =3D=3D 0) { + return 1; + } + return -1; +} + /* Test if a constant matches the constraint. */ static bool tcg_target_const_match(int64_t val, TCGType type, int ct) { @@ -529,6 +552,14 @@ static bool tcg_target_const_match(int64_t val, TCGTyp= e type, int ct) return val =3D=3D 0; } =20 + /* + * Note that is_const_p16 is a subset of is_const_p32, + * so we don't need both constraints. + */ + if ((ct & TCG_CT_CONST_P32) && is_const_p32(val) >=3D 0) { + return true; + } + return 0; } =20 @@ -1125,7 +1156,7 @@ static void tgen_andi(TCGContext *s, TCGType type, TC= GReg dest, uint64_t val) } } =20 -static void tgen_ori(TCGContext *s, TCGType type, TCGReg dest, uint64_t va= l) +static void tgen_ori(TCGContext *s, TCGReg dest, uint64_t val) { static const S390Opcode oi_insns[4] =3D { RI_OILL, RI_OILH, RI_OIHL, RI_OIHH @@ -1136,70 +1167,32 @@ static void tgen_ori(TCGContext *s, TCGType type, T= CGReg dest, uint64_t val) =20 int i; =20 - /* Look for no-op. */ - if (unlikely(val =3D=3D 0)) { + i =3D is_const_p16(val); + if (i >=3D 0) { + tcg_out_insn_RI(s, oi_insns[i], dest, val >> (i * 16)); return; } =20 - /* Try all 32-bit insns that can perform it in one go. */ - for (i =3D 0; i < 4; i++) { - tcg_target_ulong mask =3D (0xffffull << i * 16); - if ((val & mask) !=3D 0 && (val & ~mask) =3D=3D 0) { - tcg_out_insn_RI(s, oi_insns[i], dest, val >> i * 16); - return; - } + i =3D is_const_p32(val); + if (i >=3D 0) { + tcg_out_insn_RIL(s, oif_insns[i], dest, val >> (i * 32)); + return; } =20 - /* Try all 48-bit insns that can perform it in one go. */ - for (i =3D 0; i < 2; i++) { - tcg_target_ulong mask =3D (0xffffffffull << i * 32); - if ((val & mask) !=3D 0 && (val & ~mask) =3D=3D 0) { - tcg_out_insn_RIL(s, oif_insns[i], dest, val >> i * 32); - return; - } - } - - if (maybe_out_small_movi(s, type, TCG_TMP0, val)) { - if (type =3D=3D TCG_TYPE_I32) { - tcg_out_insn(s, RR, OR, dest, TCG_TMP0); - } else { - tcg_out_insn(s, RRE, OGR, dest, TCG_TMP0); - } - } else { - /* Perform the OR via sequential modifications to the high and - low parts. Do this via recursion to handle 16-bit vs 32-bit - masks in each half. */ - tgen_ori(s, type, dest, val & 0x00000000ffffffffull); - tgen_ori(s, type, dest, val & 0xffffffff00000000ull); - } + g_assert_not_reached(); } =20 -static void tgen_xori(TCGContext *s, TCGType type, TCGReg dest, uint64_t v= al) +static void tgen_xori(TCGContext *s, TCGReg dest, uint64_t val) { - /* Try all 48-bit insns that can perform it in one go. */ - if ((val & 0xffffffff00000000ull) =3D=3D 0) { + switch (is_const_p32(val)) { + case 0: tcg_out_insn(s, RIL, XILF, dest, val); - return; - } - if ((val & 0x00000000ffffffffull) =3D=3D 0) { + break; + case 1: tcg_out_insn(s, RIL, XIHF, dest, val >> 32); - return; - } - - if (maybe_out_small_movi(s, type, TCG_TMP0, val)) { - if (type =3D=3D TCG_TYPE_I32) { - tcg_out_insn(s, RR, XR, dest, TCG_TMP0); - } else { - tcg_out_insn(s, RRE, XGR, dest, TCG_TMP0); - } - } else { - /* Perform the xor by parts. */ - if (val & 0xffffffff) { - tcg_out_insn(s, RIL, XILF, dest, val); - } - if (val > 0xffffffff) { - tcg_out_insn(s, RIL, XIHF, dest, val >> 32); - } + break; + default: + g_assert_not_reached(); } } =20 @@ -1994,7 +1987,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcod= e opc, a0 =3D args[0], a1 =3D args[1], a2 =3D (uint32_t)args[2]; if (const_args[2]) { tcg_out_mov(s, TCG_TYPE_I32, a0, a1); - tgen_ori(s, TCG_TYPE_I32, a0, a2); + tgen_ori(s, a0, a2); } else if (a0 =3D=3D a1) { tcg_out_insn(s, RR, OR, a0, a2); } else { @@ -2256,7 +2249,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcod= e opc, a0 =3D args[0], a1 =3D args[1], a2 =3D args[2]; if (const_args[2]) { tcg_out_mov(s, TCG_TYPE_I64, a0, a1); - tgen_ori(s, TCG_TYPE_I64, a0, a2); + tgen_ori(s, a0, a2); } else { tcg_out_insn(s, RRFa, OGRK, a0, a1, a2); } @@ -2265,7 +2258,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcod= e opc, a0 =3D args[0], a1 =3D args[1], a2 =3D args[2]; if (const_args[2]) { tcg_out_mov(s, TCG_TYPE_I64, a0, a1); - tgen_xori(s, TCG_TYPE_I64, a0, a2); + tgen_xori(s, a0, a2); } else { tcg_out_insn(s, RRFa, XGRK, a0, a1, a2); } @@ -2944,10 +2937,11 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGO= pcode op) case INDEX_op_and_i32: case INDEX_op_and_i64: case INDEX_op_or_i32: - case INDEX_op_or_i64: case INDEX_op_xor_i32: - case INDEX_op_xor_i64: return C_O1_I2(r, r, ri); + case INDEX_op_or_i64: + case INDEX_op_xor_i64: + return C_O1_I2(r, r, rK); =20 case INDEX_op_mul_i32: return (HAVE_FACILITY(MISC_INSN_EXT2) --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670552337; cv=none; d=zohomail.com; s=zohoarc; b=ipZUbZ1+AauOUAKBqVrpq32AcKmYyrzCCz6v1PJ92E+JLP9zfrz/cwNr3J7OsxCF7HDeSlOheBLmvB1U44nU4/BCHkwx2F/e1VSJ3dHIVYximxXF5+JcED9KOKAXE+H/nU3Bezmf6ipfDqedLT9g7D4yupacz4LNOIwRk3CfVjc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670552337; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=5faDdiSfEvPiidYdsg69vohbWPfRuJFVIG4ImR/in7c=; b=nnKpLQzHGD1xD07nmH3Lrz3Epr7XMtxPDHes/H56J5akq/Ckj6dr9XXnEyUR35iWC6cHmGppzsvadoQrkidOWR/QrdetOuQprjEUjSlYOmKjOLqnSSajuGFsE3pXrxJ1HeSXudekC+SeNOjKOc87EW8tmFZ71LxZS9Gckr8FN7g= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1670552336924324.4995373802028; Thu, 8 Dec 2022 18:18:56 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3Slz-00061f-TB; Thu, 08 Dec 2022 21:05:59 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3Slw-0005ze-SQ for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:56 -0500 Received: from mail-oi1-x229.google.com ([2607:f8b0:4864:20::229]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Slu-0001xp-VK for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:56 -0500 Received: by mail-oi1-x229.google.com with SMTP id v82so3271153oib.4 for ; Thu, 08 Dec 2022 18:05:54 -0800 (PST) Received: from stoup.. ([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.05.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:05:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5faDdiSfEvPiidYdsg69vohbWPfRuJFVIG4ImR/in7c=; b=bcKjlLcQA/Pmc+NyIQw+EXaFCTxVmn+36mw8mY3KklUehYSPwMsS1Izw0P2HPJcSKF +eJoSEFdXIMm+zAROWlnjShpO/eDMFaYZh1Mo9Px198nKqi5uDS4PEPIAEHk2UYNrOyz e0aRudmUE+TC42pw00Mho8YPb62hD9fq/BflM/RChUYRbDHYbHKdmOChCcYTj9WoLlMH e5AYH5EVCOUBz3zSEr6vZjc9M9biWiZTOMpOLefS1JUzj1fKGa8w0YjPsFzZJmk2iKTO hin7Js3ga31OajkKoSrNh9+cdIsLkFASdP/gOtwSiaTj2RxtmtVjK7qb0uIsIH9OscyM ITIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5faDdiSfEvPiidYdsg69vohbWPfRuJFVIG4ImR/in7c=; b=RX+0kdFHDQ8fNsl/J3/KY4NqFpB3ciMxsnTU/NnwXZmC8NJtFGvHHDV6RXNDvCeG2R 5DQSv9lE4p/NgX7qMflPKZ+ntddLVC/xZyjCE819EKCXDynWfPSuhuh22hHaP21YkPtC VSf0Xg2drnA3/fNxGL0YMPkzTGEQcPDryqodEyGYo7jvDwFyQuox2NsKHgaXI7eDkbAZ CNXT0mH3ngzNdvhkntX1JLb/UkNivDXyLsT2G6GJrV3vEhf3mez5APUHDCaMe9ixBRkk mmSvPMexQScfip2WwywYEzxWJYdgOHcwGBMvJr/qYjHwdqO8Uv2gDiugXbRmelfEgyI4 ivYA== X-Gm-Message-State: ANoB5pmGJFbR/+1YMnDj/fKyMgUR4EMT2xFp+fTWBlnzwWgdEHtSJgZ0 PJyc6tXbXGIQzzQxT7iYEl4xWV8S7vPhoUYXaPI= X-Google-Smtp-Source: AA0mqf4ZJgLAgH8WW7JOyDm14gbVN4Ne0dQl8y0ta37gwdGlHyCDU9G6zLW1cUl73dIzkCziWPZSNg== X-Received: by 2002:a05:6808:2203:b0:355:6c59:6838 with SMTP id bd3-20020a056808220300b003556c596838mr2711712oib.27.1670551553772; Thu, 08 Dec 2022 18:05:53 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 18/27] tcg/s390x: Tighten constraints for and_i64 Date: Thu, 8 Dec 2022 20:05:21 -0600 Message-Id: <20221209020530.396391-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::229; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x229.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670552338731100003 Content-Type: text/plain; charset="utf-8" Let the register allocator handle such immediates by matching only what one insn can achieve. Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich --- tcg/s390x/tcg-target-con-set.h | 1 + tcg/s390x/tcg-target-con-str.h | 2 + tcg/s390x/tcg-target.c.inc | 114 +++++++++++++++++---------------- 3 files changed, 61 insertions(+), 56 deletions(-) diff --git a/tcg/s390x/tcg-target-con-set.h b/tcg/s390x/tcg-target-con-set.h index 34ae4c7743..0c4d0da8f5 100644 --- a/tcg/s390x/tcg-target-con-set.h +++ b/tcg/s390x/tcg-target-con-set.h @@ -25,6 +25,7 @@ C_O1_I2(r, 0, rJ) C_O1_I2(r, r, ri) C_O1_I2(r, r, rJ) C_O1_I2(r, r, rK) +C_O1_I2(r, r, rNKR) C_O1_I2(r, rZ, r) C_O1_I2(v, v, r) C_O1_I2(v, v, v) diff --git a/tcg/s390x/tcg-target-con-str.h b/tcg/s390x/tcg-target-con-str.h index 7b910d6d11..6fa64a1ed6 100644 --- a/tcg/s390x/tcg-target-con-str.h +++ b/tcg/s390x/tcg-target-con-str.h @@ -21,4 +21,6 @@ CONST('A', TCG_CT_CONST_S33) CONST('I', TCG_CT_CONST_S16) CONST('J', TCG_CT_CONST_S32) CONST('K', TCG_CT_CONST_P32) +CONST('N', TCG_CT_CONST_INV) +CONST('R', TCG_CT_CONST_INVRISBG) CONST('Z', TCG_CT_CONST_ZERO) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index 2a7410ba58..21007f94ad 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -33,11 +33,13 @@ #include "../tcg-pool.c.inc" #include "elf.h" =20 -#define TCG_CT_CONST_S16 0x100 -#define TCG_CT_CONST_S32 0x200 -#define TCG_CT_CONST_S33 0x400 -#define TCG_CT_CONST_ZERO 0x800 -#define TCG_CT_CONST_P32 0x1000 +#define TCG_CT_CONST_S16 (1 << 8) +#define TCG_CT_CONST_S32 (1 << 9) +#define TCG_CT_CONST_S33 (1 << 10) +#define TCG_CT_CONST_ZERO (1 << 11) +#define TCG_CT_CONST_P32 (1 << 12) +#define TCG_CT_CONST_INV (1 << 13) +#define TCG_CT_CONST_INVRISBG (1 << 14) =20 #define ALL_GENERAL_REGS MAKE_64BIT_MASK(0, 16) #define ALL_VECTOR_REGS MAKE_64BIT_MASK(32, 32) @@ -530,6 +532,38 @@ static int is_const_p32(uint64_t val) return -1; } =20 +/* + * Accept bit patterns like these: + * 0....01....1 + * 1....10....0 + * 1..10..01..1 + * 0..01..10..0 + * Copied from gcc sources. + */ +static bool risbg_mask(uint64_t c) +{ + uint64_t lsb; + /* We don't change the number of transitions by inverting, + so make sure we start with the LSB zero. */ + if (c & 1) { + c =3D ~c; + } + /* Reject all zeros or all ones. */ + if (c =3D=3D 0) { + return false; + } + /* Find the first transition. */ + lsb =3D c & -c; + /* Invert to look for a second transition. */ + c =3D ~c; + /* Erase the first transition. */ + c &=3D -lsb; + /* Find the second transition, if any. */ + lsb =3D c & -c; + /* Match if all the bits are 1's, or if c is zero. */ + return c =3D=3D -lsb; +} + /* Test if a constant matches the constraint. */ static bool tcg_target_const_match(int64_t val, TCGType type, int ct) { @@ -552,6 +586,9 @@ static bool tcg_target_const_match(int64_t val, TCGType= type, int ct) return val =3D=3D 0; } =20 + if (ct & TCG_CT_CONST_INV) { + val =3D ~val; + } /* * Note that is_const_p16 is a subset of is_const_p32, * so we don't need both constraints. @@ -559,6 +596,9 @@ static bool tcg_target_const_match(int64_t val, TCGType= type, int ct) if ((ct & TCG_CT_CONST_P32) && is_const_p32(val) >=3D 0) { return true; } + if ((ct & TCG_CT_CONST_INVRISBG) && risbg_mask(~val)) { + return true; + } =20 return 0; } @@ -1057,36 +1097,6 @@ static inline void tgen_ext32u(TCGContext *s, TCGReg= dest, TCGReg src) tcg_out_insn(s, RRE, LLGFR, dest, src); } =20 -/* Accept bit patterns like these: - 0....01....1 - 1....10....0 - 1..10..01..1 - 0..01..10..0 - Copied from gcc sources. */ -static inline bool risbg_mask(uint64_t c) -{ - uint64_t lsb; - /* We don't change the number of transitions by inverting, - so make sure we start with the LSB zero. */ - if (c & 1) { - c =3D ~c; - } - /* Reject all zeros or all ones. */ - if (c =3D=3D 0) { - return false; - } - /* Find the first transition. */ - lsb =3D c & -c; - /* Invert to look for a second transition. */ - c =3D ~c; - /* Erase the first transition. */ - c &=3D -lsb; - /* Find the second transition, if any. */ - lsb =3D c & -c; - /* Match if all the bits are 1's, or if c is zero. */ - return c =3D=3D -lsb; -} - static void tgen_andi_risbg(TCGContext *s, TCGReg out, TCGReg in, uint64_t= val) { int msb, lsb; @@ -1126,34 +1136,25 @@ static void tgen_andi(TCGContext *s, TCGType type, = TCGReg dest, uint64_t val) return; } =20 - /* Try all 32-bit insns that can perform it in one go. */ - for (i =3D 0; i < 4; i++) { - tcg_target_ulong mask =3D ~(0xffffull << i * 16); - if (((val | ~valid) & mask) =3D=3D mask) { - tcg_out_insn_RI(s, ni_insns[i], dest, val >> i * 16); - return; - } + i =3D is_const_p16(~val & valid); + if (i >=3D 0) { + tcg_out_insn_RI(s, ni_insns[i], dest, val >> (i * 16)); + return; } =20 - /* Try all 48-bit insns that can perform it in one go. */ - for (i =3D 0; i < 2; i++) { - tcg_target_ulong mask =3D ~(0xffffffffull << i * 32); - if (((val | ~valid) & mask) =3D=3D mask) { - tcg_out_insn_RIL(s, nif_insns[i], dest, val >> i * 32); - return; - } + i =3D is_const_p32(~val & valid); + tcg_debug_assert(i =3D=3D 0 || type !=3D TCG_TYPE_I32); + if (i >=3D 0) { + tcg_out_insn_RIL(s, nif_insns[i], dest, val >> (i * 32)); + return; } + if (risbg_mask(val)) { tgen_andi_risbg(s, dest, dest, val); return; } =20 - tcg_out_movi(s, type, TCG_TMP0, val); - if (type =3D=3D TCG_TYPE_I32) { - tcg_out_insn(s, RR, NR, dest, TCG_TMP0); - } else { - tcg_out_insn(s, RRE, NGR, dest, TCG_TMP0); - } + g_assert_not_reached(); } =20 static void tgen_ori(TCGContext *s, TCGReg dest, uint64_t val) @@ -2935,10 +2936,11 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGO= pcode op) case INDEX_op_sub_i32: case INDEX_op_sub_i64: case INDEX_op_and_i32: - case INDEX_op_and_i64: case INDEX_op_or_i32: case INDEX_op_xor_i32: return C_O1_I2(r, r, ri); + case INDEX_op_and_i64: + return C_O1_I2(r, r, rNKR); case INDEX_op_or_i64: case INDEX_op_xor_i64: return C_O1_I2(r, r, rK); --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.05.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:05:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=r/pLue4GJbxIJm5sMmwSzrcMdvN3fibiketeG7lVYHg=; b=LczvHU+zvROps0yYEqNDAaAqRR2oDKwFL3wRNZUdHt2rdVeYyNJn6xqsZuvxsq20M0 UiBTkO9RtyyZ8uaYpSWyQRscK904AxuPReE+OCqSWwRUvKthqZGHIZ52uVnbdZ6AfZOE 5qg7vMxYe/v5hHqo3p2Gccc/WqgHaoDvUeO510ZIoIcsR6PVN1kmOcHnbCuGnXIrm7LH lUoRZLqfxD5lwouB8Jp6pxp58rv6O3gn5ti0nF7bTiVNSbTVVHavxtppqfhaIx3UjiKU j0hU6wtY4Sic3oSv/9IFDj84GkPdZXBTA9OuztlnYE0YFAPL2UeJGvqmITSzJCykFVMP 5b0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=r/pLue4GJbxIJm5sMmwSzrcMdvN3fibiketeG7lVYHg=; b=ABKWy68SrlTGBlFHH2aosD2eE42MnATawLiO8k4yTW3cWtmQQXWKHNZ+NiOKjbm02f 3X1wcJln3U3F4LJYIsqYymp16NO+GeSnW9uzcQm2jgroNs+sDfNUlqz03RO0elbjFlda OmT6fBiyMUm/z4w8OlRlTYNSv6QXiRc8RasbMajtn63VzlDpmAj5L/pXN3u6KyUjLc4C 6w+K4krsi9xWu+/Q6vZXt7R+obze7ABwbHGc9VcKv6rL0Nho6iR47NbGJ9W2b7T0aRVP bkdIZT3dbGrZCuQtkHYZ64pIKIUMx23zkk1AB42e84wWHivkgVrGHq+pfL0nJGaN3xot 8fdQ== X-Gm-Message-State: ANoB5pnnn4xq2Z8ot1Kg/GK1rtiora48a4mw7KfCv5Yy7cIR2yl88l0U 30zNndFV1VX5asPCLrVhQ2hHcrKLfz8WZNFpJzg= X-Google-Smtp-Source: AA0mqf73W+ilIe9QVTRQMst+C95BMbfoDNo8rgsE3V+qdDV6JVfBOETn77QkRBNd27W969Z3CdySXA== X-Received: by 2002:a05:6808:a10:b0:35a:3093:e9e1 with SMTP id n16-20020a0568080a1000b0035a3093e9e1mr1566738oij.3.1670551554853; Thu, 08 Dec 2022 18:05:54 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 19/27] tcg/s390x: Support MIE3 logical operations Date: Thu, 8 Dec 2022 20:05:22 -0600 Message-Id: <20221209020530.396391-20-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::234; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x234.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670551727492100001 Content-Type: text/plain; charset="utf-8" This is andc, orc, nand, nor, eqv. We can use nor for implementing not. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target-con-set.h | 3 + tcg/s390x/tcg-target.h | 25 ++++---- tcg/s390x/tcg-target.c.inc | 102 +++++++++++++++++++++++++++++++++ 3 files changed, 118 insertions(+), 12 deletions(-) diff --git a/tcg/s390x/tcg-target-con-set.h b/tcg/s390x/tcg-target-con-set.h index 0c4d0da8f5..b194ad7f03 100644 --- a/tcg/s390x/tcg-target-con-set.h +++ b/tcg/s390x/tcg-target-con-set.h @@ -22,9 +22,12 @@ C_O1_I1(v, vr) C_O1_I2(r, 0, ri) C_O1_I2(r, 0, rI) C_O1_I2(r, 0, rJ) +C_O1_I2(r, r, r) C_O1_I2(r, r, ri) C_O1_I2(r, r, rJ) C_O1_I2(r, r, rK) +C_O1_I2(r, r, rKR) +C_O1_I2(r, r, rNK) C_O1_I2(r, r, rNKR) C_O1_I2(r, rZ, r) C_O1_I2(v, v, r) diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h index 03ce11a34a..dabdae1e84 100644 --- a/tcg/s390x/tcg-target.h +++ b/tcg/s390x/tcg-target.h @@ -64,6 +64,7 @@ typedef enum TCGReg { =20 #define FACILITY_LOAD_ON_COND2 53 #define FACILITY_MISC_INSN_EXT2 58 +#define FACILITY_MISC_INSN_EXT3 61 #define FACILITY_VECTOR 129 #define FACILITY_VECTOR_ENH1 135 =20 @@ -81,13 +82,13 @@ extern uint64_t s390_facilities[3]; #define TCG_TARGET_HAS_ext16u_i32 1 #define TCG_TARGET_HAS_bswap16_i32 1 #define TCG_TARGET_HAS_bswap32_i32 1 -#define TCG_TARGET_HAS_not_i32 0 +#define TCG_TARGET_HAS_not_i32 HAVE_FACILITY(MISC_INSN_EXT3) #define TCG_TARGET_HAS_neg_i32 1 -#define TCG_TARGET_HAS_andc_i32 0 -#define TCG_TARGET_HAS_orc_i32 0 -#define TCG_TARGET_HAS_eqv_i32 0 -#define TCG_TARGET_HAS_nand_i32 0 -#define TCG_TARGET_HAS_nor_i32 0 +#define TCG_TARGET_HAS_andc_i32 HAVE_FACILITY(MISC_INSN_EXT3) +#define TCG_TARGET_HAS_orc_i32 HAVE_FACILITY(MISC_INSN_EXT3) +#define TCG_TARGET_HAS_eqv_i32 HAVE_FACILITY(MISC_INSN_EXT3) +#define TCG_TARGET_HAS_nand_i32 HAVE_FACILITY(MISC_INSN_EXT3) +#define TCG_TARGET_HAS_nor_i32 HAVE_FACILITY(MISC_INSN_EXT3) #define TCG_TARGET_HAS_clz_i32 0 #define TCG_TARGET_HAS_ctz_i32 0 #define TCG_TARGET_HAS_ctpop_i32 0 @@ -118,13 +119,13 @@ extern uint64_t s390_facilities[3]; #define TCG_TARGET_HAS_bswap16_i64 1 #define TCG_TARGET_HAS_bswap32_i64 1 #define TCG_TARGET_HAS_bswap64_i64 1 -#define TCG_TARGET_HAS_not_i64 0 +#define TCG_TARGET_HAS_not_i64 HAVE_FACILITY(MISC_INSN_EXT3) #define TCG_TARGET_HAS_neg_i64 1 -#define TCG_TARGET_HAS_andc_i64 0 -#define TCG_TARGET_HAS_orc_i64 0 -#define TCG_TARGET_HAS_eqv_i64 0 -#define TCG_TARGET_HAS_nand_i64 0 -#define TCG_TARGET_HAS_nor_i64 0 +#define TCG_TARGET_HAS_andc_i64 HAVE_FACILITY(MISC_INSN_EXT3) +#define TCG_TARGET_HAS_orc_i64 HAVE_FACILITY(MISC_INSN_EXT3) +#define TCG_TARGET_HAS_eqv_i64 HAVE_FACILITY(MISC_INSN_EXT3) +#define TCG_TARGET_HAS_nand_i64 HAVE_FACILITY(MISC_INSN_EXT3) +#define TCG_TARGET_HAS_nor_i64 HAVE_FACILITY(MISC_INSN_EXT3) #define TCG_TARGET_HAS_clz_i64 1 #define TCG_TARGET_HAS_ctz_i64 0 #define TCG_TARGET_HAS_ctpop_i64 0 diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index 21007f94ad..bab2d679c2 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -181,8 +181,18 @@ typedef enum S390Opcode { RRFa_MGRK =3D 0xb9ec, RRFa_MSRKC =3D 0xb9fd, RRFa_MSGRKC =3D 0xb9ed, + RRFa_NCRK =3D 0xb9f5, + RRFa_NCGRK =3D 0xb9e5, + RRFa_NNRK =3D 0xb974, + RRFa_NNGRK =3D 0xb964, + RRFa_NORK =3D 0xb976, + RRFa_NOGRK =3D 0xb966, RRFa_NRK =3D 0xb9f4, RRFa_NGRK =3D 0xb9e4, + RRFa_NXRK =3D 0xb977, + RRFa_NXGRK =3D 0xb967, + RRFa_OCRK =3D 0xb975, + RRFa_OCGRK =3D 0xb965, RRFa_ORK =3D 0xb9f6, RRFa_OGRK =3D 0xb9e6, RRFa_SRK =3D 0xb9f9, @@ -2007,9 +2017,46 @@ static inline void tcg_out_op(TCGContext *s, TCGOpco= de opc, } break; =20 + case INDEX_op_andc_i32: + a0 =3D args[0], a1 =3D args[1], a2 =3D (uint32_t)args[2]; + if (const_args[2]) { + tcg_out_mov(s, TCG_TYPE_I32, a0, a1); + tgen_andi(s, TCG_TYPE_I32, a0, (uint32_t)~a2); + } else { + tcg_out_insn(s, RRFa, NCRK, a0, a1, a2); + } + break; + case INDEX_op_orc_i32: + a0 =3D args[0], a1 =3D args[1], a2 =3D (uint32_t)args[2]; + if (const_args[2]) { + tcg_out_mov(s, TCG_TYPE_I32, a0, a1); + tgen_ori(s, a0, (uint32_t)~a2); + } else { + tcg_out_insn(s, RRFa, OCRK, a0, a1, a2); + } + break; + case INDEX_op_eqv_i32: + a0 =3D args[0], a1 =3D args[1], a2 =3D (uint32_t)args[2]; + if (const_args[2]) { + tcg_out_mov(s, TCG_TYPE_I32, a0, a1); + tcg_out_insn(s, RIL, XILF, a0, ~a2); + } else { + tcg_out_insn(s, RRFa, NXRK, a0, a1, a2); + } + break; + case INDEX_op_nand_i32: + tcg_out_insn(s, RRFa, NNRK, args[0], args[1], args[2]); + break; + case INDEX_op_nor_i32: + tcg_out_insn(s, RRFa, NORK, args[0], args[1], args[2]); + break; + case INDEX_op_neg_i32: tcg_out_insn(s, RR, LCR, args[0], args[1]); break; + case INDEX_op_not_i32: + tcg_out_insn(s, RRFa, NORK, args[0], args[1], args[1]); + break; =20 case INDEX_op_mul_i32: a0 =3D args[0], a1 =3D args[1], a2 =3D (int32_t)args[2]; @@ -2265,9 +2312,46 @@ static inline void tcg_out_op(TCGContext *s, TCGOpco= de opc, } break; =20 + case INDEX_op_andc_i64: + a0 =3D args[0], a1 =3D args[1], a2 =3D args[2]; + if (const_args[2]) { + tcg_out_mov(s, TCG_TYPE_I64, a0, a1); + tgen_andi(s, TCG_TYPE_I64, a0, ~a2); + } else { + tcg_out_insn(s, RRFa, NCGRK, a0, a1, a2); + } + break; + case INDEX_op_orc_i64: + a0 =3D args[0], a1 =3D args[1], a2 =3D args[2]; + if (const_args[2]) { + tcg_out_mov(s, TCG_TYPE_I64, a0, a1); + tgen_ori(s, a0, ~a2); + } else { + tcg_out_insn(s, RRFa, OCGRK, a0, a1, a2); + } + break; + case INDEX_op_eqv_i64: + a0 =3D args[0], a1 =3D args[1], a2 =3D args[2]; + if (const_args[2]) { + tcg_out_mov(s, TCG_TYPE_I64, a0, a1); + tgen_xori(s, a0, ~a2); + } else { + tcg_out_insn(s, RRFa, NXGRK, a0, a1, a2); + } + break; + case INDEX_op_nand_i64: + tcg_out_insn(s, RRFa, NNGRK, args[0], args[1], args[2]); + break; + case INDEX_op_nor_i64: + tcg_out_insn(s, RRFa, NOGRK, args[0], args[1], args[2]); + break; + case INDEX_op_neg_i64: tcg_out_insn(s, RRE, LCGR, args[0], args[1]); break; + case INDEX_op_not_i64: + tcg_out_insn(s, RRFa, NOGRK, args[0], args[1], args[1]); + break; case INDEX_op_bswap64_i64: tcg_out_insn(s, RRE, LRVGR, args[0], args[1]); break; @@ -2945,6 +3029,22 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOp= code op) case INDEX_op_xor_i64: return C_O1_I2(r, r, rK); =20 + case INDEX_op_andc_i32: + case INDEX_op_orc_i32: + case INDEX_op_eqv_i32: + return C_O1_I2(r, r, ri); + case INDEX_op_andc_i64: + return C_O1_I2(r, r, rKR); + case INDEX_op_orc_i64: + case INDEX_op_eqv_i64: + return C_O1_I2(r, r, rNK); + + case INDEX_op_nand_i32: + case INDEX_op_nand_i64: + case INDEX_op_nor_i32: + case INDEX_op_nor_i64: + return C_O1_I2(r, r, r); + case INDEX_op_mul_i32: return (HAVE_FACILITY(MISC_INSN_EXT2) ? C_O1_I2(r, r, ri) @@ -2970,6 +3070,8 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpc= ode op) case INDEX_op_bswap64_i64: case INDEX_op_neg_i32: case INDEX_op_neg_i64: + case INDEX_op_not_i32: + case INDEX_op_not_i64: case INDEX_op_ext8s_i32: case INDEX_op_ext8s_i64: case INDEX_op_ext8u_i32: --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670551944; cv=none; d=zohomail.com; s=zohoarc; b=msqMa2710NWs/Y8cQGwBE8HKlQk8v/19EjLz4eNlUBT9p9mAm1dLj6/NxoIivIijaMbOURkkX2hWyXKc0/lxPhv1GxJHNpgj+R7TwHYhe5gFUOuXhQ41K5MMKlvwmsYt9ZS41HADwRlHOBWnGYWfMG23nYCEZkflzM8DbhV+Zic= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670551944; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=CJ/9NJKojCTI8IsyXCxUEUWPG0r5aG42tVuV9K2OrB0=; b=dE2Kby2bx5D+WYIiYpO2khnPi0vaAHQgf9NRU4CjsIZFx6OJVM1NQ8uaRJSbIAgN9slJoqbGoDgEIQtZDjBTjTur8X24GDejk1u2xzX4G8r8dLJ/8xhxMDO7ZEZ0yZgw2zpDZohAWuME+8ouORbdVbEB0NefD8aC6H3EpfzJE9U= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1670551944132143.84765585415334; Thu, 8 Dec 2022 18:12:24 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3Sm7-00063t-A0; Thu, 08 Dec 2022 21:06:07 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3Sly-00060f-9i for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:58 -0500 Received: from mail-oi1-x231.google.com ([2607:f8b0:4864:20::231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Slw-0001sD-Lf for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:58 -0500 Received: by mail-oi1-x231.google.com with SMTP id c129so3306889oia.0 for ; Thu, 08 Dec 2022 18:05:56 -0800 (PST) Received: from stoup.. ([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.05.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:05:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CJ/9NJKojCTI8IsyXCxUEUWPG0r5aG42tVuV9K2OrB0=; b=IeikftGKxmM+kN5WW2muamkPWmZCrd2qWF5R1W+bymjPgcBXQVQhmKsTdvt5PqfonY JXi+IjuSRUbFS+fiiDkpTEMwqvpIYuAAQVqGhpDtdxAL0uAXpi7jLB+fIRQvSuAVW9Uo fbBsVnboZtaga+s/8f6SxEQDT7oLzPhEr3jnEUvmP7qGnW4/NuaVpwMqODBpcZRHhTfh /GfGQBUh+AfPUsp7z2t0asgxyZ6ChmTU5YgThxm7ONsDH6kXHmL2XIyN9xU0R7iqdB/W l+J6wLreGVWM6h7xjk0vcY7o1Adf7ul2wxhZuKXWw98YP8wHtKZuoH88adqNtKsHnQK4 7dAg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CJ/9NJKojCTI8IsyXCxUEUWPG0r5aG42tVuV9K2OrB0=; b=x38APZ1ZiO11AOOQ4IVP+J7sdbyplTcqs6t8kEFgIW2qvZtZdIKQUZqodo9IcQRFtL XSDTK1yZ6KxGSF6WG0BJ2pOA7Zl0a+3j939T6G5t456hmoxO/uTkgP/OWzccgMrrkxI/ arRfJITXTibwcLI3aw15osn5r3sQ/JlxqJoutYphR8lvMA7nRUrwjtRCzdSufp2UvgeZ tNgnC8zqbI4lxd4Ioggo89jX5pPAVdQ+FnWhJAfaN/G6Hy7viIBTR8y1F2PintHQB1L4 F/v1jJ1FQE8z/7fbiw4UdIaOOAMtK5d1I0xRQ5ODz+92BKe9LWPeFoqLYtY4MqhxfTY3 Hymg== X-Gm-Message-State: ANoB5pkm5pbxxvnUyTH1Dt97jHX6Dx3WAupBzo5+D3bhIwcRJ2BrhIla DO6zmHaztR//+uJjJQPN7KNSEfVwCqPq4gNdsbY= X-Google-Smtp-Source: AA0mqf7P+bmTqH8A71j6NdGWZMncFjjwrscLSvIib7FrjrcaoxzdqjWBOcaVizMPpjWp3vMXGCZD+Q== X-Received: by 2002:a05:6808:3009:b0:355:1de9:6546 with SMTP id ay9-20020a056808300900b003551de96546mr2345954oib.40.1670551555966; Thu, 08 Dec 2022 18:05:55 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 20/27] tcg/s390x: Create tgen_cmp2 to simplify movcond Date: Thu, 8 Dec 2022 20:05:23 -0600 Message-Id: <20221209020530.396391-21-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::231; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x231.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670551945042100001 Content-Type: text/plain; charset="utf-8" Return both regular and inverted condition codes from tgen_cmp2. This lets us choose after the fact which comparision we want. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.c.inc | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index bab2d679c2..a9e3b4a9b9 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -1207,10 +1207,11 @@ static void tgen_xori(TCGContext *s, TCGReg dest, u= int64_t val) } } =20 -static int tgen_cmp(TCGContext *s, TCGType type, TCGCond c, TCGReg r1, - TCGArg c2, bool c2const, bool need_carry) +static int tgen_cmp2(TCGContext *s, TCGType type, TCGCond c, TCGReg r1, + TCGArg c2, bool c2const, bool need_carry, int *inv_cc) { bool is_unsigned =3D is_unsigned_cond(c); + TCGCond inv_c =3D tcg_invert_cond(c); S390Opcode op; =20 if (c2const) { @@ -1221,6 +1222,7 @@ static int tgen_cmp(TCGContext *s, TCGType type, TCGC= ond c, TCGReg r1, } else { tcg_out_insn(s, RRE, LTGR, r1, r1); } + *inv_cc =3D tcg_cond_to_ltr_cond[inv_c]; return tcg_cond_to_ltr_cond[c]; } } @@ -1263,9 +1265,17 @@ static int tgen_cmp(TCGContext *s, TCGType type, TCG= Cond c, TCGReg r1, } =20 exit: + *inv_cc =3D tcg_cond_to_s390_cond[inv_c]; return tcg_cond_to_s390_cond[c]; } =20 +static int tgen_cmp(TCGContext *s, TCGType type, TCGCond c, TCGReg r1, + TCGArg c2, bool c2const, bool need_carry) +{ + int inv_cc; + return tgen_cmp2(s, type, c, r1, c2, c2const, need_carry, &inv_cc); +} + static void tgen_setcond(TCGContext *s, TCGType type, TCGCond cond, TCGReg dest, TCGReg c1, TCGArg c2, int c2const) { @@ -1348,7 +1358,10 @@ static void tgen_movcond(TCGContext *s, TCGType type= , TCGCond c, TCGReg dest, TCGReg c1, TCGArg c2, int c2const, TCGArg v3, int v3const) { - int cc =3D tgen_cmp(s, type, c, c1, c2, c2const, false); + int cc, inv_cc; + + cc =3D tgen_cmp2(s, type, c, c1, c2, c2const, false, &inv_cc); + if (v3const) { tcg_out_insn(s, RIEg, LOCGHI, dest, v3, cc); } else { --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670551682; cv=none; d=zohomail.com; s=zohoarc; b=RPqsMJNV7glRpKGY0ZRibJiDMaP1Gld56ePcsawxp5M5hMrcX+Nnx/eWfQP0+faEmBG55phsAtMhhplVDQybZdLCaQpF7EJ34raebWQEoLbcaPHf3IjLh7UiIFGngwzMFhQfcCrRmUPzcsLBuB4Mh74YqFLMU+cucsft0pk/1Is= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670551682; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Gx7T/PYZU254lwrsHZ56yxEYIpVsjroGfvIVha75a6k=; b=ZqefsNTC/qimzJ2a2qHxWE4/JMegnftutAkV0LCOScTNRSwkh2yclm/kQthJMuqijkkQB3ZMwqI4yovQmnP4CiC996g/aJWr37E+rhtnS8BbyaMKPc2xBTxFXlA7jsjibFwSuRnHTUZnNHyPm/1xbgmi0g0OPVcoRnf7KHz+CUI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1670551682939177.96632355831684; Thu, 8 Dec 2022 18:08:02 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3Sm1-000621-QC; Thu, 08 Dec 2022 21:06:01 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3Slz-00061g-Tp for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:59 -0500 Received: from mail-oi1-x235.google.com ([2607:f8b0:4864:20::235]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Sly-0001ym-7d for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:05:59 -0500 Received: by mail-oi1-x235.google.com with SMTP id c129so3306930oia.0 for ; Thu, 08 Dec 2022 18:05:57 -0800 (PST) Received: from stoup.. ([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.05.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:05:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Gx7T/PYZU254lwrsHZ56yxEYIpVsjroGfvIVha75a6k=; b=atHepb2sdz2dv1kFCvduur+6Ht3OG2T33+Bo7R5Qs3j1HR10baLLX/e2gtaMn8/dxo Mq79XgO+yKu6hRjfTyBgSeSB2lEzCxfsZqNHEgtoPVfq6o8rL6o7IpNXiwh4EPgH7Srq cXND6zxpHAS+HzuMQbp3Jh5DV1dKYySaJHNiGfWUw8mWvXjulfPsG7J0usnQ6Ey3ydEo QWIRFP6occNPCzmx/v/k5/M3Z+4y52c1EC0DVb7vnTFfZWnf6TTA5+DaPnMZ+IQA5o/M czHnoSpyn8ye+mSF2LP8hy2zMQtTveaxIe6+bAbb0mlX/657FhAXljj7ZXmzNKT6aAeJ 7Qvw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Gx7T/PYZU254lwrsHZ56yxEYIpVsjroGfvIVha75a6k=; b=T3pb39MXlkJZ9rx/hVHbyMOUBcdJypmApGnaB3ZK8Q3Du7jBVMB3hbdn65iL+QUiDL odlHJwgQifS7lFc1YvooBRUXqQIgvDKoUU7QFNU82uXGLOLgd22FISJaG2urWw/IcpSe e2gOCta/UOP72dzb2vyIaA/v9Zbau8KhwaC5f+/ql9/fuXjfJnZJcyV9H2yu/BqsLHG9 +4H/4mI2Oo13mDIEnBBNpP6/1etm7Nry1tJQafo72tViuAiY/rimbM5u7z/7+b/2wv1h +oVsCc+apKDq+R4xJqd0If5h/fuNEx4miG2k+RmJ3XFxg021ZCux1zlDLqUh0zH6gyNw 7jpw== X-Gm-Message-State: ANoB5pn1SMdV/BpkNVQ+R9hui5yBRa5v4KnxCAS96tpYtzfujHodhKW6 TyWBAimc9Qv7ikDV5NwAh0o7AP1rFqjjqj3fYnY= X-Google-Smtp-Source: AA0mqf5bbTHo4jllAOUMGOQRFrLcmIK+tjajN23Joh1dR62C3kwPwb+KcKz84mSczrdHreWrcF8hkg== X-Received: by 2002:aca:dfd6:0:b0:35a:1124:227d with SMTP id w205-20020acadfd6000000b0035a1124227dmr1765777oig.3.1670551557117; Thu, 08 Dec 2022 18:05:57 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 21/27] tcg/s390x: Generalize movcond implementation Date: Thu, 8 Dec 2022 20:05:24 -0600 Message-Id: <20221209020530.396391-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::235; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x235.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670551683234100001 Content-Type: text/plain; charset="utf-8" Generalize movcond to support pre-computed conditions, and the same set of arguments at all times. This will be assumed by a following patch, which needs to reuse tgen_movcond_int. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target-con-set.h | 3 +- tcg/s390x/tcg-target.c.inc | 52 ++++++++++++++++++++++++++-------- 2 files changed, 41 insertions(+), 14 deletions(-) diff --git a/tcg/s390x/tcg-target-con-set.h b/tcg/s390x/tcg-target-con-set.h index b194ad7f03..8cf8ed4dff 100644 --- a/tcg/s390x/tcg-target-con-set.h +++ b/tcg/s390x/tcg-target-con-set.h @@ -33,8 +33,7 @@ C_O1_I2(r, rZ, r) C_O1_I2(v, v, r) C_O1_I2(v, v, v) C_O1_I3(v, v, v, v) -C_O1_I4(r, r, ri, r, 0) -C_O1_I4(r, r, ri, rI, 0) +C_O1_I4(r, r, ri, rI, r) C_O2_I2(o, m, 0, r) C_O2_I2(o, m, r, r) C_O2_I3(o, m, 0, 1, r) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index a9e3b4a9b9..30c12052f0 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -1354,19 +1354,49 @@ static void tgen_setcond(TCGContext *s, TCGType typ= e, TCGCond cond, tcg_out_insn(s, RRFc, LOCGR, dest, TCG_TMP0, cc); } =20 +static void tgen_movcond_int(TCGContext *s, TCGType type, TCGReg dest, + TCGArg v3, int v3const, TCGReg v4, + int cc, int inv_cc) +{ + TCGReg src; + + if (v3const) { + if (dest =3D=3D v4) { + if (HAVE_FACILITY(LOAD_ON_COND2)) { + /* Emit: if (cc) dest =3D v3. */ + tcg_out_insn(s, RIEg, LOCGHI, dest, v3, cc); + return; + } + tcg_out_insn(s, RI, LGHI, TCG_TMP0, v3); + src =3D TCG_TMP0; + } else { + /* LGR+LOCGHI is larger than LGHI+LOCGR. */ + tcg_out_insn(s, RI, LGHI, dest, v3); + cc =3D inv_cc; + src =3D v4; + } + } else { + if (dest =3D=3D v4) { + src =3D v3; + } else { + tcg_out_mov(s, type, dest, v3); + cc =3D inv_cc; + src =3D v4; + } + } + + /* Emit: if (cc) dest =3D src. */ + tcg_out_insn(s, RRFc, LOCGR, dest, src, cc); +} + static void tgen_movcond(TCGContext *s, TCGType type, TCGCond c, TCGReg de= st, TCGReg c1, TCGArg c2, int c2const, - TCGArg v3, int v3const) + TCGArg v3, int v3const, TCGReg v4) { int cc, inv_cc; =20 cc =3D tgen_cmp2(s, type, c, c1, c2, c2const, false, &inv_cc); - - if (v3const) { - tcg_out_insn(s, RIEg, LOCGHI, dest, v3, cc); - } else { - tcg_out_insn(s, RRFc, LOCGR, dest, v3, cc); - } + tgen_movcond_int(s, type, dest, v3, v3const, v4, cc, inv_cc); } =20 static void tgen_clz(TCGContext *s, TCGReg dest, TCGReg a1, @@ -2225,7 +2255,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcod= e opc, break; case INDEX_op_movcond_i32: tgen_movcond(s, TCG_TYPE_I32, args[5], args[0], args[1], - args[2], const_args[2], args[3], const_args[3]); + args[2], const_args[2], args[3], const_args[3], args[= 4]); break; =20 case INDEX_op_qemu_ld_i32: @@ -2509,7 +2539,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcod= e opc, break; case INDEX_op_movcond_i64: tgen_movcond(s, TCG_TYPE_I64, args[5], args[0], args[1], - args[2], const_args[2], args[3], const_args[3]); + args[2], const_args[2], args[3], const_args[3], args[= 4]); break; =20 OP_32_64(deposit): @@ -3114,9 +3144,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpc= ode op) =20 case INDEX_op_movcond_i32: case INDEX_op_movcond_i64: - return (HAVE_FACILITY(LOAD_ON_COND2) - ? C_O1_I4(r, r, ri, rI, 0) - : C_O1_I4(r, r, ri, r, 0)); + return C_O1_I4(r, r, ri, rI, r); =20 case INDEX_op_div2_i32: case INDEX_op_div2_i64: --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670551632; cv=none; d=zohomail.com; s=zohoarc; b=fgD5Ml9luqr959S08eon405UrY74+GvVdELyfyF2Hc07C/OU2M3QWsmyPmelE/xrmbFGELjA9YDjOq7qksOeqxNFWrLiGJfrRbRZciOdJnQr1c5sRc8RjKgzYQaWxIgt3fA4vvTmE+NWeGfxP+Ru4J+mwqfVLk9MQRT9RbxuteE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670551632; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=/xRarcor/wbrlmQ6/1SUQDwNV/2PA1HoUGLA4N0wOFk=; b=gf5CgZKeV3Oo9FYOIakRBmro2x8SE8vjHG9VtxQu4g2ch73qJm8wfOZVSSKRA5wvpadObq1ZigtCrR7Tz5dMuekLj5HMIGbc75MhxiBC9FjRigWPwJKfGPyNF6WTcgcE+3tJm/leUGTd6B/FeD6PYxvhR74vqjTgHIOSfLZvBmo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1670551632714371.6783912622627; Thu, 8 Dec 2022 18:07:12 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3Sm8-00064M-Ue; Thu, 08 Dec 2022 21:06:09 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3Sm2-00062S-8a for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:06:05 -0500 Received: from mail-oi1-x22e.google.com ([2607:f8b0:4864:20::22e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Slz-0001yz-Iv for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:06:01 -0500 Received: by mail-oi1-x22e.google.com with SMTP id v70so3277544oie.3 for ; Thu, 08 Dec 2022 18:05:59 -0800 (PST) Received: from stoup.. ([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.05.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:05:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/xRarcor/wbrlmQ6/1SUQDwNV/2PA1HoUGLA4N0wOFk=; b=lxkyvnioQU5/iwuqGHWagUJT9vWBv/eDRUHk4ZU7ycDBbaldSTWSkGOCwyc6aNCOMo x4+PfnljtkElewLgp+b8TfSIg5QECIt5VG2XGUH4WqUGbfSH83X/NOW6/MADgdV0P846 WnKfNReNPlGpquncdlMnjn15TZyWpmnNZ5yuMP+RFBO97gSwV9v+wUHY8cyc5KfNusjE sb67f4fFPcF2MKAFW0zKd5gCq2GJoMy8CmxgORNxf6uXPtw6b4D6aGQls0c0EdHrJeBF DUt8jH9QbBfiAlwdOiDcCdPVHvwztlEI80ZKHfWElWsk+NO8KIHd1NDjhjJg9AgMTmH3 J5Ig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/xRarcor/wbrlmQ6/1SUQDwNV/2PA1HoUGLA4N0wOFk=; b=hZxTLpBnMD2unSmGB4d8rWovzuoxCHEpN5QmRqOK2VfCyit0CT/e2oi1aMwIaAvl4m 3GQzMraf85VL9i7RvUJclK9/Zqh4tAZjURMEnK0cmYMbtfxQvYGXpXmcZ6DRq4lZvoe4 lDuRwloSum6EiuTe57Ck9sANwGnSd6hNH7V78/svUZSRCBDWITlMqGjGGY5Du0pliMaq /+vD4KDf0x+oI5QQhMvL34PFBMlRex3UCKCOU+fLNO9oLUGyFsafuRw8jEaQ32Hv6+pf UBXBT7q/e88zXVoZGS+TYB56sBsFhhP5o33UXTglbz7DqsU5do+g++Yj1ybzT+peS5iA gQyQ== X-Gm-Message-State: ANoB5pm7eZRfZIa8NWUffWSH5pIVU13sEClscdvy/EELfNzGJroJheve kfCPdG3dfEduaOk2n7BoQ5bOPj65SnEYGnZqmTI= X-Google-Smtp-Source: AA0mqf44dO5ln/dDKOm24NeVgMR44iM5n0p8sQrJ13xdDb5vA3S6rQdHogeNm44OZr6LrI0Mm1d/IA== X-Received: by 2002:a05:6808:1b1e:b0:35e:4589:19cf with SMTP id bx30-20020a0568081b1e00b0035e458919cfmr2114298oib.42.1670551558369; Thu, 08 Dec 2022 18:05:58 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 22/27] tcg/s390x: Support SELGR instruction in movcond Date: Thu, 8 Dec 2022 20:05:25 -0600 Message-Id: <20221209020530.396391-23-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::22e; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x22e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670551634664100003 Content-Type: text/plain; charset="utf-8" The new select instruction provides two separate register inputs, whereas the old load-on-condition instruction overlaps one of the register inputs with the destination. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.c.inc | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index 30c12052f0..ab1fb45cc2 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -202,6 +202,8 @@ typedef enum S390Opcode { RRFa_XRK =3D 0xb9f7, RRFa_XGRK =3D 0xb9e7, =20 + RRFam_SELGR =3D 0xb9e3, + RRFc_LOCR =3D 0xb9f2, RRFc_LOCGR =3D 0xb9e2, =20 @@ -626,12 +628,20 @@ static void tcg_out_insn_RRE(TCGContext *s, S390Opcod= e op, tcg_out32(s, (op << 16) | (r1 << 4) | r2); } =20 +/* RRF-a without the m4 field */ static void tcg_out_insn_RRFa(TCGContext *s, S390Opcode op, TCGReg r1, TCGReg r2, TCGReg r3) { tcg_out32(s, (op << 16) | (r3 << 12) | (r1 << 4) | r2); } =20 +/* RRF-a with the m4 field */ +static void tcg_out_insn_RRFam(TCGContext *s, S390Opcode op, + TCGReg r1, TCGReg r2, TCGReg r3, int m4) +{ + tcg_out32(s, (op << 16) | (r3 << 12) | (m4 << 8) | (r1 << 4) | r2); +} + static void tcg_out_insn_RRFc(TCGContext *s, S390Opcode op, TCGReg r1, TCGReg r2, int m3) { @@ -1376,6 +1386,11 @@ static void tgen_movcond_int(TCGContext *s, TCGType = type, TCGReg dest, src =3D v4; } } else { + if (HAVE_FACILITY(MISC_INSN_EXT3)) { + /* Emit: dest =3D cc ? v3 : v4. */ + tcg_out_insn(s, RRFam, SELGR, dest, v3, v4, cc); + return; + } if (dest =3D=3D v4) { src =3D v3; } else { --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670551693; cv=none; d=zohomail.com; s=zohoarc; b=EKEjc5CsoQZofK+PC9PAMBJPijDMcgZp7bRZPE6bh/ykRgQrL/sNPywcP3/dQ7s2aHBndqNxkg3a4WInnVAxiHZPSTvyMcs+Pp5GW7jbLATvaxXByX+O4K3EtUpkzQ8j1hqGtpGGXPYvnN4Bnv08YMw5hk5Ut78kUn0XafE6YDc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670551693; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=r0wyYihsWPXw8Yqko2NtqMR1/ytj9ZC8grnAJG95FjU=; b=EaHNZN+QD5kT1I/Cdas9+2qhUpwaeQ5Yeo67kJrT1Ay1bvpZV35z1GGyW8lqYl4Q4kr4DVd4sQLvNybVBdCf6RFPOfjkgCFPpw+6FcKHaWnA4J90AT+DYswn7cTUbGO36Q5rN2V9h38dQy/8ZO4FJR28Nbipn76gAqUYCVt5ZTw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1670551693806431.8870665936131; Thu, 8 Dec 2022 18:08:13 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3SmK-00066B-7s; Thu, 08 Dec 2022 21:06:20 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3Sm8-000647-JK for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:06:08 -0500 Received: from mail-oi1-x232.google.com ([2607:f8b0:4864:20::232]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Sm0-0001zB-Gq for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:06:02 -0500 Received: by mail-oi1-x232.google.com with SMTP id h132so3283830oif.2 for ; Thu, 08 Dec 2022 18:06:00 -0800 (PST) Received: from stoup.. ([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.05.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:05:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=r0wyYihsWPXw8Yqko2NtqMR1/ytj9ZC8grnAJG95FjU=; b=LbWX84ncUDHd2MaOjUWUgnXe4k+BVgd6DbQwhcmbUBhIYmIoYIVnxv+h9QJ6PvCKyB t2J9DzjgIZ7WdW6e9eKwtZt1A/OulN2PWmHT2M49h7j7sQrqtwpeuPu3MSZHo4fmFvtX CT98MhO/aln4qlXX6YkdpkHPratQaFgKWLK94jITEIKugNW3kF2rg/nL7XcZc6hP4WAY AQlMixl3jhFzIs8UFlz2wVr2+J5s7P+UGCEWd4eOpvvZaQGRcwfFxjML0Fhx83+l8Wi3 mopc2OS3WS1WK5YNimPP0JXe7f9BVa1kwBOnhUO1Q+XtPZD9NaPOPeopeVleaF66vbve NfMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=r0wyYihsWPXw8Yqko2NtqMR1/ytj9ZC8grnAJG95FjU=; b=DfHVdFnqE6zlBNHD1A7DnW7tT9c0V2QA0fA+9H4RjwCDFQj9egIH3fkD+xx7KUqkEI gaMYFa5hSwFMBzxJRmb4ZULdVfDkmkRAnDWSdNxtu7xVmJkrV7CZPscerB1U+vukVzwT xx6itNEpLEjZ1jpSQladKMA/T7bb4pdDd617RIYsR23rChaZ4VEb4t6f/CKcy38r80oN 7xQnhZ8/uN69lghuTD8gzKmhXqeJG/0vnQWMQ25KDsXkxjd7WJ01F7wtGLJW+3ZPHjOZ fXnwV3rqsQJ0AMY63YrusE7vEtsDDL1wL0rYzOuk/m/UlqQ8AUoAt8Wj+WnjbBgE6zAn +YwA== X-Gm-Message-State: ANoB5pk7kpNCu40FnjBE5Gu84xWAgPDtxIBjbeeIkELvEoBlUIU25psT iY81cOCZIujbZvf7MkTgLNcEZttvTKIng6T4M6A= X-Google-Smtp-Source: AA0mqf4SC4jivd3mW6XyEcBy7R5y9Fr4HICXt3qhs1RbRjFyA4APZ/ARJm/P6N8ytcGUr/6Oyf6XwA== X-Received: by 2002:a05:6808:98e:b0:35e:5aac:716a with SMTP id a14-20020a056808098e00b0035e5aac716amr23733oic.45.1670551559527; Thu, 08 Dec 2022 18:05:59 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 23/27] tcg/s390x: Use tgen_movcond_int in tgen_clz Date: Thu, 8 Dec 2022 20:05:26 -0600 Message-Id: <20221209020530.396391-24-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::232; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x232.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670551695330100007 Content-Type: text/plain; charset="utf-8" Reuse code from movcond to conditionally copy a2 to dest, based on the condition codes produced by FLOGR. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target-con-set.h | 1 + tcg/s390x/tcg-target.c.inc | 20 +++++++++++--------- 2 files changed, 12 insertions(+), 9 deletions(-) diff --git a/tcg/s390x/tcg-target-con-set.h b/tcg/s390x/tcg-target-con-set.h index 8cf8ed4dff..baf3bc9037 100644 --- a/tcg/s390x/tcg-target-con-set.h +++ b/tcg/s390x/tcg-target-con-set.h @@ -24,6 +24,7 @@ C_O1_I2(r, 0, rI) C_O1_I2(r, 0, rJ) C_O1_I2(r, r, r) C_O1_I2(r, r, ri) +C_O1_I2(r, r, rI) C_O1_I2(r, r, rJ) C_O1_I2(r, r, rK) C_O1_I2(r, r, rKR) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index ab1fb45cc2..8254f9f650 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -1424,15 +1424,15 @@ static void tgen_clz(TCGContext *s, TCGReg dest, TC= GReg a1, =20 if (a2const && a2 =3D=3D 64) { tcg_out_mov(s, TCG_TYPE_I64, dest, TCG_REG_R0); - } else { - if (a2const) { - tcg_out_movi(s, TCG_TYPE_I64, dest, a2); - } else { - tcg_out_mov(s, TCG_TYPE_I64, dest, a2); - } - /* Emit: if (one bit found) dest =3D r0. */ - tcg_out_insn(s, RRFc, LOCGR, dest, TCG_REG_R0, 2); + return; } + + /* + * Conditions from FLOGR are: + * 2 -> one bit found + * 8 -> no one bit found + */ + tgen_movcond_int(s, TCG_TYPE_I64, dest, a2, a2const, TCG_REG_R0, 8, 2); } =20 static void tgen_deposit(TCGContext *s, TCGReg dest, TCGReg src, @@ -3070,11 +3070,13 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGO= pcode op) case INDEX_op_rotl_i64: case INDEX_op_rotr_i32: case INDEX_op_rotr_i64: - case INDEX_op_clz_i64: case INDEX_op_setcond_i32: case INDEX_op_setcond_i64: return C_O1_I2(r, r, ri); =20 + case INDEX_op_clz_i64: + return C_O1_I2(r, r, rI); + case INDEX_op_sub_i32: case INDEX_op_sub_i64: case INDEX_op_and_i32: --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670552100; cv=none; d=zohomail.com; s=zohoarc; b=GkhF32DU3aYQDhN7GUX0GQsbuk5DDTPcES9Q30m2BeAoCs3AnYaYnH4tkI62XH71TIW+xmWlmrjp95cjUl11AD9lXuTanlkNHk/2DqhicVk48ydlKt7wEIpXXBOEZZkA+hLr5YnU0/mTIzWZP4Vjm7e505kjJchSQB9PtwL1N8A= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670552100; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=7jUA9/ifCEteEPBnCrvu2FZgUNzc6y0gw3a24gfdjs4=; b=WBxp9nLnB1mxcUSz3doknZL8rmayzuEH7V3iNZl2D9GhGAOskJvgXo9dwSMK1nKJ445l/uZei0JGma6wGosovN/4r9dpkKW4jHNqgychW02SyF1Omj8PqxZBTqE4FAmd9Jt1zz9iHk9P9GL5zn9gW9dZCgTWMoVt8Us7Embr738= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1670552100392673.177474699647; Thu, 8 Dec 2022 18:15:00 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3SmK-00067h-9V; Thu, 08 Dec 2022 21:06:22 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3Sm8-000648-Jd for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:06:08 -0500 Received: from mail-ot1-x32b.google.com ([2607:f8b0:4864:20::32b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Sm2-0001uN-Bw for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:06:03 -0500 Received: by mail-ot1-x32b.google.com with SMTP id t19-20020a9d7753000000b0066d77a3d474so1974409otl.10 for ; Thu, 08 Dec 2022 18:06:00 -0800 (PST) Received: from stoup.. ([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.05.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:06:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7jUA9/ifCEteEPBnCrvu2FZgUNzc6y0gw3a24gfdjs4=; b=HxAveCWgvQLvuwx7kmTfdN3yu1EjNH74nOXqhBuLg63HFSva9vsVdLlwVv7os42ZQj D/gnwvn/I4HmSkdaCRjNj1sTijskSprI8uVCAfk8+P1ac+Nro4EbZFtxwctXbG/kXCv+ IrbWwFH52y5KuFI/292r0bx7ow62S0xwxlbJN4fUHpbDqXH68yu2Ph+lgTkfefk2uSQr PBDbNt9WH92DLcgbmgpO6tR5Gi85JD+ga6anfsBx0GXmc42+Z6i5/YsgP8xOJDq5g4p/ kueN/GPu7wYipk2GrorhMQ1jstJ8wjovMTTuobi07gP1BPWMGYcOejP41/7FGTp43CSZ q92w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7jUA9/ifCEteEPBnCrvu2FZgUNzc6y0gw3a24gfdjs4=; b=YS/1IBJPrrX+XNONpwBiz4dmiY88onmtFczFyDmnAMCrN+vbyF3yBLbrqSbZcuRKbo 8fcp79m81YAlfIEp5+sNcyVFb9xi4fOUh9qqUOrdziW1D5PlsqZ9wr3d+iaAZvQWzSpe WhWiYdOn1loBQfHa27hLHS2EVoGC57+jnQFSg3SylFeq1Alm52J90eRDZdh2ZlBEJ+jp IQCzbVEgUh25di8wPBDQgpgmmO36OM6uZrMGxs+5Om4iBwZnDbYSd6AJP4ma05Xiz5Sj l5yLqWIHun8/tkC8p/oSOY6NGSUAK/l9Ved7LG7GZBEw+fwDrVfFhJoJ+x97I9hZN6j9 Fxqg== X-Gm-Message-State: ANoB5pnZzk7vF2Xa8qPEWtLLYYRRMZq6V4L8xNXpz2bussbSLU1rLim0 M+f8L5uMa7KlncPjbwO+6dvpld28J6N1XceeZiM= X-Google-Smtp-Source: AA0mqf5cKiuCkWIl2QeT1/pImPIPEpJYLlxhJWdYBDtRHmWmyB72UgMvThE0vh4iY9nANLLjcXFSEQ== X-Received: by 2002:a05:6830:3809:b0:66e:7670:e684 with SMTP id bh9-20020a056830380900b0066e7670e684mr3294666otb.20.1670551560689; Thu, 08 Dec 2022 18:06:00 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 24/27] tcg/s390x: Implement ctpop operation Date: Thu, 8 Dec 2022 20:05:27 -0600 Message-Id: <20221209020530.396391-25-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32b; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670552101564100002 Content-Type: text/plain; charset="utf-8" There is an older form that produces per-byte results, and a newer form that produces per-register results. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.h | 4 ++-- tcg/s390x/tcg-target.c.inc | 36 ++++++++++++++++++++++++++++++++++++ 2 files changed, 38 insertions(+), 2 deletions(-) diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h index dabdae1e84..68dcbc6645 100644 --- a/tcg/s390x/tcg-target.h +++ b/tcg/s390x/tcg-target.h @@ -91,7 +91,7 @@ extern uint64_t s390_facilities[3]; #define TCG_TARGET_HAS_nor_i32 HAVE_FACILITY(MISC_INSN_EXT3) #define TCG_TARGET_HAS_clz_i32 0 #define TCG_TARGET_HAS_ctz_i32 0 -#define TCG_TARGET_HAS_ctpop_i32 0 +#define TCG_TARGET_HAS_ctpop_i32 1 #define TCG_TARGET_HAS_deposit_i32 1 #define TCG_TARGET_HAS_extract_i32 1 #define TCG_TARGET_HAS_sextract_i32 0 @@ -128,7 +128,7 @@ extern uint64_t s390_facilities[3]; #define TCG_TARGET_HAS_nor_i64 HAVE_FACILITY(MISC_INSN_EXT3) #define TCG_TARGET_HAS_clz_i64 1 #define TCG_TARGET_HAS_ctz_i64 0 -#define TCG_TARGET_HAS_ctpop_i64 0 +#define TCG_TARGET_HAS_ctpop_i64 1 #define TCG_TARGET_HAS_deposit_i64 1 #define TCG_TARGET_HAS_extract_i64 1 #define TCG_TARGET_HAS_sextract_i64 0 diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index 8254f9f650..c0434fa2f8 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -206,6 +206,7 @@ typedef enum S390Opcode { =20 RRFc_LOCR =3D 0xb9f2, RRFc_LOCGR =3D 0xb9e2, + RRFc_POPCNT =3D 0xb9e1, =20 RR_AR =3D 0x1a, RR_ALR =3D 0x1e, @@ -1435,6 +1436,32 @@ static void tgen_clz(TCGContext *s, TCGReg dest, TCG= Reg a1, tgen_movcond_int(s, TCG_TYPE_I64, dest, a2, a2const, TCG_REG_R0, 8, 2); } =20 +static void tgen_ctpop(TCGContext *s, TCGType type, TCGReg dest, TCGReg sr= c) +{ + /* With MIE3, and bit 0 of m4 set, we get the complete result. */ + if (HAVE_FACILITY(MISC_INSN_EXT3)) { + if (type =3D=3D TCG_TYPE_I32) { + tgen_ext32u(s, dest, src); + src =3D dest; + } + tcg_out_insn(s, RRFc, POPCNT, dest, src, 8); + return; + } + + /* Without MIE3, each byte gets the count of bits for the byte. */ + tcg_out_insn(s, RRFc, POPCNT, dest, src, 0); + + /* Multiply to sum each byte at the top of the word. */ + if (type =3D=3D TCG_TYPE_I32) { + tcg_out_insn(s, RIL, MSFI, dest, 0x01010101); + tcg_out_sh32(s, RS_SRL, dest, TCG_REG_NONE, 24); + } else { + tcg_out_movi(s, TCG_TYPE_I64, TCG_TMP0, 0x0101010101010101ull); + tcg_out_insn(s, RRE, MSGR, dest, TCG_TMP0); + tcg_out_sh64(s, RSY_SRLG, dest, dest, TCG_REG_NONE, 56); + } +} + static void tgen_deposit(TCGContext *s, TCGReg dest, TCGReg src, int ofs, int len, int z) { @@ -2584,6 +2611,13 @@ static inline void tcg_out_op(TCGContext *s, TCGOpco= de opc, tgen_clz(s, args[0], args[1], args[2], const_args[2]); break; =20 + case INDEX_op_ctpop_i32: + tgen_ctpop(s, TCG_TYPE_I32, args[0], args[1]); + break; + case INDEX_op_ctpop_i64: + tgen_ctpop(s, TCG_TYPE_I64, args[0], args[1]); + break; + case INDEX_op_mb: /* The host memory model is quite strong, we simply need to serialize the instruction stream. */ @@ -3146,6 +3180,8 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpc= ode op) case INDEX_op_extu_i32_i64: case INDEX_op_extract_i32: case INDEX_op_extract_i64: + case INDEX_op_ctpop_i32: + case INDEX_op_ctpop_i64: return C_O1_I1(r, r); =20 case INDEX_op_qemu_ld_i32: --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670551691; cv=none; d=zohomail.com; s=zohoarc; b=Rg7t8OJRUo2ViVKOxb6MKtixHNL6e0u83PLX9VpIN0+3WR8EFgVo50mxJvUCIGXgIfgys8E+H+Pekcf9HkYrqpMtaVMUMRxG+5uBHnG8zYpx5nYUGzLnMBf42hD6y0+JbWfbob9Tr0kbDrVwORZDw1RD7DqdfmO7rgiZ+ir3/GU= ARC-Message-Signature: i=1; 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([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.06.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:06:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PkPgZIG6hTGADlV8624tJVDsas/W4HyH9r53h6RELE4=; b=FZf4cd5A7Ju3h1L1d5KZ+Mial6RHkWgdF/7ffcRASU5oWvRGYRLgRkX22v9uXSJj3u ujIb0pCbFrIi3WOpeQXAmJvdUmlzG3CVHljVR5RUvyZZYZslmxFPJ9hxQQU+MAIR8Wi4 JJPPk+Pr2+JjQGVaI7R+wQx9dV0e7z06+ThDN4k/pooyLX+bOCSyjJGm1s8ipHy4UMdU CsrvItBnxWK/AYSaPIEjhMtZ0EZ4qA4pCfO5ZoENi3rSeSkl9DI4dv12nL3PxEHR5MjN pFNmOVL8Qkdzp6bbLOgUOe/6/d/kMgPHGffuFYUDo/Tya/iDlWrUKcb4CZPTG4uxxnMr gY/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PkPgZIG6hTGADlV8624tJVDsas/W4HyH9r53h6RELE4=; b=ttnw+T/XryvJWIp+lSmeTl2ihb3jO4X6vizQSenXdX70CNft9IeBKnAlwFMJ92vUef XzL/Ov0oy4Y53IrlvVlxRdeLAJfLfOr0xa29+0qSBItLCwuEKBYEXgcY3qqH8+NMdOwQ EH617u8BEFnTXQODvT0AL/J5AhOqO4hiy0BWYMBgZB2XVf8TrE2KMsN8Y57uXpYjBehS yXmCXDQin4qxZdLFcdo0FzJ65WleGFqKV5KqVdyFe+iKwYlG5pNYR8HIPtpCUKHWi/xt jqLqGqy+L1eOopRfCyEH1ZhekpGVadb03s+QhJQAgSsjgj9037E7Kjkeh1winzhp6Uw9 Ui+w== X-Gm-Message-State: ANoB5pmXOSDnwlSLBCu9+U1rLc+BW2y9oJhtbVfsW/f0j847dll6+E+E J5Jqok6p2brFWmbtDg0cW8m6riKGGx6Oggb8M4g= X-Google-Smtp-Source: AA0mqf6ISAVDOFKYsesxdzoXi2/V3JK/cCNK7nH0zuZColqiVBlJx1dq2+pcGirbAU3GR6LrWtDKOg== X-Received: by 2002:a05:6870:3c13:b0:144:ebb9:9ea with SMTP id gk19-20020a0568703c1300b00144ebb909eamr1811846oab.48.1670551561868; Thu, 08 Dec 2022 18:06:01 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 25/27] tcg/s390x: Tighten constraints for 64-bit compare Date: Thu, 8 Dec 2022 20:05:28 -0600 Message-Id: <20221209020530.396391-26-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:4860:4864:20::2f; envelope-from=richard.henderson@linaro.org; helo=mail-oa1-x2f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670551693310100003 Content-Type: text/plain; charset="utf-8" Give 64-bit comparison second operand a signed 33-bit immediate. This is the smallest superset of uint32_t and int32_t, as used by CLGFI and CGFI respectively. The rest of the 33-bit space can be loaded into TCG_TMP0. Drop use of the constant pool. Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich --- tcg/s390x/tcg-target-con-set.h | 3 +++ tcg/s390x/tcg-target.c.inc | 27 ++++++++++++++------------- 2 files changed, 17 insertions(+), 13 deletions(-) diff --git a/tcg/s390x/tcg-target-con-set.h b/tcg/s390x/tcg-target-con-set.h index baf3bc9037..15f1c55103 100644 --- a/tcg/s390x/tcg-target-con-set.h +++ b/tcg/s390x/tcg-target-con-set.h @@ -13,6 +13,7 @@ C_O0_I1(r) C_O0_I2(L, L) C_O0_I2(r, r) C_O0_I2(r, ri) +C_O0_I2(r, rA) C_O0_I2(v, r) C_O1_I1(r, L) C_O1_I1(r, r) @@ -24,6 +25,7 @@ C_O1_I2(r, 0, rI) C_O1_I2(r, 0, rJ) C_O1_I2(r, r, r) C_O1_I2(r, r, ri) +C_O1_I2(r, r, rA) C_O1_I2(r, r, rI) C_O1_I2(r, r, rJ) C_O1_I2(r, r, rK) @@ -35,6 +37,7 @@ C_O1_I2(v, v, r) C_O1_I2(v, v, v) C_O1_I3(v, v, v, v) C_O1_I4(r, r, ri, rI, r) +C_O1_I4(r, r, rA, rI, r) C_O2_I2(o, m, 0, r) C_O2_I2(o, m, r, r) C_O2_I3(o, m, 0, 1, r) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index c0434fa2f8..4d113139e5 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -1249,22 +1249,20 @@ static int tgen_cmp2(TCGContext *s, TCGType type, T= CGCond c, TCGReg r1, tcg_out_insn_RIL(s, op, r1, c2); goto exit; } + + /* + * Constraints are for a signed 33-bit operand, which is a + * convenient superset of this signed/unsigned test. + */ if (c2 =3D=3D (is_unsigned ? (TCGArg)(uint32_t)c2 : (TCGArg)(int32= _t)c2)) { op =3D (is_unsigned ? RIL_CLGFI : RIL_CGFI); tcg_out_insn_RIL(s, op, r1, c2); goto exit; } =20 - /* Use the constant pool, but not for small constants. */ - if (maybe_out_small_movi(s, type, TCG_TMP0, c2)) { - c2 =3D TCG_TMP0; - /* fall through to reg-reg */ - } else { - op =3D (is_unsigned ? RIL_CLGRL : RIL_CGRL); - tcg_out_insn_RIL(s, op, r1, 0); - new_pool_label(s, c2, R_390_PC32DBL, s->code_ptr - 2, 2); - goto exit; - } + /* Load everything else into a register. */ + tcg_out_movi(s, TCG_TYPE_I64, TCG_TMP0, c2); + c2 =3D TCG_TMP0; } =20 if (type =3D=3D TCG_TYPE_I32) { @@ -3105,8 +3103,9 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpc= ode op) case INDEX_op_rotr_i32: case INDEX_op_rotr_i64: case INDEX_op_setcond_i32: - case INDEX_op_setcond_i64: return C_O1_I2(r, r, ri); + case INDEX_op_setcond_i64: + return C_O1_I2(r, r, rA); =20 case INDEX_op_clz_i64: return C_O1_I2(r, r, rI); @@ -3154,8 +3153,9 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpc= ode op) return C_O1_I2(r, r, ri); =20 case INDEX_op_brcond_i32: - case INDEX_op_brcond_i64: return C_O0_I2(r, ri); + case INDEX_op_brcond_i64: + return C_O0_I2(r, rA); =20 case INDEX_op_bswap16_i32: case INDEX_op_bswap16_i64: @@ -3196,8 +3196,9 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpc= ode op) return C_O1_I2(r, rZ, r); =20 case INDEX_op_movcond_i32: - case INDEX_op_movcond_i64: return C_O1_I4(r, r, ri, rI, r); + case INDEX_op_movcond_i64: + return C_O1_I4(r, r, rA, rI, r); =20 case INDEX_op_div2_i32: case INDEX_op_div2_i64: --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670551741; cv=none; d=zohomail.com; s=zohoarc; b=Z8B2ppz9qoy6P1agdtlcoFtvi0hlfHIR3hDCZHdc25zLQHCnJsC1V1MsRXPMLjo4BMchHIaJkfNLMNx/TfmXo/ps1piBKyyZTM2jlmi78ogZt0GNvBg/TM+W8M0MkL8wqhFElSEDcgyvF/+tcffL780mRqamfEuQSQ/JSawS9PM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670551741; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=21p9NPEj/nCmkIem3oytkyW4EvI66hYE8FrtmQQPev4=; b=TwvTUnowginjsYWzJbuaSCf6qIn+K7686Ui97VgPZ3j/h1BfpnEHRAQiK4WQB/C27VCOVsyGj5QLqh3pMeNAyyNy1NThnaZd6ISy3jibNxo47Iq/NmwdeUvD6JshSUwl2Pe1QxSAbutoCmm7wJgwg175/ONLQtHro7svntzsXMs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1670551741961386.25028567415177; Thu, 8 Dec 2022 18:09:01 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3Smk-0006So-RR; Thu, 08 Dec 2022 21:06:46 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3SmB-00067j-FC for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:06:20 -0500 Received: from mail-ot1-x32c.google.com ([2607:f8b0:4864:20::32c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Sm7-0001xU-CB for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:06:11 -0500 Received: by mail-ot1-x32c.google.com with SMTP id p24-20020a0568301d5800b0066e6dc09be5so1982183oth.8 for ; Thu, 08 Dec 2022 18:06:03 -0800 (PST) Received: from stoup.. ([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.06.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:06:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=21p9NPEj/nCmkIem3oytkyW4EvI66hYE8FrtmQQPev4=; b=vl4lxRPDVxcZNhuMmwrorD+eXKw9mgdpiSMGExHtOyAoEIhmzudaCiQMp4TUlTp/99 Kfc5QTntw/IYl1i0mxAlnbyurFJ+zUh8Fg4V65YUMYWVwQJrTYYxq96TmSvRCxEvSLE0 jo7U+9tsxvSY8GHdImGW6u4q0GdRkFQgcOAznBL/0+w5M76RalPmAXPEl01gkKGKp0ao h72mQvtMOSNrFheAAjfa+f+q6oHpoqUBagVTcyFjrl1U80spVSqRNlZRu5sEaraQOwN9 gnVOl/k+tFNCPRMEIO+VGMEy+rXtvQG9FBfZuP1sCDiEnNbchxHAZEPlF0UPOA+J7D5d 3bWQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=21p9NPEj/nCmkIem3oytkyW4EvI66hYE8FrtmQQPev4=; b=WfUFcEkfm8iKJJrWl1ZlQzfmmjDy/82uVwaavB5sD/3rfDtdDRxGIMf/GB+YgdEZBJ BIQGCfcHJAgbk3Tk5EFEpJTL9wYsh5l43IB4YGbdYGgbRSEgYe6UIScljXxNQS2zeobf oM/b0T/PYD7cjqoQk3dpUmUGEVYwSuY5aN6J92xSnYy4+qy6xIiAG63cKF8g1oH2cidp BpEPDjghBvfdMbu5lVx9c+9/i3bVAtLsQ/N03B+vWF+VHekQzRnfbPDJmNN6Q8OobhdE WWK/ZIfUAH7rRReXxLEhO5wuX9w2w/WkikyHcjo3tR/JVrmLFmHkb8lcTW0f2IHIQZfm EPzg== X-Gm-Message-State: ANoB5pkjov3FQjtxp4T/Td5jPCkEt02zbM0dwCsa/liZ/EN+igBXAmuy zwVSPmnGyJnEMIMqItS5/o+6b6NzrH0Ve6b5qkk= X-Google-Smtp-Source: AA0mqf71J/WQfTrrnuBU0qv/zMT3oAqpTiKFvT30n5sJG44QeHCviahoEaWC5FUKGuQ35GpfGxEhsw== X-Received: by 2002:a05:6830:1517:b0:670:69ac:bb49 with SMTP id k23-20020a056830151700b0067069acbb49mr1952676otp.15.1670551563011; Thu, 08 Dec 2022 18:06:03 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 26/27] tcg/s390x: Cleanup tcg_out_movi Date: Thu, 8 Dec 2022 20:05:29 -0600 Message-Id: <20221209020530.396391-27-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32c; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670551743599100001 Content-Type: text/plain; charset="utf-8" Merge maybe_out_small_movi, as it no longer has additional users. Use is_const_p{16,32}. Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich --- tcg/s390x/tcg-target.c.inc | 52 ++++++++++++-------------------------- 1 file changed, 16 insertions(+), 36 deletions(-) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index 4d113139e5..b72c43e4aa 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -874,14 +874,19 @@ static bool tcg_out_mov(TCGContext *s, TCGType type, = TCGReg dst, TCGReg src) return true; } =20 -static const S390Opcode lli_insns[4] =3D { +static const S390Opcode li_insns[4] =3D { RI_LLILL, RI_LLILH, RI_LLIHL, RI_LLIHH }; +static const S390Opcode lif_insns[2] =3D { + RIL_LLILF, RIL_LLIHF, +}; =20 -static bool maybe_out_small_movi(TCGContext *s, TCGType type, - TCGReg ret, tcg_target_long sval) +/* load a register with an immediate value */ +static void tcg_out_movi(TCGContext *s, TCGType type, + TCGReg ret, tcg_target_long sval) { tcg_target_ulong uval =3D sval; + ptrdiff_t pc_off; int i; =20 if (type =3D=3D TCG_TYPE_I32) { @@ -892,36 +897,13 @@ static bool maybe_out_small_movi(TCGContext *s, TCGTy= pe type, /* Try all 32-bit insns that can load it in one go. */ if (sval >=3D -0x8000 && sval < 0x8000) { tcg_out_insn(s, RI, LGHI, ret, sval); - return true; - } - - for (i =3D 0; i < 4; i++) { - tcg_target_long mask =3D 0xffffull << i * 16; - if ((uval & mask) =3D=3D uval) { - tcg_out_insn_RI(s, lli_insns[i], ret, uval >> i * 16); - return true; - } - } - - return false; -} - -/* load a register with an immediate value */ -static void tcg_out_movi(TCGContext *s, TCGType type, - TCGReg ret, tcg_target_long sval) -{ - tcg_target_ulong uval; - ptrdiff_t pc_off; - - /* Try all 32-bit insns that can load it in one go. */ - if (maybe_out_small_movi(s, type, ret, sval)) { return; } =20 - uval =3D sval; - if (type =3D=3D TCG_TYPE_I32) { - uval =3D (uint32_t)sval; - sval =3D (int32_t)sval; + i =3D is_const_p16(uval); + if (i >=3D 0) { + tcg_out_insn_RI(s, li_insns[i], ret, uval >> (i * 16)); + return; } =20 /* Try all 48-bit insns that can load it in one go. */ @@ -929,12 +911,10 @@ static void tcg_out_movi(TCGContext *s, TCGType type, tcg_out_insn(s, RIL, LGFI, ret, sval); return; } - if (uval <=3D 0xffffffff) { - tcg_out_insn(s, RIL, LLILF, ret, uval); - return; - } - if ((uval & 0xffffffff) =3D=3D 0) { - tcg_out_insn(s, RIL, LLIHF, ret, uval >> 32); + + i =3D is_const_p32(uval); + if (i >=3D 0) { + tcg_out_insn_RIL(s, lif_insns[i], ret, uval >> (i * 32)); return; } =20 --=20 2.34.1 From nobody Fri May 17 21:52:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1670551956; cv=none; d=zohomail.com; s=zohoarc; b=HCVTk4agcKMEU0gB98FumU/tSO1BNn95Tqmb5KDzK6nW4+jQXu7zysQoncvtzgwopVtmtnb4Mfle3BuIoyhvz4TggjA8wHQ+pVFwB8enmNc1aIrYU6Q+4B0bKllIvPaun+mlBvll8oUwCCseroI3l8NG5/Zb3zPloHBGDWSbqRQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1670551956; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=4Xfk4bHnygfauWDlmIUai3p2sgHwvyBYVnNGY17EklU=; b=U1m1s/LJ1jGIAVLRfAzGQLxhZ+gNLzjdvDAmutsZ6g6caCRxR4IIOXQFqmlPjEFxrsLL4qRf04rV1j67wmJMIBm5+Craac6XQnx1ptzITwB2K3Po4InCSxyNM0E6qczZ1h9VoYUX10jqRfKLUAQsaxM4t1HtEnz6Az751pMOrL8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1670551956921683.704919483723; Thu, 8 Dec 2022 18:12:36 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3Smj-0006Rz-6Q; Thu, 08 Dec 2022 21:06:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3SmC-00068X-VN for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:06:20 -0500 Received: from mail-ot1-x333.google.com ([2607:f8b0:4864:20::333]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3Sm8-0001zm-CP for qemu-devel@nongnu.org; Thu, 08 Dec 2022 21:06:12 -0500 Received: by mail-ot1-x333.google.com with SMTP id q18-20020a056830441200b006704633f258so2011840otv.0 for ; Thu, 08 Dec 2022 18:06:04 -0800 (PST) Received: from stoup.. ([2806:102e:18:2efc:d298:de6f:2ed:87a4]) by smtp.gmail.com with ESMTPSA id s14-20020a05683004ce00b0066f7e1188f0sm53531otd.68.2022.12.08.18.06.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 18:06:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4Xfk4bHnygfauWDlmIUai3p2sgHwvyBYVnNGY17EklU=; b=HJ5YvJqGLjFLD/6ZGyQihLm/5qvBw6odv+8g6Z8xs2qngJpoqlE26rHN9pf3cKWTxD fINCCXlxZi4CpugIrng4Yyl/osWAH3ToL0zh4lfB8h98fF5/VRDf0a5Z5k7X2SiJHexx WVQRzQpBjU7sf2XUf3ykeEEdZbRHPYqsKh46RvT/Ydogre+sE1gR0+5zsVchHCJTElBo CQGLSSb1BVYVsA5ZhoLryDGGUkz72Qcbl5T+M6DHUF/GqDsoIvIP+5hkmSqzyW2FhjAa 8ILs3yoaMwygnbwW6DeUgxzvBcUVgnuBKv93Pz0fqMCGr8yFyQePIMD0YY4Hu4gFvL2F 3oew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4Xfk4bHnygfauWDlmIUai3p2sgHwvyBYVnNGY17EklU=; b=SBrXQEO7Cf9EWSdlq3lPKlavPcAM2bMUQpyDNYSsutHZXDEcGOlCZpEFsFpfz7X98q +/x3dAR+dIs3fJKmRkLad8PORWj7zSp7Cm1oo+50IbPAfZNKj9aBG7YG+yVC6ewlNQuw p6nhHYAQYhswjjftsrRjejeNMA7GFLOtj62pZjQZZS848XzhGrlbsAOksSnyMdhCkHix ZhQGAHOY8qx+DOgccAa8Kleizzo4JoFKgorQT4QTV9tmJlVkU5Q48r5f+coQ+5JFYmqZ M+nkE5Mq7xmZp9eJR0g8kD//eXwy63wpsxO0v3L2S3bhZmb8mS1N47gCOogNzQ/uCzbQ mPRQ== X-Gm-Message-State: ANoB5pnGDcstvD+I4OmoHLLviB1yqNG1kAF4oyYiqW1vdt0RrSoxMWlz L5I1BEB5N9AnI1wbkN9GPpAdTP4VXQfW0S063kQ= X-Google-Smtp-Source: AA0mqf7wf7NhXX8HbWg+Wxhk5EZlgB0HjbcIL1Z+COuJyOsNrVscTb+EbbK1zmzaqyYsjyFKTHlEVA== X-Received: by 2002:a9d:1987:0:b0:661:dfeb:ee91 with SMTP id k7-20020a9d1987000000b00661dfebee91mr2128811otk.11.1670551564122; Thu, 08 Dec 2022 18:06:04 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v4 27/27] tcg/s390x: Avoid the constant pool in tcg_out_movi Date: Thu, 8 Dec 2022 20:05:30 -0600 Message-Id: <20221209020530.396391-28-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221209020530.396391-1-richard.henderson@linaro.org> References: <20221209020530.396391-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::333; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670551958982100003 Content-Type: text/plain; charset="utf-8" Load constants in no more than two insns, which turns out to be faster than using the constant pool. Suggested-by: Ilya Leoshkevich Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich --- tcg/s390x/tcg-target.c.inc | 23 +++++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index b72c43e4aa..2b38fd991d 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -877,6 +877,9 @@ static bool tcg_out_mov(TCGContext *s, TCGType type, TC= GReg dst, TCGReg src) static const S390Opcode li_insns[4] =3D { RI_LLILL, RI_LLILH, RI_LLIHL, RI_LLIHH }; +static const S390Opcode oi_insns[4] =3D { + RI_OILL, RI_OILH, RI_OIHL, RI_OIHH +}; static const S390Opcode lif_insns[2] =3D { RIL_LLILF, RIL_LLIHF, }; @@ -928,9 +931,20 @@ static void tcg_out_movi(TCGContext *s, TCGType type, return; } =20 - /* Otherwise, stuff it in the constant pool. */ - tcg_out_insn(s, RIL, LGRL, ret, 0); - new_pool_label(s, sval, R_390_PC32DBL, s->code_ptr - 2, 2); + /* Otherwise, load it by parts. */ + i =3D is_const_p16((uint32_t)uval); + if (i >=3D 0) { + tcg_out_insn_RI(s, li_insns[i], ret, uval >> (i * 16)); + } else { + tcg_out_insn(s, RIL, LLILF, ret, uval); + } + uval >>=3D 32; + i =3D is_const_p16(uval); + if (i >=3D 0) { + tcg_out_insn_RI(s, oi_insns[i + 2], ret, uval >> (i * 16)); + } else { + tcg_out_insn(s, RIL, OIHF, ret, uval); + } } =20 /* Emit a load/store type instruction. Inputs are: @@ -1160,9 +1174,6 @@ static void tgen_andi(TCGContext *s, TCGType type, TC= GReg dest, uint64_t val) =20 static void tgen_ori(TCGContext *s, TCGReg dest, uint64_t val) { - static const S390Opcode oi_insns[4] =3D { - RI_OILL, RI_OILH, RI_OIHL, RI_OIHH - }; static const S390Opcode oif_insns[2] =3D { RIL_OILF, RIL_OIHF }; --=20 2.34.1