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([2806:102e:18:70b5:7079:1798:87ad:611d]) by smtp.gmail.com with ESMTPSA id t26-20020a05683014da00b0066cb9069e0bsm5091007otq.42.2022.12.03.09.57.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 03 Dec 2022 09:57:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=x2tUJtrZjzSMGF7cLFs50dFYmcY5SifN0BJUMx7VetE=; b=jHTOwUvnjr64nLT20n3eEGGapPJ7zG7CApgZkR5XndvB5jYvSjIL9PbRscTGK2lLP5 t1PzvIgpgjem2uIunT0XMLsZqgMMbraTXUseX5hWNVg91PlJ4U4ndAymVPv2HTY1WGBu kcPIGrvHLFPq3bNJZCkyMgM60xqAzduqouwyfZDgVrgkua0bhhnIo1LAZ3ZPSoQpNCY7 J9ZfSYene+gvt6zgCjoLiOVh8pd0seJ9uw95fKlt2IwLgaK1UpwHSP8afuwqOqj1+8BJ dbt7piHVeEJ60gGhJsMAKwP81e2i2JGl4iZva3KoQWe+OYU86zaJSrgVioBmgqR4epiJ 7WJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=x2tUJtrZjzSMGF7cLFs50dFYmcY5SifN0BJUMx7VetE=; b=c6GGExyNQkCYH7P0eQ6Us8gRj1vLbajS4qayjiEtpRVLyIKt7bUxM9pDm2+hI0XKKJ MUYtkielfWdxAnaDTgqZhzX+yCEPdFnEh1BvTyyr27wFKe5iUs601+b9LMYs2XXofAgq /Gol81xALuaP9SiE0Y3vj8IfzcE/sZ/iEmNlr70rC5ep+3B3eOg8HOVTCSrU+mY2/ULU CFFcMJA658qQvCnTMLFjsGMqLAMrWtGZwQdr/EYrnqQM/sydderBkYQjMhtEhxS9RaH7 LD45C6SRuGk1ZyObKDINO1RPkps1n0/naN4RgEg/pYXUQtFGhLgEHX3vhvGsnNJJhoDP teOQ== X-Gm-Message-State: ANoB5pkvBXUkFvhFCKZkY0XkhRGlxKMQe9ltX0AVF9MNhk2/sDQUL6pM lnaKerxPzIiTqUy4FUHSeg9bl9VnpXTFjosgvXI= X-Google-Smtp-Source: AA0mqf70NPOs/dGA0ri3LotlU9lxoqVyyWJgjFK1IV8hIC2wI+907AaxiRcsLdrE/lxAUbfPizw8dg== X-Received: by 2002:a54:4606:0:b0:35a:220f:800e with SMTP id p6-20020a544606000000b0035a220f800emr39098653oip.257.1670090267956; Sat, 03 Dec 2022 09:57:47 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: alistair.francis@wdc.com, bin.meng@windriver.com, qemu-riscv@nongnu.org, qemu-stable@nongnu.org Subject: [PATCH] target/riscv: Set pc_succ_insn for !rvc illegal insn Date: Sat, 3 Dec 2022 11:57:44 -0600 Message-Id: <20221203175744.151365-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::22a; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x22a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1670090322968100001 Content-Type: text/plain; charset="utf-8" Failure to set pc_succ_insn may result in a TB covering zero bytes, which triggers an assert within the code generator. Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1224 Signed-off-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/riscv/translate.c | 12 ++++-------- tests/tcg/Makefile.target | 2 ++ tests/tcg/riscv64/Makefile.target | 5 +++++ tests/tcg/riscv64/test-noc.S | 32 +++++++++++++++++++++++++++++++ 4 files changed, 43 insertions(+), 8 deletions(-) create mode 100644 tests/tcg/riscv64/test-noc.S diff --git a/target/riscv/translate.c b/target/riscv/translate.c index db123da5ec..1ed4bb5ec3 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -1064,14 +1064,10 @@ static void decode_opc(CPURISCVState *env, DisasCon= text *ctx, uint16_t opcode) =20 /* Check for compressed insn */ if (insn_len(opcode) =3D=3D 2) { - if (!has_ext(ctx, RVC)) { - gen_exception_illegal(ctx); - } else { - ctx->opcode =3D opcode; - ctx->pc_succ_insn =3D ctx->base.pc_next + 2; - if (decode_insn16(ctx, opcode)) { - return; - } + ctx->opcode =3D opcode; + ctx->pc_succ_insn =3D ctx->base.pc_next + 2; + if (has_ext(ctx, RVC) && decode_insn16(ctx, opcode)) { + return; } } else { uint32_t opcode32 =3D opcode; diff --git a/tests/tcg/Makefile.target b/tests/tcg/Makefile.target index 75257f2b29..14bc013181 100644 --- a/tests/tcg/Makefile.target +++ b/tests/tcg/Makefile.target @@ -117,6 +117,8 @@ endif =20 %: %.c $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS) +%: %.S + $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS) else # For softmmu targets we include a different Makefile fragement as the # build options for bare programs are usually pretty different. They diff --git a/tests/tcg/riscv64/Makefile.target b/tests/tcg/riscv64/Makefile= .target index b5b89dfb0e..9973ba3b5f 100644 --- a/tests/tcg/riscv64/Makefile.target +++ b/tests/tcg/riscv64/Makefile.target @@ -4,3 +4,8 @@ VPATH +=3D $(SRC_PATH)/tests/tcg/riscv64 TESTS +=3D test-div TESTS +=3D noexec + +# Disable compressed instructions for test-noc +TESTS +=3D test-noc +test-noc: LDFLAGS =3D -nostdlib -static +run-test-noc: QEMU_OPTS +=3D -cpu rv64,c=3Dfalse diff --git a/tests/tcg/riscv64/test-noc.S b/tests/tcg/riscv64/test-noc.S new file mode 100644 index 0000000000..e29d60c8b3 --- /dev/null +++ b/tests/tcg/riscv64/test-noc.S @@ -0,0 +1,32 @@ +#include + + .text + .globl _start +_start: + .option norvc + li a0, 4 /* SIGILL */ + la a1, sa + li a2, 0 + li a3, 8 + li a7, __NR_rt_sigaction + scall + + .option rvc + li a0, 1 + j exit + .option norvc + +pass: + li a0, 0 +exit: + li a7, __NR_exit + scall + + .data + /* struct kernel_sigaction sa =3D { .sa_handler =3D pass }; */ + .type sa, @object + .size sa, 32 +sa: + .dword pass + .zero 24 + --=20 2.34.1