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([2602:47:d48a:1201:e3cc:2e37:17d4:f1d5]) by smtp.gmail.com with ESMTPSA id q61-20020a17090a17c300b00218d894fac3sm6056649pja.3.2022.12.01.22.52.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Dec 2022 22:52:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=SALIZINGdn2w7on0H3KHxyUtfANKPc/CHhJmhj36m1o=; b=M0Bx5ZwM2t4t1qjazItnFCJoLSeRr8MKfN+8Hacjp01i0sHc4jzdcavwTSeYJyUFN9 Zuq5eKgPsecICFPaiabCzXvza2ILY7Sr2HeCu+qFMKG6vFhRgAgeCGQbhN2x/fp76CQf VkfrGYwNRBEkmNeHcvXsYqhb4kMdNOMwOFcIBM5moQW/6nsbDzBtrQ53yuanZ+Xz3rSI zFwTPHzLRLWox9He7KudQNVpYU+CZd1XvlE+IxGXqt8SD5V6NTJL08WdTCiq0K6WGRi3 7CP0iDTtRXWgj93ibU9thN9tzTHCWDJwJrWNgEz71Ur580NQBI2UcMT851p0OdoZ7nSj E9Uw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SALIZINGdn2w7on0H3KHxyUtfANKPc/CHhJmhj36m1o=; b=jGnKnbYbd/I/Him/U5wcEZWAXTFWdv3SoaKnXVywfFDQi0k5OiPeJRguLrhr21N8fx 8Koh1CgW9DnLyQXWt2D82gz2lq6quaQYjr++SHuiUn7ygwBm0j510coLiHyTawJJhcFO 0M3kWcU2AVT0yW7EkD4hIeFQaaiUeHJdiMva14ixXTDGRnwdGmhZ2y3cEywp+gEti4jO Oh5gYqXWtOZksHn83zEiN188uXDwbSSGkVlwLdk7BlHbMd66GjVj/EPGBhcQRpk/u/8P CEKUsNENNv1MQPTIaaGuEu1RJRrp41/c7XEcegOCbkFCnxyImpgGJY0AHA29+0hI4D3H wa1g== X-Gm-Message-State: ANoB5pnEcHvithMYeJD4HGTVcq+kyNcZWO1EguoETbG34QTjXweFNpI4 82qkwsfMKV7ON6sgNuRsgkgR1wZiYEq6MAHy X-Google-Smtp-Source: AA0mqf75a2xuSRqIr8gPZW4ozmO6oP+fnXjUQTDD8voTEWRAIanY1QXoKFrB5MntccX21oyBPH1H6w== X-Received: by 2002:a63:f003:0:b0:45f:bf86:c917 with SMTP id k3-20020a63f003000000b0045fbf86c917mr62244632pgh.201.1669963927372; Thu, 01 Dec 2022 22:52:07 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: thuth@redhat.com, iii@linux.ibm.com Subject: [PATCH v3 06/13] tcg/s390x: Support MIE2 multiply single instructions Date: Thu, 1 Dec 2022 22:51:53 -0800 Message-Id: <20221202065200.224537-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221202065200.224537-1-richard.henderson@linaro.org> References: <20221202065200.224537-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1669964319744100003 Content-Type: text/plain; charset="utf-8" The MIE2 facility adds 3-operand versions of multiply. Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich --- tcg/s390x/tcg-target-con-set.h | 1 + tcg/s390x/tcg-target.h | 1 + tcg/s390x/tcg-target.c.inc | 34 ++++++++++++++++++++++++---------- 3 files changed, 26 insertions(+), 10 deletions(-) diff --git a/tcg/s390x/tcg-target-con-set.h b/tcg/s390x/tcg-target-con-set.h index 00ba727b70..33a82e3286 100644 --- a/tcg/s390x/tcg-target-con-set.h +++ b/tcg/s390x/tcg-target-con-set.h @@ -23,6 +23,7 @@ C_O1_I2(r, 0, ri) C_O1_I2(r, 0, rI) C_O1_I2(r, 0, rJ) C_O1_I2(r, r, ri) +C_O1_I2(r, r, rJ) C_O1_I2(r, rZ, r) C_O1_I2(v, v, r) C_O1_I2(v, v, v) diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h index 645f522058..bfd623a639 100644 --- a/tcg/s390x/tcg-target.h +++ b/tcg/s390x/tcg-target.h @@ -63,6 +63,7 @@ typedef enum TCGReg { #define FACILITY_FAST_BCR_SER FACILITY_LOAD_ON_COND #define FACILITY_DISTINCT_OPS FACILITY_LOAD_ON_COND #define FACILITY_LOAD_ON_COND2 53 +#define FACILITY_MISC_INSN_EXT2 58 #define FACILITY_VECTOR 129 #define FACILITY_VECTOR_ENH1 135 =20 diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index d02b433271..cd39b2a208 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -180,6 +180,8 @@ typedef enum S390Opcode { RRE_SLBGR =3D 0xb989, RRE_XGR =3D 0xb982, =20 + RRFa_MSRKC =3D 0xb9fd, + RRFa_MSGRKC =3D 0xb9ed, RRFa_NRK =3D 0xb9f4, RRFa_NGRK =3D 0xb9e4, RRFa_ORK =3D 0xb9f6, @@ -2140,14 +2142,18 @@ static inline void tcg_out_op(TCGContext *s, TCGOpc= ode opc, break; =20 case INDEX_op_mul_i32: + a0 =3D args[0], a1 =3D args[1], a2 =3D (int32_t)args[2]; if (const_args[2]) { - if ((int32_t)args[2] =3D=3D (int16_t)args[2]) { - tcg_out_insn(s, RI, MHI, args[0], args[2]); + tcg_out_mov(s, TCG_TYPE_I32, a0, a1); + if (a2 =3D=3D (int16_t)a2) { + tcg_out_insn(s, RI, MHI, a0, a2); } else { - tcg_out_insn(s, RIL, MSFI, args[0], args[2]); + tcg_out_insn(s, RIL, MSFI, a0, a2); } + } else if (a0 =3D=3D a1) { + tcg_out_insn(s, RRE, MSR, a0, a2); } else { - tcg_out_insn(s, RRE, MSR, args[0], args[2]); + tcg_out_insn(s, RRFa, MSRKC, a0, a1, a2); } break; =20 @@ -2405,14 +2411,18 @@ static inline void tcg_out_op(TCGContext *s, TCGOpc= ode opc, break; =20 case INDEX_op_mul_i64: + a0 =3D args[0], a1 =3D args[1], a2 =3D args[2]; if (const_args[2]) { - if (args[2] =3D=3D (int16_t)args[2]) { - tcg_out_insn(s, RI, MGHI, args[0], args[2]); + tcg_out_mov(s, TCG_TYPE_I64, a0, a1); + if (a2 =3D=3D (int16_t)a2) { + tcg_out_insn(s, RI, MGHI, a0, a2); } else { - tcg_out_insn(s, RIL, MSGFI, args[0], args[2]); + tcg_out_insn(s, RIL, MSGFI, a0, a2); } + } else if (a0 =3D=3D a1) { + tcg_out_insn(s, RRE, MSGR, a0, a2); } else { - tcg_out_insn(s, RRE, MSGR, args[0], args[2]); + tcg_out_insn(s, RRFa, MSGRKC, a0, a1, a2); } break; =20 @@ -3072,12 +3082,16 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGO= pcode op) MULTIPLY SINGLE IMMEDIATE with a signed 32-bit, otherwise we have only MULTIPLY HALFWORD IMMEDIATE, with a signed 16-bit. */ return (HAVE_FACILITY(GEN_INST_EXT) - ? C_O1_I2(r, 0, ri) + ? (HAVE_FACILITY(MISC_INSN_EXT2) + ? C_O1_I2(r, r, ri) + : C_O1_I2(r, 0, ri)) : C_O1_I2(r, 0, rI)); =20 case INDEX_op_mul_i64: return (HAVE_FACILITY(GEN_INST_EXT) - ? C_O1_I2(r, 0, rJ) + ? (HAVE_FACILITY(MISC_INSN_EXT2) + ? C_O1_I2(r, r, rJ) + : C_O1_I2(r, 0, rJ)) : C_O1_I2(r, 0, rI)); =20 case INDEX_op_shl_i32: --=20 2.34.1