From nobody Mon Sep 16 19:11:20 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16676193395536.999805390802521; Fri, 4 Nov 2022 20:35:39 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1or9vs-00080S-Fz; Fri, 04 Nov 2022 23:33:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1or9rm-0004Jd-LA for qemu-devel@nongnu.org; Fri, 04 Nov 2022 23:29:06 -0400 Received: from mail.loongson.cn ([114.242.206.163] helo=loongson.cn) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1or9rj-0006TV-Lv for qemu-devel@nongnu.org; Fri, 04 Nov 2022 23:29:06 -0400 Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8BxLLZ82GVjqpoEAA--.3870S3; Sat, 05 Nov 2022 11:29:00 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.185]) by localhost.localdomain (Coremail) with SMTP id AQAAf8BxtuN52GVjeKENAA--.38334S8; Sat, 05 Nov 2022 11:28:59 +0800 (CST) From: Song Gao To: qemu-devel@nongnu.org Cc: richard.henderson@linaro.org, stefanha@gmail.com Subject: [PULL v3 6/7] target/loongarch: Add exception subcode Date: Sat, 5 Nov 2022 11:28:56 +0800 Message-Id: <20221105032857.3789472-7-gaosong@loongson.cn> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20221105032857.3789472-1-gaosong@loongson.cn> References: <20221105032857.3789472-1-gaosong@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: AQAAf8BxtuN52GVjeKENAA--.38334S8 X-CM-SenderInfo: 5jdr20tqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjvJXoWxXFW8Xr1xJr4rJry5ZFWrKrg_yoWrAr1xpF s2ka47tryYkFZFk34xJa15Kw13W34xJw4xJw15X3yktFy8t340vr4DWw4rJr9xXrZ5J3yx ZF90yryj9wsrCrDanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj qI5I8CrVACY4xI64kE6c02F40Ex7xfYxn0WfASr-VFAUDa7-sFnT9fnUUIcSsGvfJTRUUU b0AFc2x0x2IEx4CE42xK8VAvwI8IcIk0rVWrJVCq3wA2ocxC64kIII0Yj41l84x0c7CEw4 AK67xGY2AK021l84ACjcxK6xIIjxv20xvE14v26ryj6F1UM28EF7xvwVC0I7IYx2IY6xkF 7I0E14v26r4j6F4UM28EF7xvwVC2z280aVAFwI0_Cr0_Gr1UM28EF7xvwVC2z280aVCY1x 0267AKxVW8JVW8Jr1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE 44I27wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E74AGY7Cv6cx26rWlOx8S6xCaFVCjc4 AY6r1j6r4UM4x0Y48IcxkI7VAKI48JMxAIw28IcxkI7VAKI48JMxAIw28IcVCjz48v1sIE Y20_WwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E74 80Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jrv_JF1lIxkGc2Ij64vIr41lIxAIcVC0 I7IYx2IY67AKxVW5JVW7JwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1lIxAIcVCF04 k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r4j6F4UMIIF0xvEx4A2jsIEc7Cj xVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x0zRVWlkUUUUU= Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=gaosong@loongson.cn; helo=loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1667619340295100001 Content-Type: text/plain; charset="utf-8" We need subcodes to distinguish the same excode cs->exception_indexs, such as EXCCODE_ADEF/EXCCODE_ADEM. Signed-off-by: Song Gao Reviewed-by: Richard Henderson Message-ID: <20221101073210.3934280-1-gaosong@loongson.cn> --- target/loongarch/cpu.c | 7 +++-- target/loongarch/cpu.h | 58 ++++++++++++++++++++++-------------------- 2 files changed, 36 insertions(+), 29 deletions(-) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 49393d95d8..b28aaed5ba 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -220,7 +220,10 @@ static void loongarch_cpu_do_interrupt(CPUState *cs) env->CSR_TLBRERA =3D FIELD_DP64(env->CSR_TLBRERA, CSR_TLBRERA, PC, (env->pc >> 2)); } else { - env->CSR_ESTAT =3D FIELD_DP64(env->CSR_ESTAT, CSR_ESTAT, ECODE, ca= use); + env->CSR_ESTAT =3D FIELD_DP64(env->CSR_ESTAT, CSR_ESTAT, ECODE, + EXCODE_MCODE(cause)); + env->CSR_ESTAT =3D FIELD_DP64(env->CSR_ESTAT, CSR_ESTAT, ESUBCODE, + EXCODE_SUBCODE(cause)); env->CSR_PRMD =3D FIELD_DP64(env->CSR_PRMD, CSR_PRMD, PPLV, FIELD_EX64(env->CSR_CRMD, CSR_CRMD, PLV= )); env->CSR_PRMD =3D FIELD_DP64(env->CSR_PRMD, CSR_PRMD, PIE, @@ -257,7 +260,7 @@ static void loongarch_cpu_do_interrupt(CPUState *cs) env->pc =3D env->CSR_TLBRENTRY; } else { env->pc =3D env->CSR_EENTRY; - env->pc +=3D cause * vec_size; + env->pc +=3D EXCODE_MCODE(cause) * vec_size; } qemu_log_mask(CPU_LOG_INT, "%s: PC " TARGET_FMT_lx " ERA " TARGET_FMT_lx diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index dce999aaac..dbce176564 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -75,33 +75,37 @@ FIELD(FCSR0, CAUSE, 24, 5) #define FP_DIV0 8 #define FP_INVALID 16 =20 -#define EXCCODE_EXTERNAL_INT 64 /* plus external interrupt number */ -#define EXCCODE_INT 0 -#define EXCCODE_PIL 1 -#define EXCCODE_PIS 2 -#define EXCCODE_PIF 3 -#define EXCCODE_PME 4 -#define EXCCODE_PNR 5 -#define EXCCODE_PNX 6 -#define EXCCODE_PPI 7 -#define EXCCODE_ADEF 8 /* Different exception subcode */ -#define EXCCODE_ADEM 8 -#define EXCCODE_ALE 9 -#define EXCCODE_BCE 10 -#define EXCCODE_SYS 11 -#define EXCCODE_BRK 12 -#define EXCCODE_INE 13 -#define EXCCODE_IPE 14 -#define EXCCODE_FPD 15 -#define EXCCODE_SXD 16 -#define EXCCODE_ASXD 17 -#define EXCCODE_FPE 18 /* Different exception subcode */ -#define EXCCODE_VFPE 18 -#define EXCCODE_WPEF 19 /* Different exception subcode */ -#define EXCCODE_WPEM 19 -#define EXCCODE_BTD 20 -#define EXCCODE_BTE 21 -#define EXCCODE_DBP 26 /* Reserved subcode used for debug= */ +#define EXCODE(code, subcode) ( ((subcode) << 6) | (code) ) +#define EXCODE_MCODE(code) ( (code) & 0x3f ) +#define EXCODE_SUBCODE(code) ( (code) >> 6 ) + +#define EXCCODE_EXTERNAL_INT 64 /* plus external interrupt numbe= r */ +#define EXCCODE_INT EXCODE(0, 0) +#define EXCCODE_PIL EXCODE(1, 0) +#define EXCCODE_PIS EXCODE(2, 0) +#define EXCCODE_PIF EXCODE(3, 0) +#define EXCCODE_PME EXCODE(4, 0) +#define EXCCODE_PNR EXCODE(5, 0) +#define EXCCODE_PNX EXCODE(6, 0) +#define EXCCODE_PPI EXCODE(7, 0) +#define EXCCODE_ADEF EXCODE(8, 0) /* Different exception s= ubcode */ +#define EXCCODE_ADEM EXCODE(8, 1) +#define EXCCODE_ALE EXCODE(9, 0) +#define EXCCODE_BCE EXCODE(10, 0) +#define EXCCODE_SYS EXCODE(11, 0) +#define EXCCODE_BRK EXCODE(12, 0) +#define EXCCODE_INE EXCODE(13, 0) +#define EXCCODE_IPE EXCODE(14, 0) +#define EXCCODE_FPD EXCODE(15, 0) +#define EXCCODE_SXD EXCODE(16, 0) +#define EXCCODE_ASXD EXCODE(17, 0) +#define EXCCODE_FPE EXCODE(18, 0) /* Different exception = subcode */ +#define EXCCODE_VFPE EXCODE(18, 1) +#define EXCCODE_WPEF EXCODE(19, 0) /* Different exception = subcode */ +#define EXCCODE_WPEM EXCODE(19, 1) +#define EXCCODE_BTD EXCODE(20, 0) +#define EXCCODE_BTE EXCODE(21, 0) +#define EXCCODE_DBP EXCODE(26, 0) /* Reserved subcode use= d for debug */ =20 /* cpucfg[0] bits */ FIELD(CPUCFG0, PRID, 0, 32) --=20 2.31.1