From nobody Wed Feb 11 04:02:39 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1666960541; cv=none; d=zohomail.com; s=zohoarc; b=nei6KxK7wdCdVwy5daUxdrla73GyyeQi0WFoMPmoSShsi6T87SRIPGudHWu3qUB3zDTuG5r6ryV/ttaFGCLBy/dqhbu1RmMaGfk7FMTSaK337FGyCBzjsF+d2GQD77jz0lm2OtvIwpMadDyN/8RRr9IhuTt0d8XoX/NO0RFqaeA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1666960541; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject; bh=NqszKtwi0YXXdx0iWSFUDJDEOg8IoBblvu8lJaEmuhg=; b=Wkzw1uWRSUYk8zVv/zZ7+5XvBw/BZuZa4M0iVoWH5mmHycl6YDOiuGZrzP4Y0t9+6I3Dy5fuhdQ11bdnzhGkkfSaZcDW8XxX7IQi48yeH+zaT50wlB7Ck6fHSMzjSf3PN8mGLApwhHE0q1RSkhTFMh95MCQg4x3t9qf4zC9DhxI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1666960541505390.3524614001582; Fri, 28 Oct 2022 05:35:41 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ooOZb-0000R9-0k; Fri, 28 Oct 2022 08:34:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ooOTH-0004EU-89 for qemu-devel@nongnu.org; Fri, 28 Oct 2022 08:28:23 -0400 Received: from mail-pl1-x631.google.com ([2607:f8b0:4864:20::631]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ooOTE-0003a2-9l for qemu-devel@nongnu.org; Fri, 28 Oct 2022 08:28:22 -0400 Received: by mail-pl1-x631.google.com with SMTP id l2so4688448pld.13 for ; Fri, 28 Oct 2022 05:28:11 -0700 (PDT) Received: from fedora.flets-east.jp ([2400:4050:c360:8200:8ae8:3c4:c0da:7419]) by smtp.gmail.com with ESMTPSA id x3-20020a170902ec8300b00174d9bbeda4sm2948456plg.197.2022.10.28.05.28.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Oct 2022 05:28:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NqszKtwi0YXXdx0iWSFUDJDEOg8IoBblvu8lJaEmuhg=; b=HPBts9OCCcAn4+iuBRdzRVbmM2gdq0y3+ODoy42W6rk7kRXktjdCG6TBFDTSZXvxM8 7I2+jxOaq/Q14NsyCesC7UvtIkXPC9MdaISDGZK+36pUCPhCoheFr7fr68kJbJN30gtn hJdb0IYuiyN3GiXzkcm9vVFlSzacrWGQG5/En8+e3p5krk6m11njknzPzFZQG93n0dvd DXwRQNSZ/S+nT60wQVSsydajF1STjOpqDcUJ7Ps8nmP5ulvDYui4MXrXX4e41q2dwwPi WWVGo4Mj0iZrtk9H+/biWfUUXKO9PLsrwujqkkmd1k3ytYWMfZwdw8+1ic3MRXXBc5Sn vmZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NqszKtwi0YXXdx0iWSFUDJDEOg8IoBblvu8lJaEmuhg=; b=Re9uPGFXywHq+1tHHPz0m8fnIkudDNCsYmA8++0261vpOUECUbAmvirowmSRF4IHSu ooaQssh563G9OoZNO6B529CREgQol0hFTw29g31O0y66RF6J2rLPnrGLcPhHfL5lZNQ2 K/zjYKfyYd9LgWlQSKV9Adk5xIXcA8OtOPJmPKHCkzWANIuMGzxVoBPsY2Ix/voibNPb l/emgwTeUiMQhax56ORsngJP14bEHINogdqgCOSkMQJZVsUCGyzgoZN3I+y7LHcMHNcC r3l3u5zqvwFyzIlnXZjuRPOaD9ny3hmI5p7IQkGnBAOCj/4MS34AbrJoN05u8U6lSAu3 +BCA== X-Gm-Message-State: ACrzQf1OUq5kyt+JVsCMp7gItgJtppCDXh8WgNVCvxyVaSbEshn1i93R dmHn2Z+Vp49a/Qt0XOKmoLtyBA== X-Google-Smtp-Source: AMsMyM4jqafHZVmW1ZVuanZmXJZt4fnt9MDURYWwceAMzfSLurFDlJ4MwXgDJfKPOe243XdkEiX6Vg== X-Received: by 2002:a17:902:da90:b0:185:5537:f388 with SMTP id j16-20020a170902da9000b001855537f388mr57153057plx.113.1666960089928; Fri, 28 Oct 2022 05:28:09 -0700 (PDT) From: Akihiko Odaki To: Cc: Alex Williamson , qemu-devel@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, "Michael S . Tsirkin" , Marcel Apfelbaum , Gerd Hoffmann , Paolo Bonzini , Richard Henderson , Eduardo Habkost , John Snow , Dmitry Fleytman , Jason Wang , Stefan Weil , Keith Busch , Klaus Jensen , Peter Maydell , Andrey Smirnov , Paul Burton , Aleksandar Rikalo , Yan Vugenfirer , Yuri Benditovich , Akihiko Odaki Subject: [PATCH v5 17/17] pci: Remove legacy errp from pci_add_capability Date: Fri, 28 Oct 2022 21:26:29 +0900 Message-Id: <20221028122629.3269-18-akihiko.odaki@daynix.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221028122629.3269-1-akihiko.odaki@daynix.com> References: <20221028122629.3269-1-akihiko.odaki@daynix.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=2607:f8b0:4864:20::631; envelope-from=akihiko.odaki@daynix.com; helo=mail-pl1-x631.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @daynix-com.20210112.gappssmtp.com) X-ZM-MESSAGEID: 1666960542451100001 Content-Type: text/plain; charset="utf-8" Signed-off-by: Akihiko Odaki --- hw/pci/pci.c | 29 +++++++---------------------- include/hw/pci/pci.h | 12 ++---------- 2 files changed, 9 insertions(+), 32 deletions(-) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 8ee2171011..8ff71e4553 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -2513,38 +2513,23 @@ static void pci_del_option_rom(PCIDevice *pdev) } =20 /* - * On success, pci_add_capability_legacy() returns a positive value - * that the offset of the pci capability. - * On failure, it sets an error and returns a negative error - * code. + * pci_add_capability() returns a positive value that the offset of the pci + * capability. */ -int pci_add_capability_legacy(PCIDevice *pdev, uint8_t cap_id, - uint8_t offset, uint8_t size, - Error **errp) +uint8_t pci_add_capability(PCIDevice *pdev, uint8_t cap_id, + uint8_t offset, uint8_t size) { uint8_t *config; - int i, overlapping_cap; + int i; =20 if (!offset) { offset =3D pci_find_space(pdev, size); /* out of PCI config space is programming error */ assert(offset); } else { - /* Verify that capabilities don't overlap. Note: device assignment - * depends on this check to verify that the device is not broken. - * Should never trigger for emulated devices, but it's helpful - * for debugging these. */ + /* Verify that capabilities don't overlap. */ for (i =3D offset; i < offset + size; i++) { - overlapping_cap =3D pci_find_capability_at_offset(pdev, i); - if (overlapping_cap) { - error_setg(errp, "%s:%02x:%02x.%x " - "Attempt to add PCI capability %x at offset " - "%x overlaps existing capability %x at offset %= x", - pci_root_bus_path(pdev), pci_dev_bus_num(pdev), - PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), - cap_id, offset, overlapping_cap, i); - return -EINVAL; - } + assert(!pci_find_capability_at_offset(pdev, i)); } } =20 diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 51fd106f16..2a5d4b329f 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -2,7 +2,6 @@ #define QEMU_PCI_H =20 #include "exec/memory.h" -#include "qapi/error.h" #include "sysemu/dma.h" =20 /* PCI includes legacy ISA access. */ @@ -391,15 +390,8 @@ void pci_register_vga(PCIDevice *pci_dev, MemoryRegion= *mem, void pci_unregister_vga(PCIDevice *pci_dev); pcibus_t pci_get_bar_addr(PCIDevice *pci_dev, int region_num); =20 -int pci_add_capability_legacy(PCIDevice *pdev, uint8_t cap_id, - uint8_t offset, uint8_t size, - Error **errp); - -#define PCI_ADD_CAPABILITY_VA(pdev, cap_id, offset, size, errp, ...) \ - pci_add_capability_legacy(pdev, cap_id, offset, size, errp) - -#define pci_add_capability(...) \ - PCI_ADD_CAPABILITY_VA(__VA_ARGS__, &error_abort) +uint8_t pci_add_capability(PCIDevice *pdev, uint8_t cap_id, + uint8_t offset, uint8_t size); =20 void pci_del_capability(PCIDevice *pci_dev, uint8_t cap_id, uint8_t cap_si= ze); =20 --=20 2.37.3