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Tsirkin" , Marcel Apfelbaum , Gerd Hoffmann , Paolo Bonzini , Richard Henderson , Eduardo Habkost , John Snow , Dmitry Fleytman , Jason Wang , Stefan Weil , Keith Busch , Klaus Jensen , Peter Maydell , Andrey Smirnov , Paul Burton , Aleksandar Rikalo , Yan Vugenfirer , Yuri Benditovich , Akihiko Odaki Subject: [PATCH v5 13/17] pci/slotid: Omit errp for pci_add_capability Date: Fri, 28 Oct 2022 21:26:25 +0900 Message-Id: <20221028122629.3269-14-akihiko.odaki@daynix.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221028122629.3269-1-akihiko.odaki@daynix.com> References: <20221028122629.3269-1-akihiko.odaki@daynix.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=2607:f8b0:4864:20::431; envelope-from=akihiko.odaki@daynix.com; helo=mail-pf1-x431.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @daynix-com.20210112.gappssmtp.com) X-ZM-MESSAGEID: 1666960375268100003 Content-Type: text/plain; charset="utf-8" Omitting errp for pci_add_capability() causes it to abort if capabilities overlap. A caller of slotid_cap_init(), which calls pci_add_capability() in turn, is expected to ensure that will not happen. Signed-off-by: Akihiko Odaki --- hw/pci/slotid_cap.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/hw/pci/slotid_cap.c b/hw/pci/slotid_cap.c index 36d021b4a6..5da8c82133 100644 --- a/hw/pci/slotid_cap.c +++ b/hw/pci/slotid_cap.c @@ -12,7 +12,7 @@ int slotid_cap_init(PCIDevice *d, int nslots, unsigned offset, Error **errp) { - int cap; + uint8_t cap; =20 if (!chassis) { error_setg(errp, "Bridge chassis not specified. Each bridge is req= uired" @@ -24,11 +24,7 @@ int slotid_cap_init(PCIDevice *d, int nslots, return -EINVAL; } =20 - cap =3D pci_add_capability(d, PCI_CAP_ID_SLOTID, offset, - SLOTID_CAP_LENGTH, errp); - if (cap < 0) { - return cap; - } + cap =3D pci_add_capability(d, PCI_CAP_ID_SLOTID, offset, SLOTID_CAP_LE= NGTH); /* We make each chassis unique, this way each bridge is First in Chass= is */ d->config[cap + PCI_SID_ESR] =3D PCI_SID_ESR_FIC | (nslots << SLOTID_NSLOTS_SHIFT); --=20 2.37.3