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a="370174869" X-IronPort-AV: E=Sophos;i="5.95,215,1661842800"; d="scan'208";a="370174869" X-IronPort-AV: E=McAfee;i="6500,9779,10512"; a="877407928" X-IronPort-AV: E=Sophos;i="5.95,215,1661842800"; d="scan'208";a="877407928" From: "Wang, Lei" To: pbonzini@redhat.com Cc: qemu-devel@nongnu.org, dgilbert@redhat.com, berrange@redhat.com, xiaoyao.li@intel.com, yang.zhong@linux.intel.com Subject: [PATCH 1/6] i386: Introduce FeatureWordInfo for AMX CPUID leaf 0x1D and 0x1E Date: Wed, 26 Oct 2022 19:00:31 -0700 Message-Id: <20221027020036.373140-2-lei4.wang@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221027020036.373140-1-lei4.wang@intel.com> References: <20221027020036.373140-1-lei4.wang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=134.134.136.31; envelope-from=lei4.wang@intel.com; helo=mga06.intel.com X-Spam_score_int: -48 X-Spam_score: -4.9 X-Spam_bar: ---- X-Spam_report: (-4.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.515, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, UPPERCASE_50_75=0.008 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1666836200373100005 Content-Type: text/plain; charset="utf-8" CPUID leaf 0x1D and 0x1E enumerate tile and TMUL information for AMX. Introduce FeatureWord FEAT_1D_1_EAX, FEAT_1D_1_EBX, FEAT_1D_1_ECX and FEAT_1E_0_EBX. Thus these features of AMX can be expanded when "-cpu host/max" and can be configured in named CPU model. Signed-off-by: Wang, Lei --- target/i386/cpu.c | 55 +++++++++++++++++++++++++++++++++++++++++++++++ target/i386/cpu.h | 12 +++++++++++ 2 files changed, 67 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 8a11470507..e98780773c 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1002,6 +1002,45 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] =3D= { }, .tcg_features =3D ~0U, }, + [FEAT_1D_1_EAX] =3D { + .type =3D CPUID_FEATURE_WORD, + .cpuid =3D { + .eax =3D 0x1D, + .needs_ecx =3D true, .ecx =3D 1, + .reg =3D R_EAX, + }, + .migratable_flags =3D CPUID_AMX_PALETTE_1_TOTAL_TILE_BYTES_MASK | + CPUID_AMX_PALETTE_1_BYTES_PER_TILE_MASK, + }, + [FEAT_1D_1_EBX] =3D { + .type =3D CPUID_FEATURE_WORD, + .cpuid =3D { + .eax =3D 0x1D, + .needs_ecx =3D true, .ecx =3D 1, + .reg =3D R_EBX, + }, + .migratable_flags =3D CPUID_AMX_PALETTE_1_BYTES_PER_ROW_MASK | + CPUID_AMX_PALETTE_1_MAX_NAMES_MASK, + }, + [FEAT_1D_1_ECX] =3D { + .type =3D CPUID_FEATURE_WORD, + .cpuid =3D { + .eax =3D 0x1D, + .needs_ecx =3D true, .ecx =3D 1, + .reg =3D R_ECX, + }, + .migratable_flags =3D CPUID_AMX_PALETTE_1_MAX_ROWS_MASK, + }, + [FEAT_1E_0_EBX] =3D { + .type =3D CPUID_FEATURE_WORD, + .cpuid =3D { + .eax =3D 0x1E, + .needs_ecx =3D true, .ecx =3D 0, + .reg =3D R_EBX, + }, + .migratable_flags =3D CPUID_AMX_TMUL_MAX_K_MASK | + CPUID_AMX_TMUL_MAX_N_MASK, + }, /*Below are MSR exposed features*/ [FEAT_ARCH_CAPABILITIES] =3D { .type =3D MSR_FEATURE_WORD, @@ -1371,6 +1410,22 @@ static FeatureDep feature_dependencies[] =3D { .from =3D { FEAT_7_0_EBX, CPUID_7_0_EBX_INTEL_PT }, .to =3D { FEAT_14_0_ECX, ~0ull }, }, + { + .from =3D { FEAT_7_0_EDX, CPUID_7_0_EDX_AMX_TILE }, + .to =3D { FEAT_1D_1_EAX, ~0ull }, + }, + { + .from =3D { FEAT_7_0_EDX, CPUID_7_0_EDX_AMX_TILE }, + .to =3D { FEAT_1D_1_EBX, ~0ull }, + }, + { + .from =3D { FEAT_7_0_EDX, CPUID_7_0_EDX_AMX_TILE }, + .to =3D { FEAT_1D_1_ECX, ~0ull }, + }, + { + .from =3D { FEAT_7_0_EDX, CPUID_7_0_EDX_AMX_TILE }, + .to =3D { FEAT_1E_0_EBX, ~0ull }, + }, { .from =3D { FEAT_8000_0001_EDX, CPUID_EXT2_RDTSCP }, .to =3D { FEAT_VMX_SECONDARY_CTLS, VMX_SECONDARY_EXEC_RDTSCP }, diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 7edf5dfac3..1c90fb6c9d 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -583,6 +583,14 @@ typedef enum X86Seg { XSTATE_Hi16_ZMM_MASK | XSTATE_PKRU_MASK |= \ XSTATE_XTILE_CFG_MASK | XSTATE_XTILE_DATA= _MASK) =20 +#define CPUID_AMX_PALETTE_1_TOTAL_TILE_BYTES_MASK 0xffffU +#define CPUID_AMX_PALETTE_1_BYTES_PER_TILE_MASK (0xffffU << 16) +#define CPUID_AMX_PALETTE_1_BYTES_PER_ROW_MASK 0xffffU +#define CPUID_AMX_PALETTE_1_MAX_NAMES_MASK (0xffffU << 16) +#define CPUID_AMX_PALETTE_1_MAX_ROWS_MASK 0xffffU +#define CPUID_AMX_TMUL_MAX_K_MASK 0xffU +#define CPUID_AMX_TMUL_MAX_N_MASK (0xffffU << 8) + /* CPUID feature words */ typedef enum FeatureWord { FEAT_1_EDX, /* CPUID[1].EDX */ @@ -603,6 +611,10 @@ typedef enum FeatureWord { FEAT_6_EAX, /* CPUID[6].EAX */ FEAT_XSAVE_XCR0_LO, /* CPUID[EAX=3D0xd,ECX=3D0].EAX */ FEAT_XSAVE_XCR0_HI, /* CPUID[EAX=3D0xd,ECX=3D0].EDX */ + FEAT_1D_1_EAX, /* CPUID[EAX=3D0x1d,ECX=3D1].EAX */ + FEAT_1D_1_EBX, /* CPUID[EAX=3D0x1d,ECX=3D1].EBX */ + FEAT_1D_1_ECX, /* CPUID[EAX=3D0x1d,ECX=3D1].ECX */ + FEAT_1E_0_EBX, /* CPUID[EAX=3D0x1e,ECX=3D0].EBX */ FEAT_ARCH_CAPABILITIES, FEAT_CORE_CAPABILITY, FEAT_PERF_CAPABILITIES, --=20 2.34.1