From nobody Wed Apr 16 22:45:54 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1666751093; cv=none; d=zohomail.com; s=zohoarc; b=ms1obXxqoxqc2KTAidPU/+QvYr2dWIvIZM5cgZq2ThTKqhnlF474uJde9Sh1j1jyciDoaTWrIALcLF+WOkuAuLKM4Br9CDzqBEPAeNTIFaTOtokVeDmZo/DcS+N0/5ogJCUIXewQhrjhISvEyTb/g9wh60p7Xq6fUTK3/3LFglc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1666751093; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Ov3aeYf9Oo0htgsB4UrYWgNfrt2xvA4eqzI8BqeKPbs=; b=EhYxzKxOkS/MvF/G6WqnqVD/tb6YCrAEeKGNRpGO4KTKY13Rm8lbGbqLOiNZZRuBOC/dR8bi3UAVoGRQKthNN3CPVNSFL4c+51uJVZyy4G6e9mrzzjr2j0P9Fy4kqQ43BsnUyZg7/xm7ez1zRUKQ0XtQtsnz42mPNyQVl6f9C8M= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1666751093612457.0596308015222; Tue, 25 Oct 2022 19:24:53 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1onVuH-0005H5-Mc; Tue, 25 Oct 2022 22:12:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1onVuG-0005Bp-1T for qemu-devel@nongnu.org; Tue, 25 Oct 2022 22:12:36 -0400 Received: from mail-pg1-x531.google.com ([2607:f8b0:4864:20::531]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1onVuE-00019J-8i for qemu-devel@nongnu.org; Tue, 25 Oct 2022 22:12:35 -0400 Received: by mail-pg1-x531.google.com with SMTP id 20so13457922pgc.5 for ; Tue, 25 Oct 2022 19:12:33 -0700 (PDT) Received: from stoup.hotspotlogin.services ([103.100.225.182]) by smtp.gmail.com with ESMTPSA id o29-20020a635d5d000000b0043c9da02729sm1897833pgm.6.2022.10.25.19.12.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Oct 2022 19:12:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Ov3aeYf9Oo0htgsB4UrYWgNfrt2xvA4eqzI8BqeKPbs=; b=pLnUxxiO+GAbNyYkn/vCTvFwd3giqz1rQ1ZKx0C9rb0hZE/pWu3cIgUSoSMFrTMyyj velu/smSxVo6Pb8P08nF1pJkRVk/Rmo7ArBweIJ732N0z4uL3frypgi9XE+jpWH9l6Rx GpaFOHn2ct3TediaFUb/iGtePhcaLwUHwoY919VUTfvXefpd1tYg7b3cT4j3Wq5yxEzH Od6w5AWkoArJwJwoKsjzE8rGdnSmP6Fke/j2jwlMt14duAJlyjRyFx5qOrlX0fjbwnXp BpZVzE/HoybdOxKABjAJlS3KDldWUAqyYhGzstMf9E8MsO6IKAaSoqA/5zjFS5n9nLOf V8Fg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ov3aeYf9Oo0htgsB4UrYWgNfrt2xvA4eqzI8BqeKPbs=; b=b6stdoiVFBLa6jNgNfiNyS4mp1ttfrKWk082S8IJGlzfezyNmWVslzM0LXs86aS/d/ 44M71Cm46x/MapyjC2Ce03Sl6Yiv5uBNlF7BGBFakbQQldMBFLJk9Hn0Zg6uQAILBtJ1 eNdRYbmzzC7ploenMJ4N0YSJQICGyaeAI3QhZb08k2IjqrCIV1YQrV1QZE3duNoSsrZ+ QhtBWAOWTqwx0SwlsZfZHAY6YrlMinpTD+xD2uajrX0ZVNMBEeGuZNO0TRpjrXlL93MR 8hq0jg4au5meOMh0qsoz386BauVfWTtsfHAjrTXax8gcjWVb2bdwcYWUJafV/9OU9yhX s46w== X-Gm-Message-State: ACrzQf2ZqilUb9ZIfmHl64D8XJOFax/I3mHmkpm4vvepaP+ZoC76e1wG LDyyq4VLraCcN44wXi3B37ncSaBF+JQfud/j X-Google-Smtp-Source: AMsMyM6Tp1n/MD9nWtMUIrFxb0dCCjYE3pXn3O4dKzfpr8xZrfl1Endy6SUSFpZ1qEE75XRBYURBvg== X-Received: by 2002:a05:6a00:27a1:b0:566:8937:27c2 with SMTP id bd33-20020a056a0027a100b00566893727c2mr40959692pfb.24.1666750353465; Tue, 25 Oct 2022 19:12:33 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: stefanha@redhat.com, Claudio Fontana Subject: [PULL 25/47] accel/tcg: Add restore_state_to_opc to TCGCPUOps Date: Wed, 26 Oct 2022 12:10:54 +1000 Message-Id: <20221026021116.1988449-26-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221026021116.1988449-1-richard.henderson@linaro.org> References: <20221026021116.1988449-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x531.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1666751095288100005 Content-Type: text/plain; charset="utf-8" Add a tcg_ops hook to replace the restore_state_to_opc function call. Because these generic hooks cannot depend on target-specific types, temporarily, copy the current target_ulong data[] into uint64_t d64[]. Reviewed-by: Claudio Fontana Signed-off-by: Richard Henderson --- include/exec/exec-all.h | 2 +- include/hw/core/tcg-cpu-ops.h | 11 +++++++++++ accel/tcg/translate-all.c | 24 ++++++++++++++++++++++-- 3 files changed, 34 insertions(+), 3 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 5ae484e34d..3b5e84240b 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -40,7 +40,7 @@ typedef ram_addr_t tb_page_addr_t; #endif =20 void restore_state_to_opc(CPUArchState *env, TranslationBlock *tb, - target_ulong *data); + target_ulong *data) __attribute__((weak)); =20 /** * cpu_restore_state: diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index 78c6c6635d..20e3c0ffbb 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -31,6 +31,17 @@ struct TCGCPUOps { * function to restore all the state, and register it here. */ void (*synchronize_from_tb)(CPUState *cpu, const TranslationBlock *tb); + /** + * @restore_state_to_opc: Synchronize state from INDEX_op_start_insn + * + * This is called when we unwind state in the middle of a TB, + * usually before raising an exception. Set all part of the CPU + * state which are tracked insn-by-insn in the target-specific + * arguments to start_insn, passed as @data. + */ + void (*restore_state_to_opc)(CPUState *cpu, const TranslationBlock *tb, + const uint64_t *data); + /** @cpu_exec_enter: Callback for cpu_exec preparation */ void (*cpu_exec_enter)(CPUState *cpu); /** @cpu_exec_exit: Callback for cpu_exec cleanup */ diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 433fa247f4..4d8783efc7 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -256,7 +256,6 @@ int cpu_restore_state_from_tb(CPUState *cpu, Translatio= nBlock *tb, { target_ulong data[TARGET_INSN_START_WORDS]; uintptr_t host_pc =3D (uintptr_t)tb->tc.ptr; - CPUArchState *env =3D cpu->env_ptr; const uint8_t *p =3D tb->tc.ptr + tb->tc.size; int i, j, num_insns =3D tb->icount; #ifdef CONFIG_PROFILER @@ -295,7 +294,20 @@ int cpu_restore_state_from_tb(CPUState *cpu, Translati= onBlock *tb, and shift if to the number of actually executed instructions */ cpu_neg(cpu)->icount_decr.u16.low +=3D num_insns - i; } - restore_state_to_opc(env, tb, data); + + { + const struct TCGCPUOps *ops =3D cpu->cc->tcg_ops; + __typeof(ops->restore_state_to_opc) restore =3D ops->restore_state= _to_opc; + if (restore) { + uint64_t d64[TARGET_INSN_START_WORDS]; + for (i =3D 0; i < TARGET_INSN_START_WORDS; ++i) { + d64[i] =3D data[i]; + } + restore(cpu, tb, d64); + } else { + restore_state_to_opc(cpu->env_ptr, tb, data); + } + } =20 #ifdef CONFIG_PROFILER qatomic_set(&prof->restore_time, @@ -307,6 +319,14 @@ int cpu_restore_state_from_tb(CPUState *cpu, Translati= onBlock *tb, =20 bool cpu_restore_state(CPUState *cpu, uintptr_t host_pc, bool will_exit) { + /* + * The pc update associated with restore without exit will + * break the relative pc adjustments performed by TARGET_TB_PCREL. + */ + if (TARGET_TB_PCREL) { + assert(will_exit); + } + /* * The host_pc has to be in the rx region of the code buffer. * If it is not we will not be able to resolve it here. --=20 2.34.1