From nobody Tue Feb 10 11:14:50 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1665523872508925.7225971007216; Tue, 11 Oct 2022 14:31:12 -0700 (PDT) Received: from localhost ([::1]:45302 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oiMqE-00014C-7j for importer@patchew.org; Tue, 11 Oct 2022 17:31:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38752) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oiMHI-0005wD-4B; Tue, 11 Oct 2022 16:55:05 -0400 Received: from [200.168.210.66] (port=22547 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oiMHG-0002M1-CP; Tue, 11 Oct 2022 16:55:03 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Tue, 11 Oct 2022 17:48:44 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 0FC028001F1; Tue, 11 Oct 2022 17:48:44 -0300 (-03) From: Matheus Ferst To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: clg@kaod.org, danielhb413@gmail.com, david@gibson.dropbear.id.au, groug@kaod.org, fbarrat@linux.ibm.com, alex.bennee@linaro.org, farosas@linux.ibm.com, Matheus Ferst Subject: [PATCH v3 25/29] target/ppc: add power-saving interrupt masking logic to p7_next_unmasked_interrupt Date: Tue, 11 Oct 2022 17:48:25 -0300 Message-Id: <20221011204829.1641124-26-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221011204829.1641124-1-matheus.ferst@eldorado.org.br> References: <20221011204829.1641124-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 11 Oct 2022 20:48:44.0328 (UTC) FILETIME=[DA44AA80:01D8DDB2] X-Host-Lookup-Failed: Reverse DNS lookup failed for 200.168.210.66 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=200.168.210.66; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1665523874245100001 Content-Type: text/plain; charset="utf-8" Export p7_interrupt_powersave and use it in p7_next_unmasked_interrupt. Signed-off-by: Matheus Ferst Reviewed-by: Fabiano Rosas --- target/ppc/cpu_init.c | 2 +- target/ppc/excp_helper.c | 24 ++++++++++++------------ target/ppc/internal.h | 1 + 3 files changed, 14 insertions(+), 13 deletions(-) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 53a87c379c..0adc866485 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -5960,7 +5960,7 @@ static bool ppc_pvr_match_power7(PowerPCCPUClass *pcc= , uint32_t pvr, bool best) return true; } =20 -static int p7_interrupt_powersave(CPUPPCState *env) +int p7_interrupt_powersave(CPUPPCState *env) { if ((env->pending_interrupts & PPC_INTERRUPT_EXT) && (env->spr[SPR_LPCR] & LPCR_P7_PECE0)) { diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 1c373c1a7c..3e8a368d01 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -1687,10 +1687,18 @@ void ppc_cpu_do_interrupt(CPUState *cs) =20 static int p7_next_unmasked_interrupt(CPUPPCState *env) { - bool async_deliver; + PowerPCCPU *cpu =3D env_archcpu(env); + CPUState *cs =3D CPU(cpu); + /* Ignore MSR[EE] when coming out of some power management states */ + bool msr_ee =3D FIELD_EX64(env->msr, MSR, EE) || env->resume_as_sreset; =20 assert((env->pending_interrupts & P7_UNUSED_INTERRUPTS) =3D=3D 0); =20 + if (cs->halted) { + /* LPCR[PECE] controls which interrupts can exit power-saving mode= */ + return p7_interrupt_powersave(env); + } + /* Machine check exception */ if (env->pending_interrupts & PPC_INTERRUPT_MCK) { return PPC_INTERRUPT_MCK; @@ -1702,19 +1710,11 @@ static int p7_next_unmasked_interrupt(CPUPPCState *= env) } #endif =20 - /* - * For interrupts that gate on MSR:EE, we need to do something a - * bit more subtle, as we need to let them through even when EE is - * clear when coming out of some power management states (in order - * for them to become a 0x100). - */ - async_deliver =3D FIELD_EX64(env->msr, MSR, EE) || env->resume_as_sres= et; - /* Hypervisor decrementer exception */ if (env->pending_interrupts & PPC_INTERRUPT_HDECR) { /* LPCR will be clear when not supported so this will work */ bool hdice =3D !!(env->spr[SPR_LPCR] & LPCR_HDICE); - if ((async_deliver || !FIELD_EX64_HV(env->msr)) && hdice) { + if ((msr_ee || !FIELD_EX64_HV(env->msr)) && hdice) { /* HDEC clears on delivery */ return PPC_INTERRUPT_HDECR; } @@ -1725,13 +1725,13 @@ static int p7_next_unmasked_interrupt(CPUPPCState *= env) bool lpes0 =3D !!(env->spr[SPR_LPCR] & LPCR_LPES0); bool heic =3D !!(env->spr[SPR_LPCR] & LPCR_HEIC); /* HEIC blocks delivery to the hypervisor */ - if ((async_deliver && !(heic && FIELD_EX64_HV(env->msr) && + if ((msr_ee && !(heic && FIELD_EX64_HV(env->msr) && !FIELD_EX64(env->msr, MSR, PR))) || (env->has_hv_mode && !FIELD_EX64_HV(env->msr) && !lpes0)) { return PPC_INTERRUPT_EXT; } } - if (async_deliver !=3D 0) { + if (msr_ee !=3D 0) { /* Decrementer exception */ if (env->pending_interrupts & PPC_INTERRUPT_DECR) { return PPC_INTERRUPT_DECR; diff --git a/target/ppc/internal.h b/target/ppc/internal.h index 9069874adb..25827ebf6f 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -309,6 +309,7 @@ static inline int ger_pack_masks(int pmsk, int ymsk, in= t xmsk) #if defined(TARGET_PPC64) int p9_interrupt_powersave(CPUPPCState *env); int p8_interrupt_powersave(CPUPPCState *env); +int p7_interrupt_powersave(CPUPPCState *env); #endif =20 #endif /* PPC_INTERNAL_H */ --=20 2.25.1