From nobody Tue Feb 10 11:14:50 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1665523566434326.66163723108934; Tue, 11 Oct 2022 14:26:06 -0700 (PDT) Received: from localhost ([::1]:40850 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oiMlI-0002c4-Ue for importer@patchew.org; Tue, 11 Oct 2022 17:26:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50404) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oiMEO-0001et-3k; Tue, 11 Oct 2022 16:52:15 -0400 Received: from [200.168.210.66] (port=21064 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oiMEM-00029j-HN; Tue, 11 Oct 2022 16:52:03 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Tue, 11 Oct 2022 17:48:42 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 819FD800631; Tue, 11 Oct 2022 17:48:42 -0300 (-03) From: Matheus Ferst To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: clg@kaod.org, danielhb413@gmail.com, david@gibson.dropbear.id.au, groug@kaod.org, fbarrat@linux.ibm.com, alex.bennee@linaro.org, farosas@linux.ibm.com, Matheus Ferst Subject: [PATCH v3 13/29] target/ppc: remove unused interrupts from p8_next_unmasked_interrupt Date: Tue, 11 Oct 2022 17:48:13 -0300 Message-Id: <20221011204829.1641124-14-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221011204829.1641124-1-matheus.ferst@eldorado.org.br> References: <20221011204829.1641124-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 11 Oct 2022 20:48:42.0813 (UTC) FILETIME=[D95D7ED0:01D8DDB2] X-Host-Lookup-Failed: Reverse DNS lookup failed for 200.168.210.66 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=200.168.210.66; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1665523568416100001 Content-Type: text/plain; charset="utf-8" Remove the following unused interrupts from the POWER8 interrupt masking method: - PPC_INTERRUPT_RESET: only raised for 6xx, 7xx, 970, and POWER5p; - Debug Interrupt: removed in Power ISA v2.07; - Hypervisor Virtualization: introduced in Power ISA v3.0; - Critical Input, Watchdog Timer, and Fixed Interval Timer: only defined for embedded CPUs; - Critical Doorbell: processor does not implement the "Embedded.Processor Control" category; - Programmable Interval Timer: 40x-only; - PPC_INTERRUPT_THERM: only raised for 970 and POWER5p; Signed-off-by: Matheus Ferst Reviewed-by: Fabiano Rosas --- v3: - Keep Hypervisor and Privileged Doorbell interrupts, the category for processor control instruction became "Embedded.Processor Control" or "Server" on Power ISA v2.07, so the interrupts are still necessary; - Fixed method name in subject. --- target/ppc/excp_helper.c | 51 ++++++---------------------------------- 1 file changed, 7 insertions(+), 44 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 19d352a1b2..9bdc87aa61 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -1679,24 +1679,21 @@ void ppc_cpu_do_interrupt(CPUState *cs) } =20 #if defined(TARGET_PPC64) +#define P8_UNUSED_INTERRUPTS \ + (PPC_INTERRUPT_RESET | PPC_INTERRUPT_DEBUG | PPC_INTERRUPT_HVIRT | \ + PPC_INTERRUPT_CEXT | PPC_INTERRUPT_WDT | PPC_INTERRUPT_CDOORBELL | \ + PPC_INTERRUPT_FIT | PPC_INTERRUPT_PIT | PPC_INTERRUPT_THERM) + static int p8_next_unmasked_interrupt(CPUPPCState *env) { bool async_deliver; =20 - /* External reset */ - if (env->pending_interrupts & PPC_INTERRUPT_RESET) { - return PPC_INTERRUPT_RESET; - } + assert((env->pending_interrupts & P8_UNUSED_INTERRUPTS) =3D=3D 0); + /* Machine check exception */ if (env->pending_interrupts & PPC_INTERRUPT_MCK) { return PPC_INTERRUPT_MCK; } -#if 0 /* TODO */ - /* External debug exception */ - if (env->pending_interrupts & PPC_INTERRUPT_DEBUG) { - return PPC_INTERRUPT_DEBUG; - } -#endif =20 /* * For interrupts that gate on MSR:EE, we need to do something a @@ -1716,15 +1713,6 @@ static int p8_next_unmasked_interrupt(CPUPPCState *e= nv) } } =20 - /* Hypervisor virtualization interrupt */ - if (env->pending_interrupts & PPC_INTERRUPT_HVIRT) { - /* LPCR will be clear when not supported so this will work */ - bool hvice =3D !!(env->spr[SPR_LPCR] & LPCR_HVICE); - if ((async_deliver || !FIELD_EX64_HV(env->msr)) && hvice) { - return PPC_INTERRUPT_HVIRT; - } - } - /* External interrupt can ignore MSR:EE under some circumstances */ if (env->pending_interrupts & PPC_INTERRUPT_EXT) { bool lpes0 =3D !!(env->spr[SPR_LPCR] & LPCR_LPES0); @@ -1736,28 +1724,7 @@ static int p8_next_unmasked_interrupt(CPUPPCState *e= nv) return PPC_INTERRUPT_EXT; } } - if (FIELD_EX64(env->msr, MSR, CE)) { - /* External critical interrupt */ - if (env->pending_interrupts & PPC_INTERRUPT_CEXT) { - return PPC_INTERRUPT_CEXT; - } - } if (async_deliver !=3D 0) { - /* Watchdog timer on embedded PowerPC */ - if (env->pending_interrupts & PPC_INTERRUPT_WDT) { - return PPC_INTERRUPT_WDT; - } - if (env->pending_interrupts & PPC_INTERRUPT_CDOORBELL) { - return PPC_INTERRUPT_CDOORBELL; - } - /* Fixed interval timer on embedded PowerPC */ - if (env->pending_interrupts & PPC_INTERRUPT_FIT) { - return PPC_INTERRUPT_FIT; - } - /* Programmable interval timer on embedded PowerPC */ - if (env->pending_interrupts & PPC_INTERRUPT_PIT) { - return PPC_INTERRUPT_PIT; - } /* Decrementer exception */ if (env->pending_interrupts & PPC_INTERRUPT_DECR) { return PPC_INTERRUPT_DECR; @@ -1771,10 +1738,6 @@ static int p8_next_unmasked_interrupt(CPUPPCState *e= nv) if (env->pending_interrupts & PPC_INTERRUPT_PERFM) { return PPC_INTERRUPT_PERFM; } - /* Thermal interrupt */ - if (env->pending_interrupts & PPC_INTERRUPT_THERM) { - return PPC_INTERRUPT_THERM; - } /* EBB exception */ if (env->pending_interrupts & PPC_INTERRUPT_EBB) { /* --=20 2.25.1