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([2602:47:d49d:ec01:5aa4:aba1:1c91:a9b7]) by smtp.gmail.com with ESMTPSA id o74-20020a62cd4d000000b0055f209690c0sm7663567pfg.50.2022.10.10.20.19.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Oct 2022 20:19:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=n9Z+kZUU1DH+gId3ANvvv1sspQkR6K8eMCHwpMHk7cU=; b=rqhjFnVWtZoo9ZEIi2g/V+/xLiXbQjbvZTSIwOY5Q5Jov3LPxEiGZ4JeYTf0PvYIvp rbu6mX0iU3L0Q2bSq+loPSQ2A0x3OWXzKAgh+/FppLPzcrURF80DC8TeJkru+KVM1pw8 rKKqonjzyZ+l8qhI9TP/sLmecnmtrZpKvACKnXQx2StpRofNdF1dGZ5gauNm+J2SCN5T EpZYpeIpT2MXkVPDhYJAFu/y4NKShNDQ36IAMgKEE1GxqId5FVUz5XPke9ikvZ1D+PAS GgajYQkR3hCUZXfxjVfVh+a8xJ/cOy3/1IEAEJLSyuYUnaMg3oFbWpDWb7j/85iNYhzq JF+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=n9Z+kZUU1DH+gId3ANvvv1sspQkR6K8eMCHwpMHk7cU=; b=aywjPPccVel0Ct58JNufssf5d1rBJ+thPTWKnX4ZexYlaKNQk1R8G9NMNKdyfmrRlq bVoSQXra7PzXOubySrYNgFnv2DBvkb9Ksj2bRC/JEQZEq87rMXd0u4clI9aGx5amNj3B KQ9xwZciwmHK0Itihc1OfcjPZkopGwrYF3ThZVlVTD668E0QMhYD6Eov5/+fNpnwSqsS Ph2bHOlvAM/6aFzpeEumf53N+irJDmMIpSOX7pTTjbz6cK6JWSl8tAdbtSCSuInTkcpm Eo3cgKsKHEBIjj9SKnUX+r4kTXCmcaLAwezAylquBS8Tgu4QVdoapOFEOmQ/0eeo5i3O KE4w== X-Gm-Message-State: ACrzQf1pS/+5N2DsaHolti52rPGUXSSWdxu5BA80iujR09ArmX5jK7GX BIMQiLnJfpwrTImw72v2h1zd146tvsvoaA== X-Google-Smtp-Source: AMsMyM7S0/flc1QzRDsr0VikZAFZwYY+aZIy6oYpF7IsHeGmk6Q8PeLw/aIqFx3nP+a7MrfFMoWiiw== X-Received: by 2002:a17:902:ce12:b0:17a:3e76:8568 with SMTP id k18-20020a170902ce1200b0017a3e768568mr22405431plg.11.1665458377307; Mon, 10 Oct 2022 20:19:37 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH v4 13/24] target/arm: Add ptw_idx to S1Translate Date: Mon, 10 Oct 2022 20:19:00 -0700 Message-Id: <20221011031911.2408754-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221011031911.2408754-1-richard.henderson@linaro.org> References: <20221011031911.2408754-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1665458983864100001 Content-Type: text/plain; charset="utf-8" Hoist the computation of the mmu_idx for the ptw up to get_phys_addr_with_struct and get_phys_addr_twostage. This removes the duplicate check for stage2 disabled from the middle of the walk, performing it only once. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/ptw.c | 53 ++++++++++++++++++++++++++++++++++++++---------- 1 file changed, 42 insertions(+), 11 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 6c5ed56a10..b2bfcfde9a 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -17,6 +17,7 @@ =20 typedef struct S1Translate { ARMMMUIdx in_mmu_idx; + ARMMMUIdx in_ptw_idx; bool in_secure; bool in_debug; bool out_secure; @@ -233,17 +234,12 @@ static bool S1_ptw_translate(CPUARMState *env, S1Tran= slate *ptw, { bool is_secure =3D ptw->in_secure; ARMMMUIdx mmu_idx =3D ptw->in_mmu_idx; - ARMMMUIdx s2_mmu_idx =3D is_secure ? ARMMMUIdx_Stage2_S : ARMMMUIdx_St= age2; - bool s2_phys =3D false; + ARMMMUIdx s2_mmu_idx =3D ptw->in_ptw_idx; + bool s2_phys =3D s2_mmu_idx =3D=3D ARMMMUIdx_Phys_S || + s2_mmu_idx =3D=3D ARMMMUIdx_Phys_NS; uint8_t pte_attrs; bool pte_secure; =20 - if (!arm_mmu_idx_is_stage1_of_2(mmu_idx) - || regime_translation_disabled(env, s2_mmu_idx, is_secure)) { - s2_mmu_idx =3D is_secure ? ARMMMUIdx_Phys_S : ARMMMUIdx_Phys_NS; - s2_phys =3D true; - } - if (unlikely(ptw->in_debug)) { /* * From gdbstub, do not use softmmu so that we don't modify the @@ -256,10 +252,12 @@ static bool S1_ptw_translate(CPUARMState *env, S1Tran= slate *ptw, } else { S1Translate s2ptw =3D { .in_mmu_idx =3D s2_mmu_idx, + .in_ptw_idx =3D is_secure ? ARMMMUIdx_Phys_S : ARMMMUIdx_P= hys_NS, .in_secure =3D is_secure, .in_debug =3D true, }; GetPhysAddrResult s2 =3D { }; + if (!get_phys_addr_lpae(env, &s2ptw, addr, MMU_DATA_LOAD, false, &s2, fi)) { goto fail; @@ -1283,7 +1281,11 @@ static bool get_phys_addr_lpae(CPUARMState *env, S1T= ranslate *ptw, descaddr |=3D (address >> (stride * (4 - level))) & indexmask; descaddr &=3D ~7ULL; nstable =3D extract32(tableattrs, 4, 1); - ptw->in_secure =3D !nstable; + if (!nstable) { + /* Stage2_S -> Stage2 or Phys_S -> Phys_NS */ + ptw->in_ptw_idx &=3D ~1; + ptw->in_secure =3D false; + } descriptor =3D arm_ldq_ptw(env, ptw, descaddr, fi); if (fi->type !=3D ARMFault_None) { goto do_fault; @@ -2470,6 +2472,7 @@ static bool get_phys_addr_twostage(CPUARMState *env, = S1Translate *ptw, =20 is_el0 =3D ptw->in_mmu_idx =3D=3D ARMMMUIdx_Stage1_E0; ptw->in_mmu_idx =3D s2walk_secure ? ARMMMUIdx_Stage2_S : ARMMMUIdx_Sta= ge2; + ptw->in_ptw_idx =3D s2walk_secure ? ARMMMUIdx_Phys_S : ARMMMUIdx_Phys_= NS; ptw->in_secure =3D s2walk_secure; =20 /* @@ -2529,10 +2532,32 @@ static bool get_phys_addr_with_struct(CPUARMState *= env, S1Translate *ptw, ARMMMUFaultInfo *fi) { ARMMMUIdx mmu_idx =3D ptw->in_mmu_idx; - ARMMMUIdx s1_mmu_idx =3D stage_1_mmu_idx(mmu_idx); bool is_secure =3D ptw->in_secure; + ARMMMUIdx s1_mmu_idx; =20 - if (mmu_idx !=3D s1_mmu_idx) { + switch (mmu_idx) { + case ARMMMUIdx_Phys_S: + case ARMMMUIdx_Phys_NS: + /* Checking Phys early avoids special casing later vs regime_el. */ + return get_phys_addr_disabled(env, address, access_type, mmu_idx, + is_secure, result, fi); + + case ARMMMUIdx_Stage1_E0: + case ARMMMUIdx_Stage1_E1: + case ARMMMUIdx_Stage1_E1_PAN: + /* First stage lookup uses second stage for ptw. */ + ptw->in_ptw_idx =3D is_secure ? ARMMMUIdx_Stage2_S : ARMMMUIdx_Sta= ge2; + break; + + case ARMMMUIdx_E10_0: + s1_mmu_idx =3D ARMMMUIdx_Stage1_E0; + goto do_twostage; + case ARMMMUIdx_E10_1: + s1_mmu_idx =3D ARMMMUIdx_Stage1_E1; + goto do_twostage; + case ARMMMUIdx_E10_1_PAN: + s1_mmu_idx =3D ARMMMUIdx_Stage1_E1_PAN; + do_twostage: /* * Call ourselves recursively to do the stage 1 and then stage 2 * translations if mmu_idx is a two-stage regime, and EL2 present. @@ -2543,6 +2568,12 @@ static bool get_phys_addr_with_struct(CPUARMState *e= nv, S1Translate *ptw, return get_phys_addr_twostage(env, ptw, address, access_type, result, fi); } + /* fall through */ + + default: + /* Single stage and second stage uses physical for ptw. */ + ptw->in_ptw_idx =3D is_secure ? ARMMMUIdx_Phys_S : ARMMMUIdx_Phys_= NS; + break; } =20 /* --=20 2.34.1