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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id u6-20020adfed46000000b0022e04bfa661sm9037054wro.59.2022.10.10.07.27.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Oct 2022 07:27:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=LdE7Yti6FxQSUdCITEyW9uuJhLKh/sdf2KHare74vR0=; b=aFQEuFHisonfMCGI5FQjrVwCx5akThnTiL3cOTUP6MDy+JwuaY9vxnbq7nYuljtg2g PgR1iQNV/lbwaVqbcV2oPzwgbgWVullEjVE16qqq1H/d+RcnwF+FdP65Hmnugyo6aBgV 3entSGfjdvDpVY4Fi1zEgMabgppWAfoTelY2TvW+oL+6tscFlTzN4awbqOWZDq3dLc8i rj8VwKBbzsNmaQKmY/Ms64zL5mb4/32QjTwCUhxPHtF1P4Bw7rmkcJH5V/6yyCx7BW9y L0DiREGwBf3TNPmJiFEvI/EMqtLntnrs4rslqsBz6JCSEGofcyV7P5Q+giDWikP8r0Td aiLA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LdE7Yti6FxQSUdCITEyW9uuJhLKh/sdf2KHare74vR0=; b=yin5HEQw0gEDvGxkXAcvLig+xDo2VQ7ajEHd0HFjbedbypi0/xOVyZM4gGZMiRYhEq askGKFOAMc0ovh41hbPgAVnIm9r8XJnd6WKGks3Q4sl28/58q7D6peqyIJfuzCkaAjsr wTg6dcLfddymi2y5Xa0ijm9ZFaVD+GsHYE6V71o0qcwwQHmHiGqFS0gA/zukIUOTix4D eAHcC3f7FWZvjgx2WivKAIZPgWQtsvVMvBm/mXoI5WXnrPk5f8OVGjILOceooYdF/0dF QSwBz+BLmAokxmaJ/2A00vyxxdsB9RQ7oVV8FmecMNoJDxTOhRAXSZsEw7sUfgOM/BVV /8Lg== X-Gm-Message-State: ACrzQf3cXkP1cE9/EOqtsvMRJto1VelOuzCTmo2rhPdRGt16DFw5FRIf Qo8ZEotJ3QIND13EJeEsy5lKJuyYwQb0LA== X-Google-Smtp-Source: AMsMyM4zFsUvxN6nAPuwWYL3K/zmKhr9UOZ0/t0ouZ/7WVlIHr46D2+Z3ja/vCZ48buZHl9/3FX/rg== X-Received: by 2002:a05:6000:186e:b0:22e:5dd3:e32a with SMTP id d14-20020a056000186e00b0022e5dd3e32amr11749231wri.167.1665412074389; Mon, 10 Oct 2022 07:27:54 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 21/28] target/arm: Fix ATS12NSO* from S PL1 Date: Mon, 10 Oct 2022 15:27:23 +0100 Message-Id: <20221010142730.502083-22-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221010142730.502083-1-peter.maydell@linaro.org> References: <20221010142730.502083-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1665413759991100001 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Use arm_hcr_el2_eff_secstate instead of arm_hcr_el2_eff, so that we use is_secure instead of the current security state. These AT* operations have been broken since arm_hcr_el2_eff gained a check for "el2 enabled" for Secure EL2. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20221001162318.153420-18-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/ptw.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index b4fd4d3fac1..a589cec8e36 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -146,7 +146,7 @@ static bool regime_translation_disabled(CPUARMState *en= v, ARMMMUIdx mmu_idx, } } =20 - hcr_el2 =3D arm_hcr_el2_eff(env); + hcr_el2 =3D arm_hcr_el2_eff_secstate(env, is_secure); =20 switch (mmu_idx) { case ARMMMUIdx_Stage2: @@ -230,7 +230,7 @@ static hwaddr S1_ptw_translate(CPUARMState *env, ARMMMU= Idx mmu_idx, return ~0; } =20 - hcr =3D arm_hcr_el2_eff(env); + hcr =3D arm_hcr_el2_eff_secstate(env, is_secure); if ((hcr & HCR_PTW) && ptw_attrs_are_device(hcr, s2.cacheattrs)) { /* * PTW set and S1 walk touched S2 Device memory: @@ -2341,7 +2341,7 @@ bool get_phys_addr_with_secure(CPUARMState *env, targ= et_ulong address, } =20 /* Combine the S1 and S2 cache attributes. */ - hcr =3D arm_hcr_el2_eff(env); + hcr =3D arm_hcr_el2_eff_secstate(env, is_secure); if (hcr & HCR_DC) { /* * HCR.DC forces the first stage attributes to @@ -2473,7 +2473,7 @@ bool get_phys_addr_with_secure(CPUARMState *env, targ= et_ulong address, result->page_size =3D TARGET_PAGE_SIZE; =20 /* Fill in cacheattr a-la AArch64.TranslateAddressS1Off. */ - hcr =3D arm_hcr_el2_eff(env); + hcr =3D arm_hcr_el2_eff_secstate(env, is_secure); result->cacheattrs.shareability =3D 0; result->cacheattrs.is_s2_format =3D false; if (hcr & HCR_DC) { --=20 2.25.1