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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: stefanha@redhat.com,
=?UTF-8?q?Alex=20Benn=C3=A9e?= <alex.bennee@linaro.org>,
David Hildenbrand <david@redhat.com>,
Peter Maydell <peter.maydell@linaro.org>
Subject: [PULL 06/20] accel/tcg: Suppress auto-invalidate in
probe_access_internal
Date: Tue, 4 Oct 2022 12:52:27 -0700
Message-Id: <20221004195241.46491-7-richard.henderson@linaro.org>
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When PAGE_WRITE_INV is set when calling tlb_set_page,
we immediately set TLB_INVALID_MASK in order to force
tlb_fill to be called on the next lookup. Here in
probe_access_internal, we have just called tlb_fill
and eliminated true misses, thus the lookup must be valid.
This allows us to remove a warning comment from s390x.
There doesn't seem to be a reason to change the code though.
Reviewed-by: Alex Benn=C3=A9e <alex.bennee@linaro.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/cputlb.c | 10 +++++++++-
target/s390x/tcg/mem_helper.c | 4 ----
2 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index d06ff44ce9..264f84a248 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -1533,6 +1533,7 @@ static int probe_access_internal(CPUArchState *env, t=
arget_ulong addr,
}
tlb_addr =3D tlb_read_ofs(entry, elt_ofs);
=20
+ flags =3D TLB_FLAGS_MASK;
page_addr =3D addr & TARGET_PAGE_MASK;
if (!tlb_hit_page(tlb_addr, page_addr)) {
if (!victim_tlb_hit(env, mmu_idx, index, elt_ofs, page_addr)) {
@@ -1547,10 +1548,17 @@ static int probe_access_internal(CPUArchState *env,=
target_ulong addr,
=20
/* TLB resize via tlb_fill may have moved the entry. */
entry =3D tlb_entry(env, mmu_idx, addr);
+
+ /*
+ * With PAGE_WRITE_INV, we set TLB_INVALID_MASK immediately,
+ * to force the next access through tlb_fill. We've just
+ * called tlb_fill, so we know that this entry *is* valid.
+ */
+ flags &=3D ~TLB_INVALID_MASK;
}
tlb_addr =3D tlb_read_ofs(entry, elt_ofs);
}
- flags =3D tlb_addr & TLB_FLAGS_MASK;
+ flags &=3D tlb_addr;
=20
/* Fold all "mmio-like" bits into TLB_MMIO. This is not RAM. */
if (unlikely(flags & ~(TLB_WATCHPOINT | TLB_NOTDIRTY))) {
diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c
index fc52aa128b..3758b9e688 100644
--- a/target/s390x/tcg/mem_helper.c
+++ b/target/s390x/tcg/mem_helper.c
@@ -148,10 +148,6 @@ static int s390_probe_access(CPUArchState *env, target=
_ulong addr, int size,
#else
int flags;
=20
- /*
- * For !CONFIG_USER_ONLY, we cannot rely on TLB_INVALID_MASK or haddr=
=3D=3DNULL
- * to detect if there was an exception during tlb_fill().
- */
env->tlb_fill_exc =3D 0;
flags =3D probe_access_flags(env, addr, access_type, mmu_idx, nonfault=
, phost,
ra);
--=20
2.34.1