From nobody Tue Feb 10 19:18:12 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1664644370; cv=none; d=zohomail.com; s=zohoarc; b=B0uE7Q0X2iHOsDRyWNbZ2l/8zd6j5VAIXtSBCPndVcdDfq7re8spEAddSawtP1ZjzX2bHvLN1DhIIbKD47tjtllqF3BB4wZfYsRblepXAxKEenBknCsMEoRaXp3oCj/NbRvUA6YZw40Oa5QCWB+3g5lMnvTsEYSqz+0q8SLubOg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1664644370; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=bV7kcmVq1B6RlQRM4hyx85LaGxM1dlmN2rlKELHByAI=; b=aaG2DKjOeh66yDiDqCvXbU2dGkqlT29am8q+u8WKWApKwja9mwV4JlD7wnyycJWnhPIvoTMNqv7ECx2pus82de6JSvYvNtYcHGtgybDdwHAq8j1bYvGBVk0IRHJUrPD20YLi4fI+P+iLQZqk/MbtnFMH7BlPXO7Ev7TtjRCgkKU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 166464437080069.1765372367372; Sat, 1 Oct 2022 10:12:50 -0700 (PDT) Received: from localhost ([::1]:48160 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oeg2j-0003EU-Gg for importer@patchew.org; Sat, 01 Oct 2022 13:12:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49114) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oefIK-0000SM-4B for qemu-devel@nongnu.org; Sat, 01 Oct 2022 12:24:52 -0400 Received: from mail-qk1-x733.google.com ([2607:f8b0:4864:20::733]:35596) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1oefIH-0006Rg-3N for qemu-devel@nongnu.org; Sat, 01 Oct 2022 12:24:51 -0400 Received: by mail-qk1-x733.google.com with SMTP id u28so4542726qku.2 for ; Sat, 01 Oct 2022 09:24:48 -0700 (PDT) Received: from stoup.. ([2605:ef80:8084:91a4:f7cb:db31:c505:b931]) by smtp.gmail.com with ESMTPSA id t4-20020a37ea04000000b006d1d8fdea8asm4387445qkj.85.2022.10.01.09.24.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Oct 2022 09:24:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=bV7kcmVq1B6RlQRM4hyx85LaGxM1dlmN2rlKELHByAI=; b=wNO+RKhEOiier9Ja8cN2CqUhcHLfuUmXbtsHeOoaC7hIZcU61jqUaKlpbz5KZzdkkW XuT+oDXE6rBgd2fibngxBl1DDv4HOUack5fSmkOC06ltguzlb4syG8i8M5juC8EjUOZt q+oLySy+JElX3fSZgp0ih8SuX5Ax+B5TlseVVg35shiBV9jm28VrHnDCNUWCtbi4dFBz 3f3xbnsiNCQX/hyv2n2N1KYCycLQg3QS7+RY/fn5+rzPdVevz4pZ2WehH0zxi+pHP8m+ oluNMHQACcFJGWrHKOLr14qdhY9FSIH89ZC6XgqnvGJcfb5bXR21sdG24W37MOT3beTC XsLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=bV7kcmVq1B6RlQRM4hyx85LaGxM1dlmN2rlKELHByAI=; b=O3ZOOVQxIf1eQ+t0LyNqcDyPy+SPXPJ4TtIEy3p8WsWXjWcNt97YtG9hwf9E9B2n0w GDW0Lpg3BtY/EH1PSWPUg+TVt1FPgnd/bxbDc7EurrlPC03N7f2XpEMsOFb15r2/9mgY ZvMLmWG+HzjAc4OaerXQMv39SnWiwz08K6vc5eo4+YSr+vdeU2/fRz0us9TB6T6aTt8j g1V9vW0otpNUX+fvjq1d8CRjgLEgwUt3yo1ErADy/NVQnrPOULLcIXYCPoHG64DMI5Vh /9GOz3/BopxxaZNAmw7Wa12mount6e3JUy1+pW4jZDNoRtCojhZqErkTWJxhPKM8G56o jEbQ== X-Gm-Message-State: ACrzQf147lK0P6c0jhhBybKKHlqPufiOdy7lzV3RFCBZki/NAYLjwfNd +mJ9mmEO6pQIJTEXRGOoBuJB2RZAKjPiYw== X-Google-Smtp-Source: AMsMyM47qSh9JpKoVjg08QhcHnxSB9z0yTu8ipE7g7IClX7Z+YA61tPYEeDlheDt2F1p+tDnyTYg6g== X-Received: by 2002:a05:620a:2793:b0:6cb:c11a:130f with SMTP id g19-20020a05620a279300b006cbc11a130fmr9564402qkp.549.1664641487894; Sat, 01 Oct 2022 09:24:47 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH v3 35/42] target/arm: Move S1_ptw_translate outside arm_ld[lq]_ptw Date: Sat, 1 Oct 2022 09:23:11 -0700 Message-Id: <20221001162318.153420-36-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221001162318.153420-1-richard.henderson@linaro.org> References: <20221001162318.153420-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::733; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x733.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1664644371197100001 Content-Type: text/plain; charset="utf-8" Separate S1 translation from the actual lookup. Will enable lpae hardware updates. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/ptw.c | 92 +++++++++++++++++++++++++----------------------- 1 file changed, 48 insertions(+), 44 deletions(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index d356b0b22d..84b55b640b 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -315,38 +315,29 @@ static bool S1_ptw_translate(CPUARMState *env, ARMMMU= Idx mmu_idx, } =20 /* All loads done in the course of a page table walk go through here. */ -static uint32_t arm_ldl_ptw(CPUARMState *env, hwaddr addr, bool is_secure, - ARMMMUIdx mmu_idx, ARMMMUIdx ptw_idx, - bool debug, ARMMMUFaultInfo *fi) +static uint32_t arm_ldl_ptw(CPUARMState *env, const S1TranslateResult *s1, + ARMMMUFaultInfo *fi) { CPUState *cs =3D env_cpu(env); - S1TranslateResult s1; uint32_t data; =20 - if (!S1_ptw_translate(env, mmu_idx, ptw_idx, addr, is_secure, - debug, &s1, fi)) { - /* Failure. */ - assert(fi->s1ptw); - return 0; - } - - if (likely(s1.hphys)) { + if (likely(s1->hphys)) { /* Page tables are in RAM, and we have the host address. */ - if (s1.be) { - data =3D ldl_be_p(s1.hphys); + if (s1->be) { + data =3D ldl_be_p(s1->hphys); } else { - data =3D ldl_le_p(s1.hphys); + data =3D ldl_le_p(s1->hphys); } } else { /* Page tables are in MMIO. */ - MemTxAttrs attrs =3D { .secure =3D s1.is_secure }; + MemTxAttrs attrs =3D { .secure =3D s1->is_secure }; AddressSpace *as =3D arm_addressspace(cs, attrs); MemTxResult result =3D MEMTX_OK; =20 - if (s1.be) { - data =3D address_space_ldl_be(as, s1.gphys, attrs, &result); + if (s1->be) { + data =3D address_space_ldl_be(as, s1->gphys, attrs, &result); } else { - data =3D address_space_ldl_le(as, s1.gphys, attrs, &result); + data =3D address_space_ldl_le(as, s1->gphys, attrs, &result); } if (unlikely(result !=3D MEMTX_OK)) { fi->type =3D ARMFault_SyncExternalOnWalk; @@ -357,38 +348,29 @@ static uint32_t arm_ldl_ptw(CPUARMState *env, hwaddr = addr, bool is_secure, return data; } =20 -static uint64_t arm_ldq_ptw(CPUARMState *env, hwaddr addr, bool is_secure, - ARMMMUIdx mmu_idx, ARMMMUIdx ptw_idx, - bool debug, ARMMMUFaultInfo *fi) +static uint64_t arm_ldq_ptw(CPUARMState *env, const S1TranslateResult *s1, + ARMMMUFaultInfo *fi) { CPUState *cs =3D env_cpu(env); - S1TranslateResult s1; uint64_t data; =20 - if (!S1_ptw_translate(env, mmu_idx, ptw_idx, addr, is_secure, - debug, &s1, fi)) { - /* Failure. */ - assert(fi->s1ptw); - return 0; - } - - if (likely(s1.hphys)) { + if (likely(s1->hphys)) { /* Page tables are in RAM, and we have the host address. */ - if (s1.be) { - data =3D ldq_be_p(s1.hphys); + if (s1->be) { + data =3D ldq_be_p(s1->hphys); } else { - data =3D ldq_le_p(s1.hphys); + data =3D ldq_le_p(s1->hphys); } } else { /* Page tables are in MMIO. */ - MemTxAttrs attrs =3D { .secure =3D s1.is_secure }; + MemTxAttrs attrs =3D { .secure =3D s1->is_secure }; AddressSpace *as =3D arm_addressspace(cs, attrs); MemTxResult result =3D MEMTX_OK; =20 - if (s1.be) { - data =3D address_space_ldq_be(as, s1.gphys, attrs, &result); + if (s1->be) { + data =3D address_space_ldq_be(as, s1->gphys, attrs, &result); } else { - data =3D address_space_ldq_le(as, s1.gphys, attrs, &result); + data =3D address_space_ldq_le(as, s1->gphys, attrs, &result); } if (unlikely(result !=3D MEMTX_OK)) { fi->type =3D ARMFault_SyncExternalOnWalk; @@ -520,6 +502,7 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32_t= address, int domain =3D 0; int domain_prot; hwaddr phys_addr; + S1TranslateResult s1; uint32_t dacr; =20 /* Pagetable walk. */ @@ -529,7 +512,11 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32_= t address, fi->type =3D ARMFault_Translation; goto do_fault; } - desc =3D arm_ldl_ptw(env, table, is_secure, mmu_idx, ptw_idx, debug, f= i); + if (!S1_ptw_translate(env, mmu_idx, ptw_idx, table, + is_secure, debug, &s1, fi)) { + goto do_fault; + } + desc =3D arm_ldl_ptw(env, &s1, fi); if (fi->type !=3D ARMFault_None) { goto do_fault; } @@ -567,7 +554,11 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32_= t address, /* Fine pagetable. */ table =3D (desc & 0xfffff000) | ((address >> 8) & 0xffc); } - desc =3D arm_ldl_ptw(env, table, is_secure, mmu_idx, ptw_idx, debu= g, fi); + if (!S1_ptw_translate(env, mmu_idx, ptw_idx, table, + is_secure, debug, &s1, fi)) { + goto do_fault; + } + desc =3D arm_ldl_ptw(env, &s1, fi); if (fi->type !=3D ARMFault_None) { goto do_fault; } @@ -643,6 +634,7 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32_t= address, int domain_prot; hwaddr phys_addr; uint32_t dacr; + S1TranslateResult s1; bool ns; =20 /* Pagetable walk. */ @@ -652,7 +644,11 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32_= t address, fi->type =3D ARMFault_Translation; goto do_fault; } - desc =3D arm_ldl_ptw(env, table, is_secure, mmu_idx, ptw_idx, debug, f= i); + if (!S1_ptw_translate(env, mmu_idx, ptw_idx, table, + is_secure, debug, &s1, fi)) { + goto do_fault; + } + desc =3D arm_ldl_ptw(env, &s1, fi); if (fi->type !=3D ARMFault_None) { goto do_fault; } @@ -705,7 +701,11 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32_= t address, ns =3D extract32(desc, 3, 1); /* Lookup l2 entry. */ table =3D (desc & 0xfffffc00) | ((address >> 10) & 0x3fc); - desc =3D arm_ldl_ptw(env, table, is_secure, mmu_idx, ptw_idx, debu= g, fi); + if (!S1_ptw_translate(env, mmu_idx, ptw_idx, table, + is_secure, debug, &s1, fi)) { + goto do_fault; + } + desc =3D arm_ldl_ptw(env, &s1, fi); if (fi->type !=3D ARMFault_None) { goto do_fault; } @@ -1281,14 +1281,18 @@ static bool get_phys_addr_lpae(CPUARMState *env, ui= nt64_t address, */ tableattrs =3D is_secure ? 0 : (1 << 4); for (;;) { + S1TranslateResult s1; uint64_t descriptor; bool nstable; =20 descaddr |=3D (address >> (stride * (4 - level))) & indexmask; descaddr &=3D ~7ULL; nstable =3D extract32(tableattrs, 4, 1); - descriptor =3D arm_ldq_ptw(env, descaddr, !nstable, mmu_idx, - ptw_idx, debug, fi); + if (!S1_ptw_translate(env, mmu_idx, ptw_idx, descaddr, + !nstable, debug, &s1, fi)) { + goto do_fault; + } + descriptor =3D arm_ldq_ptw(env, &s1, fi); if (fi->type !=3D ARMFault_None) { goto do_fault; } --=20 2.34.1