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dkim=pass reason="pass (just generated, assumed good)" header.d=opensource.wdc.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d= opensource.wdc.com; h=content-transfer-encoding:content-type :mime-version:references:in-reply-to:x-mailer:message-id:date :subject:to:from; s=dkim; t=1663906056; x=1666498057; bh=vZU/43l RY2chLbAeJzOxBBpvBmMQMwxjZ66GSqjz1/4=; b=cKfueAyXvm1D5N7YepF4tXQ DVZbTZOiniDYQ85XktxhD0RJ+WhuXI02an6qalakkBy3tff/xsLq16EAAa5yFuEn 6ALU0lgdLq4xJdd7XQ6Tzenlg8HjnHpxqu3U6wltvQIsnxuueCHGyhoiSzdSsL0v PAdQy0hOJFYZxzS5zOjIp88Ap9Y8VeNFr7n9TW9oDjSZqTxkYtgZVHBHTnD1Zw6K bg6Egawfe87Xqk61R8IKp8flslBdXIyD059fScVtEQccuJkVXPeXFg4IjRDCjPlf aPUMaC5wg1jVTeUpvVzwkb+PYnyUT+bhsrlJ4CLTFmxrinZGa1wFmpZl8WGQJCA= = X-Virus-Scanned: amavisd-new at usg-ed-osssrv.wdc.com From: Alistair Francis To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Alistair Francis , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 10/12] hw/riscv: opentitan: Expose the resetvec as a SoC property Date: Fri, 23 Sep 2022 14:07:02 +1000 Message-Id: <20220923040704.428285-11-alistair.francis@opensource.wdc.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220923040704.428285-1-alistair.francis@opensource.wdc.com> References: <20220923040704.428285-1-alistair.francis@opensource.wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=216.71.154.45; envelope-from=prvs=2580c328f=alistair.francis@opensource.wdc.com; helo=esa6.hgst.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1663907281443100001 Content-Type: text/plain; charset="utf-8" From: Alistair Francis On the OpenTitan hardware the resetvec is fixed at the start of ROM. In QEMU we don't run the ROM code and instead just jump to the next stage. This means we need to be a little more flexible about what the resetvec is. This patch allows us to set the resetvec from the command line with something like this: -global driver=3Driscv.lowrisc.ibex.soc,property=3Dresetvec,value=3D0x2= 0000400 This way as the next stage changes we can update the resetvec. Signed-off-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20220914101108.82571-4-alistair.francis@wdc.com> Signed-off-by: Alistair Francis --- include/hw/riscv/opentitan.h | 2 ++ hw/riscv/opentitan.c | 8 +++++++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h index 26d960f288..6665cd5794 100644 --- a/include/hw/riscv/opentitan.h +++ b/include/hw/riscv/opentitan.h @@ -46,6 +46,8 @@ struct LowRISCIbexSoCState { IbexTimerState timer; IbexSPIHostState spi_host[OPENTITAN_NUM_SPI_HOSTS]; =20 + uint32_t resetvec; + MemoryRegion flash_mem; MemoryRegion rom; MemoryRegion flash_alias; diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index 45c92c9bbc..be7ff1eea0 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -142,7 +142,7 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev_s= oc, Error **errp) &error_abort); object_property_set_int(OBJECT(&s->cpus), "num-harts", ms->smp.cpus, &error_abort); - object_property_set_int(OBJECT(&s->cpus), "resetvec", 0x20000400, + object_property_set_int(OBJECT(&s->cpus), "resetvec", s->resetvec, &error_abort); sysbus_realize(SYS_BUS_DEVICE(&s->cpus), &error_fatal); =20 @@ -297,10 +297,16 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev= _soc, Error **errp) memmap[IBEX_DEV_PERI].base, memmap[IBEX_DEV_PERI].size); } =20 +static Property lowrisc_ibex_soc_props[] =3D { + DEFINE_PROP_UINT32("resetvec", LowRISCIbexSoCState, resetvec, 0x200004= 00), + DEFINE_PROP_END_OF_LIST() +}; + static void lowrisc_ibex_soc_class_init(ObjectClass *oc, void *data) { DeviceClass *dc =3D DEVICE_CLASS(oc); =20 + device_class_set_props(dc, lowrisc_ibex_soc_props); dc->realize =3D lowrisc_ibex_soc_realize; /* Reason: Uses serial_hds in realize function, thus can't be used twi= ce */ dc->user_creatable =3D false; --=20 2.37.3