From nobody Sun Feb 8 23:32:06 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=collabora.com ARC-Seal: i=1; a=rsa-sha256; t=1663593882; cv=none; d=zohomail.com; s=zohoarc; b=ZvRXqEVI2B4Ezan5nd3829/Mh8daKSJ3m61PYkZ2vMm6Cax9G2tF4r2Egt9Rv74KtPmf5cyTAB7B06pupNCtr8K3ysz5r0esPjNEzU6OrJpJ5/N3iDgMnWvnukL80CnoQE9ZDEpf01FlHIPuIkzsAAHWeEdT3VuRDPmSMEU8rQg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1663593882; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Mvs+Azjl2kevaCcI3CVHIXqVSNeS6aDUYN0gU6+A/QM=; b=YMf5WAXuLTJAnO89uIjnyVNyAZxURnNcmfXGRUDWHT0ZneGfENXJ6LnVw86DCAleo+KrC15B1cbXA38e0g9FsvCB65yjp/Ke7ocOZaHyxEZlICmPC2I++vBU/O6AXmxBZsSnGFscBFOI3jCsosevGPwT8XZX0/JcZRqj2HRDJ4Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1663593882548923.7565808364169; Mon, 19 Sep 2022 06:24:42 -0700 (PDT) Received: from localhost ([::1]:37974 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oaGlN-00016S-D3 for importer@patchew.org; Mon, 19 Sep 2022 09:24:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56800) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oaGeI-0008NN-O7 for qemu-devel@nongnu.org; Mon, 19 Sep 2022 09:17:36 -0400 Received: from madras.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e5ab]:55406) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oaGeG-00067c-7u for qemu-devel@nongnu.org; Mon, 19 Sep 2022 09:17:22 -0400 Received: from dellino.fritz.box (host-82-49-101-130.retail.telecomitalia.it [82.49.101.130]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: fahien) by madras.collabora.co.uk (Postfix) with ESMTPSA id 669C266019EE; Mon, 19 Sep 2022 14:17:16 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1663593436; bh=I7xKQXYoZG40sEbey3ZyL/b1CNjsa17oI2aGBWEKpOU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JgIWS78JSZFV+2UuMjkT7e+6dymz1Mte1Qorcr6/k5I5eNFpOYjeArfkG+FkDVDOi XjWqfBu+R2A0Fk03olueuteQBdzGjvPKBCaH6m8OVT7Qyzt3UR3m8LSIqck7TqwhRs HGfCCGsTGBTC3TKcK+/0EDSVzStR9JBqcf3HOywQ01xhZ/oP665+P2XSPhr69tSOD2 MqzKyZZ0k8Fo6kQDD5L3EyMseVXgvaQ7AWiwCVUEsGp8ht4/WUz7lt0UMtEeiwjfT9 7bNpIXwyPHWbATg0mW5hFa4XBvkcTeX03w3zx963hC3LoIumONTH/zq/iay3b1VIP2 bqkDLyM38o71g== From: Antonio Caggiano To: qemu-devel@nongnu.org Cc: gert.wollny@collabora.com, dmitry.osipenko@collabora.com, "Dr. David Alan Gilbert" , "Michael S. Tsirkin" Subject: [PATCH v3 1/4] virtio: Add shared memory capability Date: Mon, 19 Sep 2022 15:16:59 +0200 Message-Id: <20220919131702.94875-2-antonio.caggiano@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220919131702.94875-1-antonio.caggiano@collabora.com> References: <20220919131702.94875-1-antonio.caggiano@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1098:0:82:1000:25:2eeb:e5ab; envelope-from=antonio.caggiano@collabora.com; helo=madras.collabora.co.uk X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @collabora.com) X-ZM-MESSAGEID: 1663593883609100001 Content-Type: text/plain; charset="utf-8" From: "Dr. David Alan Gilbert" Define a new capability type 'VIRTIO_PCI_CAP_SHARED_MEMORY_CFG' to allow defining shared memory regions with sizes and offsets of 2^32 and more. Multiple instances of the capability are allowed and distinguished by a device-specific 'id'. Signed-off-by: Dr. David Alan Gilbert Signed-off-by: Antonio Caggiano --- v2: Remove virtio_pci_shm_cap as virtio_pci_cap64 is used instead. v3: No need for mask32 as cpu_to_le32 truncates the value. hw/virtio/virtio-pci.c | 18 ++++++++++++++++++ include/hw/virtio/virtio-pci.h | 4 ++++ 2 files changed, 22 insertions(+) diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index a50c5a57d7..377bb06fec 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1169,6 +1169,24 @@ static int virtio_pci_add_mem_cap(VirtIOPCIProxy *pr= oxy, return offset; } =20 +int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy, + uint8_t bar, uint64_t offset, uint64_t length, + uint8_t id) +{ + struct virtio_pci_cap64 cap =3D { + .cap.cap_len =3D sizeof cap, + .cap.cfg_type =3D VIRTIO_PCI_CAP_SHARED_MEMORY_CFG, + }; + + cap.cap.bar =3D bar; + cap.cap.length =3D cpu_to_le32(length); + cap.length_hi =3D cpu_to_le32(length >> 32); + cap.cap.offset =3D cpu_to_le32(offset); + cap.offset_hi =3D cpu_to_le32(offset >> 32); + cap.cap.id =3D id; + return virtio_pci_add_mem_cap(proxy, &cap.cap); +} + static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr, unsigned size) { diff --git a/include/hw/virtio/virtio-pci.h b/include/hw/virtio/virtio-pci.h index 2446dcd9ae..5e5c4a4c6d 100644 --- a/include/hw/virtio/virtio-pci.h +++ b/include/hw/virtio/virtio-pci.h @@ -252,4 +252,8 @@ void virtio_pci_types_register(const VirtioPCIDeviceTyp= eInfo *t); */ unsigned virtio_pci_optimal_num_queues(unsigned fixed_queues); =20 +int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy, + uint8_t bar, uint64_t offset, uint64_t length, + uint8_t id); + #endif --=20 2.34.1 From nobody Sun Feb 8 23:32:06 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=collabora.com ARC-Seal: i=1; a=rsa-sha256; t=1663593674; cv=none; d=zohomail.com; s=zohoarc; b=iWOAD8HUrgVqINs/6sGtD+evBW7wvhFBmKF1y6rGVm9XPg/a+giOpJgssTkvKP5TLwg8MI3tsoLqvb/IPeqhYGB8KuwhwXuKjBmfGwNZAUW8GFVIf47dFCIcYrPxQJQZ0ybM+wZBXe0baPmqYuf9RH4sYtvUAVm89Z4l8cI8GgY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1663593674; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=7fGlVrOXppHDDPOJUtRWfs93GDYu5bt+r0qGn8S1PDA=; b=mkqXWw1Ln+ZQA7YJyA40wZxaWNjpuCcM/Pzw5bBGm3PaoQhLaDddhGtUjCp7BN1OGBIbIlQh5yXu0a5ZSwYnfrGOombbI1G1mqs4O3dD9lP5EZc/GCPTsVjsbD3kORT2BgF2nvlj4r5/KcVKi6ljMNAT9DIOA9+E0mBvhjD3vS8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1663593674861208.25121203610195; Mon, 19 Sep 2022 06:21:14 -0700 (PDT) Received: from localhost ([::1]:53832 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oaGi1-0003kh-OG for importer@patchew.org; Mon, 19 Sep 2022 09:21:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56806) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oaGeL-0008Ob-FJ for qemu-devel@nongnu.org; Mon, 19 Sep 2022 09:17:36 -0400 Received: from madras.collabora.co.uk ([46.235.227.172]:49478) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oaGeG-00067h-Ad for qemu-devel@nongnu.org; Mon, 19 Sep 2022 09:17:24 -0400 Received: from dellino.fritz.box (host-82-49-101-130.retail.telecomitalia.it [82.49.101.130]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: fahien) by madras.collabora.co.uk (Postfix) with ESMTPSA id 10D1C6601D86; Mon, 19 Sep 2022 14:17:17 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1663593437; bh=xTovjopaLHMSixDgpx/y+dcC7IF8jzqb+i/PWa1Eis0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=j3FhptuwdL1NbmiNSh3JvJWgTwykRDVSX7f39U7j7mYgLV25XS6VTlzlFbYhiRZMC 83Pa1YLpO7QSAMKmQF1qbUkW4MRlIMmvII3bZQnTh6S/mqEa23KrpWmoAQRsxvOJTS oEATW1pZhR19j7mD3Szl2vWXUpJ246ogW0X6tPzsMynWWvWCFxjnZ/u3yMYo0LkzdV ny4gpb2qZ5QGfJ52CECePmtvQsYoEgRMUwHYhTHMsDKrGmfvFeTsWTjB6zw9so47Tr joaakyorGoqC4YPJmXGAXg2RuI4JmKKQdYfFEQG9TQbMxSZso31vuKxjy0zEMYGdjt xSl8uj5rXv1EQ== From: Antonio Caggiano To: qemu-devel@nongnu.org Cc: gert.wollny@collabora.com, dmitry.osipenko@collabora.com, Gerd Hoffmann , "Michael S . Tsirkin" Subject: [PATCH v3 2/4] virtio-gpu: hostmem Date: Mon, 19 Sep 2022 15:17:00 +0200 Message-Id: <20220919131702.94875-3-antonio.caggiano@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220919131702.94875-1-antonio.caggiano@collabora.com> References: <20220919131702.94875-1-antonio.caggiano@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=46.235.227.172; envelope-from=antonio.caggiano@collabora.com; helo=madras.collabora.co.uk X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @collabora.com) X-ZM-MESSAGEID: 1663593676484100003 Content-Type: text/plain; charset="utf-8" From: Gerd Hoffmann Use VIRTIO_GPU_SHM_ID_HOST_VISIBLE as id for virtio-gpu. Signed-off-by: Antonio Caggiano Acked-by: Michael S. Tsirkin --- v2: Formatting fixes hw/display/virtio-gpu-pci.c | 15 +++++++++++++++ hw/display/virtio-gpu.c | 1 + hw/display/virtio-vga.c | 33 ++++++++++++++++++++++++--------- include/hw/virtio/virtio-gpu.h | 5 +++++ 4 files changed, 45 insertions(+), 9 deletions(-) diff --git a/hw/display/virtio-gpu-pci.c b/hw/display/virtio-gpu-pci.c index 93f214ff58..2cbbacd7fe 100644 --- a/hw/display/virtio-gpu-pci.c +++ b/hw/display/virtio-gpu-pci.c @@ -33,6 +33,21 @@ static void virtio_gpu_pci_base_realize(VirtIOPCIProxy *= vpci_dev, Error **errp) DeviceState *vdev =3D DEVICE(g); int i; =20 + if (virtio_gpu_hostmem_enabled(g->conf)) { + vpci_dev->msix_bar_idx =3D 1; + vpci_dev->modern_mem_bar_idx =3D 2; + memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem", + g->conf.hostmem); + pci_register_bar(&vpci_dev->pci_dev, 4, + PCI_BASE_ADDRESS_SPACE_MEMORY | + PCI_BASE_ADDRESS_MEM_PREFETCH | + PCI_BASE_ADDRESS_MEM_TYPE_64, + &g->hostmem); + virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, + VIRTIO_GPU_SHM_ID_HOST_VISIBLE); + } + + qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus), errp); virtio_pci_force_virtio_1(vpci_dev); if (!qdev_realize(vdev, BUS(&vpci_dev->bus), errp)) { return; diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 20cc703dcc..506b3b8eef 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -1424,6 +1424,7 @@ static Property virtio_gpu_properties[] =3D { 256 * MiB), DEFINE_PROP_BIT("blob", VirtIOGPU, parent_obj.conf.flags, VIRTIO_GPU_FLAG_BLOB_ENABLED, false), + DEFINE_PROP_SIZE("hostmem", VirtIOGPU, parent_obj.conf.hostmem, 0), DEFINE_PROP_END_OF_LIST(), }; =20 diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c index 4dcb34c4a7..aa8d1ab993 100644 --- a/hw/display/virtio-vga.c +++ b/hw/display/virtio-vga.c @@ -115,17 +115,32 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *v= pci_dev, Error **errp) pci_register_bar(&vpci_dev->pci_dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram); =20 - /* - * Configure virtio bar and regions - * - * We use bar #2 for the mmio regions, to be compatible with stdvga. - * virtio regions are moved to the end of bar #2, to make room for - * the stdvga mmio registers at the start of bar #2. - */ - vpci_dev->modern_mem_bar_idx =3D 2; - vpci_dev->msix_bar_idx =3D 4; vpci_dev->modern_io_bar_idx =3D 5; =20 + if (!virtio_gpu_hostmem_enabled(g->conf)) { + /* + * Configure virtio bar and regions + * + * We use bar #2 for the mmio regions, to be compatible with stdvg= a. + * virtio regions are moved to the end of bar #2, to make room for + * the stdvga mmio registers at the start of bar #2. + */ + vpci_dev->modern_mem_bar_idx =3D 2; + vpci_dev->msix_bar_idx =3D 4; + } else { + vpci_dev->msix_bar_idx =3D 1; + vpci_dev->modern_mem_bar_idx =3D 2; + memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem", + g->conf.hostmem); + pci_register_bar(&vpci_dev->pci_dev, 4, + PCI_BASE_ADDRESS_SPACE_MEMORY | + PCI_BASE_ADDRESS_MEM_PREFETCH | + PCI_BASE_ADDRESS_MEM_TYPE_64, + &g->hostmem); + virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, + VIRTIO_GPU_SHM_ID_HOST_VISIBLE); + } + if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) { /* * with page-per-vq=3Doff there is no padding space we can use diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index 2e28507efe..eafce75b04 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -102,12 +102,15 @@ enum virtio_gpu_base_conf_flags { (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DMABUF_ENABLED)) #define virtio_gpu_blob_enabled(_cfg) \ (_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED)) +#define virtio_gpu_hostmem_enabled(_cfg) \ + (_cfg.hostmem > 0) =20 struct virtio_gpu_base_conf { uint32_t max_outputs; uint32_t flags; uint32_t xres; uint32_t yres; + uint64_t hostmem; }; =20 struct virtio_gpu_ctrl_command { @@ -131,6 +134,8 @@ struct VirtIOGPUBase { int renderer_blocked; int enable; =20 + MemoryRegion hostmem; + struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS]; =20 int enabled_output_bitmask; --=20 2.34.1 From nobody Sun Feb 8 23:32:06 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=collabora.com ARC-Seal: i=1; a=rsa-sha256; t=1663593850; cv=none; d=zohomail.com; s=zohoarc; b=cMac3DfOqsxH1fClrbP+IS6aG85AZadB0N4U8HmXjfb1AQTkIJq8Kt26tQMszsylORIGRlGHeKU9GEgv7QnSg3yJ0ywKK9lp//fmzTcN2HD0DOZ9Bd0XsWw4poOOGMjtzx7InuZqM2yGlDJGqmojzTgX5hhZ3Sw7lprZJt72YEE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1663593850; 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s=mail; t=1663593438; bh=AKC4vJwGvsnQgxhg7cXqQQ8oDynGWRuls4jRfAc2nQk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VarZSirAi0WBTY9CX8WfgmuEXsLxNenBKy+nXpODLDOgAVV6Js7EoCOnAYoUstvOn xXaDdcZ0OdfHiNKBupajNztFbsL8NMM51t+1LWjAtsp5vCB8ws0Jkl44E3TY/d/ev7 zIEF0bGO/BQREqEFUQfuxdPKck1AVWemx2XASlIqJnQN4uDWHrHe7bHDRMWnsH+BaV aq8OXSq1igoKT+mtfHnERCs1zL2Btv1KjqPsej8OrpTIj+r5C5b7sg4CW0xgzLX7Pm pmmse6kw44udf970ApxyZiN+Sdmn66wkYbeMPhT//dBgdV5PMbbMODqRv3gEx/ilF9 zVQQLO+iqQ9gQ== From: Antonio Caggiano To: qemu-devel@nongnu.org Cc: gert.wollny@collabora.com, dmitry.osipenko@collabora.com, "Michael S. Tsirkin" , Gerd Hoffmann Subject: [PATCH v3 3/4] virtio-gpu: Handle resource blob commands Date: Mon, 19 Sep 2022 15:17:01 +0200 Message-Id: <20220919131702.94875-4-antonio.caggiano@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220919131702.94875-1-antonio.caggiano@collabora.com> References: <20220919131702.94875-1-antonio.caggiano@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1098:0:82:1000:25:2eeb:e5ab; envelope-from=antonio.caggiano@collabora.com; helo=madras.collabora.co.uk X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @collabora.com) X-ZM-MESSAGEID: 1663593850724100001 Content-Type: text/plain; charset="utf-8" Support BLOB resources creation, mapping and unmapping by calling the new stable virglrenderer 0.10 interface. Only enabled when available and via the blob config. E.g. -device virtio-vga-gl,blob=3Dtrue Signed-off-by: Antonio Caggiano Signed-off-by: Dmitry Osipenko --- v2: Fix memory leaks and unmap resource on destroy. hw/display/virtio-gpu-virgl.c | 171 +++++++++++++++++++++++++++ hw/display/virtio-gpu.c | 12 +- include/hw/virtio/virtio-gpu-bswap.h | 18 +++ include/hw/virtio/virtio-gpu.h | 8 ++ meson.build | 5 + 5 files changed, 210 insertions(+), 4 deletions(-) diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c index 73cb92c8d5..17f00b3fb0 100644 --- a/hw/display/virtio-gpu-virgl.c +++ b/hw/display/virtio-gpu-virgl.c @@ -16,6 +16,8 @@ #include "trace.h" #include "hw/virtio/virtio.h" #include "hw/virtio/virtio-gpu.h" +#include "hw/virtio/virtio-gpu-bswap.h" +#include "hw/virtio/virtio-iommu.h" =20 #include =20 @@ -398,6 +400,164 @@ static void virgl_cmd_get_capset(VirtIOGPU *g, g_free(resp); } =20 +#ifdef HAVE_VIRGL_RESOURCE_BLOB + +static void virgl_cmd_resource_create_blob(VirtIOGPU *g, + struct virtio_gpu_ctrl_command = *cmd) +{ + struct virtio_gpu_simple_resource *res; + struct virtio_gpu_resource_create_blob cblob; + int ret; + + VIRTIO_GPU_FILL_CMD(cblob); + virtio_gpu_create_blob_bswap(&cblob); + trace_virtio_gpu_cmd_res_create_blob(cblob.resource_id, cblob.size); + + if (cblob.resource_id =3D=3D 0) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource id 0 is not allowed\n= ", + __func__); + cmd->error =3D VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + + res =3D virtio_gpu_find_resource(g, cblob.resource_id); + if (res) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource already exists %d\n", + __func__, cblob.resource_id); + cmd->error =3D VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + + res =3D g_new0(struct virtio_gpu_simple_resource, 1); + QTAILQ_INSERT_HEAD(&g->reslist, res, next); + + res->resource_id =3D cblob.resource_id; + res->blob_size =3D cblob.size; + + if (cblob.blob_mem !=3D VIRTIO_GPU_BLOB_MEM_HOST3D) { + ret =3D virtio_gpu_create_mapping_iov(g, cblob.nr_entries, sizeof(= cblob), + cmd, &res->addrs, &res->iov, + &res->iov_cnt); + if (ret !=3D 0) { + cmd->error =3D VIRTIO_GPU_RESP_ERR_UNSPEC; + return; + } + } + + if (cblob.blob_mem =3D=3D VIRTIO_GPU_BLOB_MEM_GUEST) { + virtio_gpu_init_udmabuf(res); + } + const struct virgl_renderer_resource_create_blob_args virgl_args =3D { + .res_handle =3D cblob.resource_id, + .ctx_id =3D cblob.hdr.ctx_id, + .blob_mem =3D cblob.blob_mem, + .blob_id =3D cblob.blob_id, + .blob_flags =3D cblob.blob_flags, + .size =3D cblob.size, + .iovecs =3D res->iov, + .num_iovs =3D res->iov_cnt, + }; + ret =3D virgl_renderer_resource_create_blob(&virgl_args); + if (ret) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: virgl blob create error: %s\n", + __func__, strerror(-ret)); + cmd->error =3D VIRTIO_GPU_RESP_ERR_UNSPEC; + } +} + +static void virgl_cmd_resource_map_blob(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cm= d) +{ + struct virtio_gpu_simple_resource *res; + struct virtio_gpu_resource_map_blob mblob; + int ret; + void *data; + uint64_t size; + struct virtio_gpu_resp_map_info resp; + + VIRTIO_GPU_FILL_CMD(mblob); + virtio_gpu_map_blob_bswap(&mblob); + + if (mblob.resource_id =3D=3D 0) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource id 0 is not allowed\n= ", + __func__); + cmd->error =3D VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + + res =3D virtio_gpu_find_resource(g, mblob.resource_id); + if (!res) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource does not exist %d\n", + __func__, mblob.resource_id); + cmd->error =3D VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + + ret =3D virgl_renderer_resource_map(res->resource_id, &data, &size); + if (ret) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource map error: %s\n", + __func__, strerror(-ret)); + cmd->error =3D VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + + memory_region_init_ram_device_ptr(&res->region, OBJECT(g), NULL, size,= data); + memory_region_add_subregion(&g->parent_obj.hostmem, mblob.offset, &res= ->region); + memory_region_set_enabled(&res->region, true); + + memset(&resp, 0, sizeof(resp)); + resp.hdr.type =3D VIRTIO_GPU_RESP_OK_MAP_INFO; + virgl_renderer_resource_get_map_info(mblob.resource_id, &resp.map_info= ); + virtio_gpu_ctrl_response(g, cmd, &resp.hdr, sizeof(resp)); + + res->mapped =3D true; +} + +int virtio_gpu_virgl_resource_unmap(VirtIOGPU *g, + struct virtio_gpu_simple_resource *res) +{ + if (!res->mapped) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource already unmapped %d\n= ", + __func__, res->resource_id); + return VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + } + + memory_region_set_enabled(&res->region, false); + memory_region_del_subregion(&g->parent_obj.hostmem, &res->region); + object_unparent(OBJECT(&res->region)); + + res->mapped =3D false; + return virgl_renderer_resource_unmap(res->resource_id); +} + +static void virgl_cmd_resource_unmap_blob(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cm= d) +{ + struct virtio_gpu_simple_resource *res; + struct virtio_gpu_resource_unmap_blob ublob; + VIRTIO_GPU_FILL_CMD(ublob); + virtio_gpu_unmap_blob_bswap(&ublob); + + if (ublob.resource_id =3D=3D 0) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource id 0 is not allowed\n= ", + __func__); + cmd->error =3D VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + + res =3D virtio_gpu_find_resource(g, ublob.resource_id); + if (!res) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource does not exist %d\n", + __func__, ublob.resource_id); + cmd->error =3D VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + + virtio_gpu_virgl_resource_unmap(g, res); +} + +#endif /* HAVE_VIRGL_RESOURCE_BLOB */ + void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) { @@ -464,6 +624,17 @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, case VIRTIO_GPU_CMD_GET_EDID: virtio_gpu_get_edid(g, cmd); break; +#ifdef HAVE_VIRGL_RESOURCE_BLOB + case VIRTIO_GPU_CMD_RESOURCE_CREATE_BLOB: + virgl_cmd_resource_create_blob(g, cmd); + break; + case VIRTIO_GPU_CMD_RESOURCE_MAP_BLOB: + virgl_cmd_resource_map_blob(g, cmd); + break; + case VIRTIO_GPU_CMD_RESOURCE_UNMAP_BLOB: + virgl_cmd_resource_unmap_blob(g, cmd); + break; +#endif /* HAVE_VIRGL_RESOURCE_BLOB */ default: cmd->error =3D VIRTIO_GPU_RESP_ERR_UNSPEC; break; diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 506b3b8eef..f79693d44d 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -33,8 +33,6 @@ =20 #define VIRTIO_GPU_VM_VERSION 1 =20 -static struct virtio_gpu_simple_resource* -virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id); static struct virtio_gpu_simple_resource * virtio_gpu_find_check_resource(VirtIOGPU *g, uint32_t resource_id, bool require_backing, @@ -115,7 +113,7 @@ static void update_cursor(VirtIOGPU *g, struct virtio_g= pu_update_cursor *cursor) cursor->resource_id ? 1 : 0); } =20 -static struct virtio_gpu_simple_resource * +struct virtio_gpu_simple_resource * virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id) { struct virtio_gpu_simple_resource *res; @@ -874,6 +872,10 @@ void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g, static void virtio_gpu_cleanup_mapping(VirtIOGPU *g, struct virtio_gpu_simple_resource *= res) { + if (res->mapped) { + virtio_gpu_virgl_resource_unmap(g, res); + } + virtio_gpu_cleanup_mapping_iov(g, res->iov, res->iov_cnt); res->iov =3D NULL; res->iov_cnt =3D 0; @@ -1323,10 +1325,12 @@ void virtio_gpu_device_realize(DeviceState *qdev, E= rror **errp) return; } =20 +#ifndef HAVE_VIRGL_RESOURCE_BLOB if (virtio_gpu_virgl_enabled(g->parent_obj.conf)) { - error_setg(errp, "blobs and virgl are not compatible (yet)"); + error_setg(errp, "Linked virglrenderer does not support blob r= esources"); return; } +#endif } =20 if (!virtio_gpu_base_device_realize(qdev, diff --git a/include/hw/virtio/virtio-gpu-bswap.h b/include/hw/virtio/virti= o-gpu-bswap.h index 9124108485..dd1975e2d4 100644 --- a/include/hw/virtio/virtio-gpu-bswap.h +++ b/include/hw/virtio/virtio-gpu-bswap.h @@ -63,10 +63,28 @@ virtio_gpu_create_blob_bswap(struct virtio_gpu_resource= _create_blob *cblob) { virtio_gpu_ctrl_hdr_bswap(&cblob->hdr); le32_to_cpus(&cblob->resource_id); + le32_to_cpus(&cblob->blob_mem); le32_to_cpus(&cblob->blob_flags); + le32_to_cpus(&cblob->nr_entries); + le64_to_cpus(&cblob->blob_id); le64_to_cpus(&cblob->size); } =20 +static inline void +virtio_gpu_map_blob_bswap(struct virtio_gpu_resource_map_blob *mblob) +{ + virtio_gpu_ctrl_hdr_bswap(&mblob->hdr); + le32_to_cpus(&mblob->resource_id); + le64_to_cpus(&mblob->offset); +} + +static inline void +virtio_gpu_unmap_blob_bswap(struct virtio_gpu_resource_unmap_blob *ublob) +{ + virtio_gpu_ctrl_hdr_bswap(&ublob->hdr); + le32_to_cpus(&ublob->resource_id); +} + static inline void virtio_gpu_scanout_blob_bswap(struct virtio_gpu_set_scanout_blob *ssb) { diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index eafce75b04..708cf1bb9c 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -55,6 +55,9 @@ struct virtio_gpu_simple_resource { int dmabuf_fd; uint8_t *remapped; =20 + MemoryRegion region; + bool mapped; + QTAILQ_ENTRY(virtio_gpu_simple_resource) next; }; =20 @@ -245,6 +248,9 @@ void virtio_gpu_base_fill_display_info(VirtIOGPUBase *g, struct virtio_gpu_resp_display_info *dpy_info); =20 /* virtio-gpu.c */ +struct virtio_gpu_simple_resource * +virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id); + void virtio_gpu_ctrl_response(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd, struct virtio_gpu_ctrl_hdr *resp, @@ -289,5 +295,7 @@ void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g); void virtio_gpu_virgl_reset(VirtIOGPU *g); int virtio_gpu_virgl_init(VirtIOGPU *g); int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g); +int virtio_gpu_virgl_resource_unmap(VirtIOGPU *g, + struct virtio_gpu_simple_resource *res= ); =20 #endif diff --git a/meson.build b/meson.build index c2adb7caf4..dd064afd7a 100644 --- a/meson.build +++ b/meson.build @@ -718,6 +718,11 @@ if not get_option('virglrenderer').auto() or have_syst= em or have_vhost_user_gpu method: 'pkg-config', required: get_option('virglrenderer'), kwargs: static_kwargs) + + config_host_data.set('HAVE_VIRGL_RESOURCE_BLOB', + cc.has_function('virgl_renderer_resource_create_blo= b', + prefix: '#include = ', + dependencies: virgl)) endif curl =3D not_found if not get_option('curl').auto() or have_block --=20 2.34.1 From nobody Sun Feb 8 23:32:06 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Tsirkin" , Gerd Hoffmann Subject: [PATCH v3 4/4] virtio-gpu: Don't require udmabuf when blob support is enabled Date: Mon, 19 Sep 2022 15:17:02 +0200 Message-Id: <20220919131702.94875-5-antonio.caggiano@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220919131702.94875-1-antonio.caggiano@collabora.com> References: <20220919131702.94875-1-antonio.caggiano@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1098:0:82:1000:25:2eeb:e5ab; envelope-from=antonio.caggiano@collabora.com; helo=madras.collabora.co.uk X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @collabora.com) X-ZM-MESSAGEID: 1663593666733100001 Content-Type: text/plain; charset="utf-8" From: Dmitry Osipenko Host blobs don't need udmabuf, it's only needed by guest blobs. The host blobs are utilized by the Mesa virgl driver when persistent memory mapping is needed by a GL buffer, otherwise virgl driver doesn't use blobs. Persistent mapping support bumps GL version from 4.3 to 4.5 in guest. Relax the udmabuf requirement. Signed-off-by: Dmitry Osipenko Reviewed-by: Antonio Caggiano --- hw/display/virtio-gpu.c | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index f79693d44d..767142cf5d 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -367,7 +367,9 @@ static void virtio_gpu_resource_create_blob(VirtIOGPU *= g, return; } =20 - virtio_gpu_init_udmabuf(res); + if (cblob.blob_mem =3D=3D VIRTIO_GPU_BLOB_MEM_GUEST) { + virtio_gpu_init_udmabuf(res); + } QTAILQ_INSERT_HEAD(&g->reslist, res, next); } =20 @@ -1319,19 +1321,13 @@ void virtio_gpu_device_realize(DeviceState *qdev, E= rror **errp) VirtIODevice *vdev =3D VIRTIO_DEVICE(qdev); VirtIOGPU *g =3D VIRTIO_GPU(qdev); =20 - if (virtio_gpu_blob_enabled(g->parent_obj.conf)) { - if (!virtio_gpu_have_udmabuf()) { - error_setg(errp, "cannot enable blob resources without udmabuf= "); - return; - } - #ifndef HAVE_VIRGL_RESOURCE_BLOB - if (virtio_gpu_virgl_enabled(g->parent_obj.conf)) { - error_setg(errp, "Linked virglrenderer does not support blob r= esources"); - return; - } -#endif + if (virtio_gpu_blob_enabled(g->parent_obj.conf) && + virtio_gpu_virgl_enabled(g->parent_obj.conf)) { + error_setg(errp, "Linked virglrenderer does not support blob resou= rces"); + return; } +#endif =20 if (!virtio_gpu_base_device_realize(qdev, virtio_gpu_handle_ctrl_cb, --=20 2.34.1