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[93.44.39.154]) by smtp.gmail.com with ESMTPSA id o13-20020a170906768d00b00773c60c2129sm3493306ejm.141.2022.09.11.15.26.37 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Sep 2022 15:26:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1662935202; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Y71Jb9qkkoQ9TDS2b/TKh10oAYuaouXMle09gl2ybQ4=; b=ZHIMADuSiIV0qq/kChmkJjDJJQHmUzJ+OF5kl21FhtpYeGiJ349ee9jkpRlKHWvJvPlf8p 7UwayYxIjxwjfdvS7zVWryR8f4mWHqooP4N3AWCmAQqIdxmMqok6aEzssjeq4xLVc1IzH0 tBSAwbtW1mCsNqwvwwiHq0UWeeRQs9E= X-MC-Unique: iFtp7fpSNCeogWVfsDeCZA-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date; bh=Y71Jb9qkkoQ9TDS2b/TKh10oAYuaouXMle09gl2ybQ4=; b=ZQC/IQAv73+0wOKbCox6zLCF4TETGFMY8dnMX5XXFaL8eUAXm4hiPqmrVwA2ANreYv iMojbgexKeoImvd7/KnyayYuN+aGcbX/MvCM3XogMPwyz1oaHGJF6EXh/OZMNBZxm5AY Ij3FFtJSDjWnib8Y5IjQmHineo4WOR+24i2tSkBh+t34gQnenzA0ekth8gmlVg1xHZow iADChdVUjxTOMJNGiaskzazpd7zhvU+PU/agcba763luJJkLSnlYjI+S9SUlkZf9Oc64 /GANWufXsh96HphrlvIvQ/0oyo4iYjzHOltVn2l+aWN9NQfYpyTKNNA7ABcJKx/bqXHm xqZQ== X-Gm-Message-State: ACgBeo2n+bPSg4zXw7+vKWP3l/eVr0cX4VZlLQKim8CqoSfkul07ES2w Zp+GSxa/mJiLVvmOgkjynJ2wFwcNG9/bY59Lqie4G+uHBP3kBfMC2MbAsDW/HKWXbwFzu4MrJY1 M7xCdfWIf5NXcRHcRLE/d61TcujIxI1JKGwFpZLnOC0zY31Zt0wEAJ0e9e800fxVYo2U= X-Received: by 2002:a17:906:cc56:b0:779:ed37:b59e with SMTP id mm22-20020a170906cc5600b00779ed37b59emr8706852ejb.536.1662935198895; Sun, 11 Sep 2022 15:26:38 -0700 (PDT) X-Google-Smtp-Source: AA6agR4VUDc2xEl+t4eI3OH0YVJ31LbjDR6q6RQtLGJl4zUbuvR9CrnWZ4OQMkduW8iRcLneeSNUAA== X-Received: by 2002:a17:906:cc56:b0:779:ed37:b59e with SMTP id mm22-20020a170906cc5600b00779ed37b59emr8706848ejb.536.1662935198537; Sun, 11 Sep 2022 15:26:38 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PATCH 1/2] target/i386: fix cmpxchg with 32-bit register destination Date: Mon, 12 Sep 2022 00:26:29 +0200 Message-Id: <20220911222630.338330-2-pbonzini@redhat.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220911222630.338330-1-pbonzini@redhat.com> References: <20220911222630.338330-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1662935283110100003 Content-Type: text/plain; charset="utf-8" Unlike the memory case, where "the destination operand receives a write cycle without regard to the result of the comparison", rm must not be touched altogether if the write fails, including not zero-extending it on 64-bit processors. This is not how the movcond currently works, because it is always followed by a gen_op_mov_reg_v to rm. To fix it, introduce a new function that is similar to gen_op_mov_reg_v but writes to a TCG temporary. Considering that gen_extu(ot, oldv) is not needed in the memory case either, the two cases for register and memory destinations are different enough that one might as well fuse the two "if (mod =3D=3D 3)" into one. So do that too. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 73 ++++++++++++++++++++++++++----------- 1 file changed, 51 insertions(+), 22 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index d6420df31d..0e9237d627 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -429,32 +429,51 @@ static inline MemOp mo_b_d32(int b, MemOp ot) return b & 1 ? (ot =3D=3D MO_16 ? MO_16 : MO_32) : MO_8; } =20 -static void gen_op_mov_reg_v(DisasContext *s, MemOp ot, int reg, TCGv t0) +/* Compute the result of writing t0 to the OT-sized register REG. + * + * If DEST is NULL, store the result into the register and return the + * register's TCGv. + * + * If DEST is not NULL, store the result into DEST and return the + * register's TCGv. + */ +static TCGv gen_op_deposit_reg_v(DisasContext *s, MemOp ot, int reg, TCGv = dest, TCGv t0) { switch(ot) { case MO_8: - if (!byte_reg_is_xH(s, reg)) { - tcg_gen_deposit_tl(cpu_regs[reg], cpu_regs[reg], t0, 0, 8); - } else { - tcg_gen_deposit_tl(cpu_regs[reg - 4], cpu_regs[reg - 4], t0, 8= , 8); + if (byte_reg_is_xH(s, reg)) { + dest =3D dest ? dest : cpu_regs[reg - 4]; + tcg_gen_deposit_tl(dest, cpu_regs[reg - 4], t0, 8, 8); + return cpu_regs[reg - 4]; } + dest =3D dest ? dest : cpu_regs[reg]; + tcg_gen_deposit_tl(dest, cpu_regs[reg], t0, 0, 8); break; case MO_16: - tcg_gen_deposit_tl(cpu_regs[reg], cpu_regs[reg], t0, 0, 16); + dest =3D dest ? dest : cpu_regs[reg]; + tcg_gen_deposit_tl(dest, cpu_regs[reg], t0, 0, 16); break; case MO_32: /* For x86_64, this sets the higher half of register to zero. For i386, this is equivalent to a mov. */ - tcg_gen_ext32u_tl(cpu_regs[reg], t0); + dest =3D dest ? dest : cpu_regs[reg]; + tcg_gen_ext32u_tl(dest, t0); break; #ifdef TARGET_X86_64 case MO_64: - tcg_gen_mov_tl(cpu_regs[reg], t0); + dest =3D dest ? dest : cpu_regs[reg]; + tcg_gen_mov_tl(dest, t0); break; #endif default: tcg_abort(); } + return cpu_regs[reg]; +} + +static void gen_op_mov_reg_v(DisasContext *s, MemOp ot, int reg, TCGv t0) +{ + gen_op_deposit_reg_v(s, ot, reg, NULL, t0); } =20 static inline @@ -5495,26 +5514,36 @@ static target_ulong disas_insn(DisasContext *s, CPU= State *cpu) s->mem_index, ot | MO_LE); gen_op_mov_reg_v(s, ot, R_EAX, oldv); } else { + gen_extu(ot, cmpv); if (mod =3D=3D 3) { + TCGv dest; rm =3D (modrm & 7) | REX_B(s); gen_op_mov_v_reg(s, ot, oldv, rm); + gen_extu(ot, oldv); + + /* + * Unlike the memory case, where "the destination oper= and receives + * a write cycle without regard to the result of the c= omparison", + * rm must not be touched altogether if the write fail= s, including + * not zero-extending it on 64-bit processors. So, pr= ecompute + * the result of a successful writeback and perform th= e movcond + * directly on cpu_regs. Also need to write accumulat= or first, in + * case rm is part of RAX too. + */ + gen_op_mov_reg_v(s, ot, R_EAX, oldv); + dest =3D gen_op_deposit_reg_v(s, ot, rm, newv, newv); + tcg_gen_movcond_tl(TCG_COND_EQ, dest, oldv, cmpv, newv= , dest); } else { gen_lea_modrm(env, s, modrm); gen_op_ld_v(s, ot, oldv, s->A0); - rm =3D 0; /* avoid warning */ - } - gen_extu(ot, oldv); - gen_extu(ot, cmpv); - /* store value =3D (old =3D=3D cmp ? new : old); */ - tcg_gen_movcond_tl(TCG_COND_EQ, newv, oldv, cmpv, newv, ol= dv); - if (mod =3D=3D 3) { - gen_op_mov_reg_v(s, ot, R_EAX, oldv); - gen_op_mov_reg_v(s, ot, rm, newv); - } else { - /* Perform an unconditional store cycle like physical = cpu; - must be before changing accumulator to ensure - idempotency if the store faults and the instruction - is restarted */ + + /* + * Perform an unconditional store cycle like physical = cpu; + * must be before changing accumulator to ensure + * idempotency if the store faults and the instruction + * is restarted + */ + tcg_gen_movcond_tl(TCG_COND_EQ, newv, oldv, cmpv, newv= , oldv); gen_op_st_v(s, ot, newv, s->A0); gen_op_mov_reg_v(s, ot, R_EAX, oldv); } --=20 2.37.2 From nobody Mon Feb 9 13:04:22 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1662935423; cv=none; d=zohomail.com; s=zohoarc; b=cQ2vyiUU173BCrwp7P1KKovt4ibH2B6/Dm1P2O8ZtPnVb6MJqP5T4EaBclfWxw/VkFla3KoJgorxB9fJEf5PV2+tfEr72q+w/f8ykfFTg0GiWuRNULtn9KQrPtP3ShHHFvMIWyeYOTIx8C08X51OPQ+a4yeb/jr9jxxsHQwBAg8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1662935423; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=LOfvjRkEG8V4EiN/l5Zas0eIix+fi1TGCBANCIiUGiQ=; b=bUmtbKke1a2BepU8vJ25AGgqqCYTE6Tt3yOnv8fXxCsXkZ/neaB91fVyTwDPbFvY+7bIIjLX0ASu82ovS/YESCW2Thn6u+5SiGM5JUb1G8acLv0ujMzwDgw6+DudGl/JjuqhbIyqTCm0ozLhs32fywfi57EKWoaat3Vrfo84yGo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1662935423427365.3610846392862; Sun, 11 Sep 2022 15:30:23 -0700 (PDT) Received: from localhost ([::1]:42866 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oXVT4-0001Yg-Gc for importer@patchew.org; Sun, 11 Sep 2022 18:30:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42500) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oXVPd-00060c-L4 for qemu-devel@nongnu.org; Sun, 11 Sep 2022 18:26:49 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]:41048) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oXVPb-00027r-0r for qemu-devel@nongnu.org; Sun, 11 Sep 2022 18:26:49 -0400 Received: from mail-ed1-f72.google.com (mail-ed1-f72.google.com [209.85.208.72]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_128_GCM_SHA256) id us-mta-552-bvabX4P-Oru_y4FZcAxUUA-1; Sun, 11 Sep 2022 18:26:43 -0400 Received: by mail-ed1-f72.google.com with SMTP id z6-20020a05640240c600b0043e1d52fd98so5016992edb.22 for ; Sun, 11 Sep 2022 15:26:43 -0700 (PDT) Received: from goa-sendmail (93-44-39-154.ip95.fastwebnet.it. [93.44.39.154]) by smtp.gmail.com with ESMTPSA id fp17-20020a1709069e1100b007794a742094sm3497640ejc.111.2022.09.11.15.26.40 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Sep 2022 15:26:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1662935206; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=LOfvjRkEG8V4EiN/l5Zas0eIix+fi1TGCBANCIiUGiQ=; b=RSMzd5hN81nmzujfzX/Vk+An0Nq1YRRhNZyhLRYiKsEfCFZ0mzVoJBCftrjqSxredMVDcY hZOHhg3Oh4IASQo8YF0Q5buvFDuIVyNrRQtFO7p2O+3ENUQqTKhT6TIoeE7t8jBFpnYHIL TixIuCp8LbmkbewKbiyndHk4TBIZuvA= X-MC-Unique: bvabX4P-Oru_y4FZcAxUUA-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date; bh=LOfvjRkEG8V4EiN/l5Zas0eIix+fi1TGCBANCIiUGiQ=; b=x3EtsWzlZOPtWJ5D+b+TFhnPseIBQAcMnCrbmYkQ/nY3IQkOIJhHvfE0VOhQDsu3bz CBRySG6zP3x1ancGuvsVjGfje4QMVY/ysGf2tRF/nOCpwp5uKj/OfAqFRrmje2h/Nwmx 9c9ItvcjFxfHXDQfss0eQyL/Q9hvER8NW+KOL43uianY23RYl+1R4lk01WrPW40xKzYI NXd4a0M6gVYbcr1SpJJoxEbsv08USmxwz8MWrhMzOmvDmKoK6PW9lk/ZhG/I7BRRwJfJ B76yCNCED8X9sGSm7/A0mSByfnW6jnklKeMxG8H4SBP7PrlBkVuoxsy7Ocaf0zbZ4+4M Yhmw== X-Gm-Message-State: ACgBeo1Kmlv9a/d37xppsfAOtBufew+wpadBrYWj0M9XfdjOroT3ubRq CvIzpPBlXQ4YID74Qh8gF1AXgjdNk8uFaHm2dSwhpETDFLCOETsLbRPmbx5+TKWYXrneirH8tg8 BZiSor4o46Zp5cvX/gXluoM/1nR/ladOuO4ngZZ4kU+AdF19zl6f0Or8YbqIXU/ka4hA= X-Received: by 2002:a05:6402:e94:b0:443:e3fe:7c87 with SMTP id h20-20020a0564020e9400b00443e3fe7c87mr20491044eda.144.1662935202487; Sun, 11 Sep 2022 15:26:42 -0700 (PDT) X-Google-Smtp-Source: AA6agR5vwemiek8y4uylKb6WHQREsrTB/3RwhfI4aSuUMvDdEGvg7FCaSu7UDkcdeLwWKOakYm6gEQ== X-Received: by 2002:a05:6402:e94:b0:443:e3fe:7c87 with SMTP id h20-20020a0564020e9400b00443e3fe7c87mr20491036eda.144.1662935202253; Sun, 11 Sep 2022 15:26:42 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PATCH 2/2] target/i386: cmpxchg only overwrites ZF Date: Mon, 12 Sep 2022 00:26:30 +0200 Message-Id: <20220911222630.338330-3-pbonzini@redhat.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220911222630.338330-1-pbonzini@redhat.com> References: <20220911222630.338330-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1662935423750100001 Content-Type: text/plain; charset="utf-8" Do not set all the flags, they are untouched other than ZF. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 0e9237d627..488a617d14 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -5548,10 +5548,12 @@ static target_ulong disas_insn(DisasContext *s, CPU= State *cpu) gen_op_mov_reg_v(s, ot, R_EAX, oldv); } } - tcg_gen_mov_tl(cpu_cc_src, oldv); - tcg_gen_mov_tl(s->cc_srcT, cmpv); - tcg_gen_sub_tl(cpu_cc_dst, cmpv, oldv); - set_cc_op(s, CC_OP_SUBB + ot); + + gen_compute_eflags(s); + tcg_gen_andi_tl(cpu_cc_src, cpu_cc_src, ~CC_Z); + tcg_gen_addi_tl(s->T0, cpu_cc_src, CC_Z); + tcg_gen_movcond_tl(TCG_COND_EQ, cpu_cc_src, oldv, cmpv, s->T0,= cpu_cc_src); + tcg_temp_free(oldv); tcg_temp_free(newv); tcg_temp_free(cmpv); --=20 2.37.2