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bh=9uWITMOtiY6eNGn2/dnUIhYVDhgI4ldRYfEla/S1e6M=; b=dfmRkENHtM9v1Np1O+h1NEIZgd1xZA0yLsHwazko3/5BtUgOUgAwfuZLlUfZwX+srCQR3q 9X42v41GnjmKZbV7zy2IEawBokQ/rc/HbZPehHV8G14899NafUP+lfIK4ZqRLRW4GwAzGd MwdlHK3VNJamKswhj/4XrPP2LgNd/Hc= X-MC-Unique: IYWQ5qOONC6y2MtoxRc_eg-1 From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: richard.henderson@linaro.org, paul@nowt.org Subject: [PATCH 12/17] target/i386: add 68-6f, 78-7f opcodes Date: Wed, 24 Aug 2022 19:32:45 +0200 Message-Id: <20220824173250.232491-6-pbonzini@redhat.com> In-Reply-To: <20220824173123.232018-1-pbonzini@redhat.com> References: <20220824173123.232018-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 2.85 on 10.11.54.9 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1661364561779100001 Content-Type: text/plain; charset="utf-8" Signed-off-by: Paolo Bonzini --- target/i386/tcg/decode-new.c.inc | 16 ++++++ target/i386/tcg/decode-old.c.inc | 2 +- target/i386/tcg/emit.c.inc | 86 ++++++++++++++++++++++++++++++++ 3 files changed, 103 insertions(+), 1 deletion(-) diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.= c.inc index 161a3b1554..6892000aaf 100644 --- a/target/i386/tcg/decode-new.c.inc +++ b/target/i386/tcg/decode-new.c.inc @@ -637,8 +637,24 @@ static X86OpEntry A2_08_FF[16][8] =3D { X86_OP_ENTRYw(POP, LoBits,d64), }, { + X86_OP_ENTRYr(PUSH, I,z), + X86_OP_ENTRY3(IMUL, G,v, E,v, I,z, nowb), + X86_OP_ENTRYr(PUSH, I,b), + X86_OP_ENTRY3(IMUL, G,v, E,v, I,b, nowb), + X86_OP_ENTRY2(INS, Y,b, 2,w, nowb), /* DX */ + X86_OP_ENTRY2(INS, Y,z, 2,w, nowb), /* DX */ + X86_OP_ENTRY2(OUTS, 2,w, X,b, nowb), /* DX */ + X86_OP_ENTRY2(OUTS, 2,w, X,b, nowb), /* DX */ }, { + X86_OP_ENTRYr(Jcc, J,b), + X86_OP_ENTRYr(Jcc, J,b), + X86_OP_ENTRYr(Jcc, J,b), + X86_OP_ENTRYr(Jcc, J,b), + X86_OP_ENTRYr(Jcc, J,b), + X86_OP_ENTRYr(Jcc, J,b), + X86_OP_ENTRYr(Jcc, J,b), + X86_OP_ENTRYr(Jcc, J,b), }, { }, diff --git a/target/i386/tcg/decode-old.c.inc b/target/i386/tcg/decode-old.= c.inc index a297d126a4..7763bef11d 100644 --- a/target/i386/tcg/decode-old.c.inc +++ b/target/i386/tcg/decode-old.c.inc @@ -1821,7 +1821,7 @@ static target_ulong disas_insn(DisasContext *s, CPUSt= ate *cpu) #else use_new &=3D b <=3D limit; #endif - if (use_new && b <=3D 0x5f) { + if (use_new && b <=3D 0x7f) { return disas_insn_new(s, cpu, b); } case 0x0f: diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc index cf606e74c7..ae82ebd8c9 100644 --- a/target/i386/tcg/emit.c.inc +++ b/target/i386/tcg/emit.c.inc @@ -246,11 +246,74 @@ static void gen_DEC(DisasContext *s, CPUX86State *env= , X86DecodedInsn *decode) gen_alu_op(s, OP_DECL, decode->op[0].ot); } =20 +static void gen_IMUL(DisasContext *s, CPUX86State *env, X86DecodedInsn *de= code) +{ + int reg =3D decode->op[0].n; + MemOp ot =3D decode->op[0].ot; + + switch (ot) { +#ifdef TARGET_X86_64 + case MO_64: + tcg_gen_muls2_i64(cpu_regs[reg], s->T1, s->T0, s->T1); + tcg_gen_mov_tl(cpu_cc_dst, cpu_regs[reg]); + tcg_gen_sari_tl(cpu_cc_src, cpu_cc_dst, 63); + tcg_gen_sub_tl(cpu_cc_src, cpu_cc_src, s->T1); + break; +#endif + case MO_32: + tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0); + tcg_gen_trunc_tl_i32(s->tmp3_i32, s->T1); + tcg_gen_muls2_i32(s->tmp2_i32, s->tmp3_i32, + s->tmp2_i32, s->tmp3_i32); + tcg_gen_extu_i32_tl(cpu_regs[reg], s->tmp2_i32); + tcg_gen_sari_i32(s->tmp2_i32, s->tmp2_i32, 31); + tcg_gen_mov_tl(cpu_cc_dst, cpu_regs[reg]); + tcg_gen_sub_i32(s->tmp2_i32, s->tmp2_i32, s->tmp3_i32); + tcg_gen_extu_i32_tl(cpu_cc_src, s->tmp2_i32); + break; + default: + tcg_gen_ext16s_tl(s->T0, s->T0); + tcg_gen_ext16s_tl(s->T1, s->T1); + /* XXX: use 32 bit mul which could be faster */ + tcg_gen_mul_tl(s->T0, s->T0, s->T1); + tcg_gen_mov_tl(cpu_cc_dst, s->T0); + tcg_gen_ext16s_tl(s->tmp0, s->T0); + tcg_gen_sub_tl(cpu_cc_src, s->T0, s->tmp0); + gen_op_mov_reg_v(s, ot, reg, s->T0); + break; + } + set_cc_op(s, CC_OP_MULB + ot); +} + static void gen_INC(DisasContext *s, CPUX86State *env, X86DecodedInsn *dec= ode) { gen_alu_op(s, OP_INCL, decode->op[0].ot); } =20 +static void gen_INS(DisasContext *s, CPUX86State *env, X86DecodedInsn *dec= ode) +{ + MemOp ot =3D decode->op[0].ot; + + tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T1); + if (!gen_check_io(s, ot, s->tmp2_i32, + SVM_IOIO_TYPE_MASK | SVM_IOIO_STR_MASK)) { + return; + } + + if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { + gen_io_start(); + } + if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) { + gen_repz_ins(s, ot, s->pc_start - s->cs_base, s->pc - s->cs_base); + /* jump generated by gen_repz_ins */ + } else { + gen_ins(s, ot); + if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { + gen_jmp(s, s->pc - s->cs_base); + } + } +} + static void gen_Jcc(DisasContext *s, CPUX86State *env, X86DecodedInsn *dec= ode) { target_ulong next_eip =3D s->pc - s->cs_base; @@ -273,6 +336,29 @@ static void gen_OR(DisasContext *s, CPUX86State *env, = X86DecodedInsn *decode) gen_alu_op(s, OP_ORL, decode->op[0].ot); } =20 +static void gen_OUTS(DisasContext *s, CPUX86State *env, X86DecodedInsn *de= code) +{ + MemOp ot =3D decode->op[1].ot; + + tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0); + if (!gen_check_io(s, ot, s->tmp2_i32, SVM_IOIO_STR_MASK)) { + return; + } + + if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { + gen_io_start(); + } + if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) { + gen_repz_outs(s, ot, s->pc_start - s->cs_base, s->pc - s->cs_base); + /* jump generated by gen_repz_ins */ + } else { + gen_outs(s, ot); + if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { + gen_jmp(s, s->pc - s->cs_base); + } + } +} + static void gen_PUSH(DisasContext *s, CPUX86State *env, X86DecodedInsn *de= code) { gen_push_v(s, decode->op[2].v); --=20 2.37.1