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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id bh16-20020a05600c3d1000b003a3561d4f3fsm15184908wmb.43.2022.08.22.07.12.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 07:12:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=Ix5ZX0LyxSe0lq8009+k3P93c+marBxWgKkCfMS6XO4=; b=xqhSh/J3Amp77yha/WEPgppTr2wvu7XP+/4bmW5/gwS59Egc1iMpjHs5yd2/Ld/w5m tiG1aEIR1QCCmfdxX6keRnTd8nSY4BVJ8pd8TqUza4XGubOjSEAwgVKF2Szw3gUYy221 y8xUFR5KRtOjCGfucQYsJ4nWMY3turIQNHTLl/WalI7DYEPtVpe7gTn+goXXs1yH3v28 Pu13fbbOw4u/lXQP2zzNTgWlg4dqJ7f+SjZuREGv48W7KVV+c50PLGst/MB+mPMnr4fv 98YZEQNiz1ZfEfSYUt6omnGhnAAoZvOrO1aHGqlTN0bCJiUpLbIYOGKwoU1ujBT3Z0jD phMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=Ix5ZX0LyxSe0lq8009+k3P93c+marBxWgKkCfMS6XO4=; b=y1R8qv5Es7MpSuQJi5OU1zS/RMYFt1P2qW8WdsgeyuoUhE66m/0zlhtQrPjAORunvg eqK4aY0S/9QsfTJtlZ+BoF/cYAp+dfcMqF9QDRXjVJMGFRcxuWLJwRh/lF9mNdZ6cO4Q BMrYyT1N2IzeB5ryc8Pxhsi5VBMvV36/x0XcGI6B3zvU40UUUT/MNZhM5NwBsKRChZTz UVsJjiAGA/3ujq1GaHSTcFPwKI5ft+09dTXi1eW6Ysu/NDPVG5qCI/gNgmNE9cK/dvnE Vw+ehHIsd1VV8jpFoBw4j3iPfx7vjEngICkIpKgUKOY5Vh9wU6xnaa06i2WU+6Y5JKeK KMZA== X-Gm-Message-State: ACgBeo0ICVKzZMy5NVldgOXQHCPVtBtZB0hnzPdAbDlBaDnUTw6v7efv PTiL/kTX1/9wC0r0sUV/43w8A8DyMYWpyw== X-Google-Smtp-Source: AA6agR6UK9CYRjLszL8RAgjPVk7Y0RdS71Gjr3bIgpITeVUWzLEJL8vgq6DrnVW5wy0ncYOldHuhbQ== X-Received: by 2002:a5d:6b10:0:b0:21e:4bbd:e893 with SMTP id v16-20020a5d6b10000000b0021e4bbde893mr11085590wrw.613.1661177559213; Mon, 22 Aug 2022 07:12:39 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Cc: Richard Henderson , qemu-riscv@nongnu.org, Palmer Dabbelt , Bin Meng , Alistair Francis , Furquan Shaikh Subject: [PATCH v2 4/7] target/mips: Honour -semihosting-config userspace=on Date: Mon, 22 Aug 2022 15:12:27 +0100 Message-Id: <20220822141230.3658237-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220822141230.3658237-1-peter.maydell@linaro.org> References: <20220822141230.3658237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::22c; envelope-from=peter.maydell@linaro.org; helo=mail-lj1-x22c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1661191381679100001 Honour the commandline -semihosting-config userspace=3Don option, instead of always permitting userspace semihosting calls in system emulation mode, by passing the correct value to the is_userspace argument of semihosting_enabled(). Note that this is a behaviour change: if the user wants to do semihosting calls from userspace they must now specifically enable them on the command line. MIPS semihosting is not implemented for linux-user builds. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/mips/tcg/translate.c | 9 +++++---- target/mips/tcg/micromips_translate.c.inc | 6 +++--- target/mips/tcg/mips16e_translate.c.inc | 2 +- target/mips/tcg/nanomips_translate.c.inc | 4 ++-- 4 files changed, 11 insertions(+), 10 deletions(-) diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index de1511baaf8..53886618ddd 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -12082,12 +12082,13 @@ static void gen_cache_operation(DisasContext *ctx= , uint32_t op, int base, tcg_temp_free_i32(t0); } =20 -static inline bool is_uhi(int sdbbp_code) +static inline bool is_uhi(DisasContext *ctx, int sdbbp_code) { #ifdef CONFIG_USER_ONLY return false; #else - return semihosting_enabled() && sdbbp_code =3D=3D 1; + bool is_user =3D (ctx->hflags & MIPS_HFLAG_KSU) =3D=3D MIPS_HFLAG_UM; + return semihosting_enabled(is_user) && sdbbp_code =3D=3D 1; #endif } =20 @@ -13898,7 +13899,7 @@ static void decode_opc_special_r6(CPUMIPSState *env= , DisasContext *ctx) } break; case R6_OPC_SDBBP: - if (is_uhi(extract32(ctx->opcode, 6, 20))) { + if (is_uhi(ctx, extract32(ctx->opcode, 6, 20))) { ctx->base.is_jmp =3D DISAS_SEMIHOST; } else { if (ctx->hflags & MIPS_HFLAG_SBRI) { @@ -14310,7 +14311,7 @@ static void decode_opc_special2_legacy(CPUMIPSState= *env, DisasContext *ctx) gen_cl(ctx, op1, rd, rs); break; case OPC_SDBBP: - if (is_uhi(extract32(ctx->opcode, 6, 20))) { + if (is_uhi(ctx, extract32(ctx->opcode, 6, 20))) { ctx->base.is_jmp =3D DISAS_SEMIHOST; } else { /* diff --git a/target/mips/tcg/micromips_translate.c.inc b/target/mips/tcg/mi= cromips_translate.c.inc index b2c696f8916..632895cc9ef 100644 --- a/target/mips/tcg/micromips_translate.c.inc +++ b/target/mips/tcg/micromips_translate.c.inc @@ -825,7 +825,7 @@ static void gen_pool16c_insn(DisasContext *ctx) generate_exception_break(ctx, extract32(ctx->opcode, 0, 4)); break; case SDBBP16: - if (is_uhi(extract32(ctx->opcode, 0, 4))) { + if (is_uhi(ctx, extract32(ctx->opcode, 0, 4))) { ctx->base.is_jmp =3D DISAS_SEMIHOST; } else { /* @@ -941,7 +941,7 @@ static void gen_pool16c_r6_insn(DisasContext *ctx) break; case R6_SDBBP16: /* SDBBP16 */ - if (is_uhi(extract32(ctx->opcode, 6, 4))) { + if (is_uhi(ctx, extract32(ctx->opcode, 6, 4))) { ctx->base.is_jmp =3D DISAS_SEMIHOST; } else { if (ctx->hflags & MIPS_HFLAG_SBRI) { @@ -1310,7 +1310,7 @@ static void gen_pool32axf(CPUMIPSState *env, DisasCon= text *ctx, int rt, int rs) generate_exception_end(ctx, EXCP_SYSCALL); break; case SDBBP: - if (is_uhi(extract32(ctx->opcode, 16, 10))) { + if (is_uhi(ctx, extract32(ctx->opcode, 16, 10))) { ctx->base.is_jmp =3D DISAS_SEMIHOST; } else { check_insn(ctx, ISA_MIPS_R1); diff --git a/target/mips/tcg/mips16e_translate.c.inc b/target/mips/tcg/mips= 16e_translate.c.inc index 7568933e234..918b15d55ce 100644 --- a/target/mips/tcg/mips16e_translate.c.inc +++ b/target/mips/tcg/mips16e_translate.c.inc @@ -951,7 +951,7 @@ static int decode_ase_mips16e(CPUMIPSState *env, DisasC= ontext *ctx) } break; case RR_SDBBP: - if (is_uhi(extract32(ctx->opcode, 5, 6))) { + if (is_uhi(ctx, extract32(ctx->opcode, 5, 6))) { ctx->base.is_jmp =3D DISAS_SEMIHOST; } else { /* diff --git a/target/mips/tcg/nanomips_translate.c.inc b/target/mips/tcg/nan= omips_translate.c.inc index b3aff22c189..812c111e3c3 100644 --- a/target/mips/tcg/nanomips_translate.c.inc +++ b/target/mips/tcg/nanomips_translate.c.inc @@ -3694,7 +3694,7 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *en= v, DisasContext *ctx) generate_exception_end(ctx, EXCP_BREAK); break; case NM_SDBBP: - if (is_uhi(extract32(ctx->opcode, 0, 19))) { + if (is_uhi(ctx, extract32(ctx->opcode, 0, 19))) { ctx->base.is_jmp =3D DISAS_SEMIHOST; } else { if (ctx->hflags & MIPS_HFLAG_SBRI) { @@ -4633,7 +4633,7 @@ static int decode_isa_nanomips(CPUMIPSState *env, Dis= asContext *ctx) generate_exception_end(ctx, EXCP_BREAK); break; case NM_SDBBP16: - if (is_uhi(extract32(ctx->opcode, 0, 3))) { + if (is_uhi(ctx, extract32(ctx->opcode, 0, 3))) { ctx->base.is_jmp =3D DISAS_SEMIHOST; } else { if (ctx->hflags & MIPS_HFLAG_SBRI) { --=20 2.25.1